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Magnus Dammeccf0602013-03-26 10:34:24 +09001/*
2 * r8a73a4 processor support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/irq.h>
21#include <linux/irqchip.h>
22#include <linux/kernel.h>
23#include <linux/of_platform.h>
Magnus Damme481a522013-03-26 10:34:33 +090024#include <linux/serial_sci.h>
Magnus Dammeccf0602013-03-26 10:34:24 +090025#include <mach/common.h>
26#include <mach/irqs.h>
27#include <mach/r8a73a4.h>
28#include <asm/mach/arch.h>
29
Magnus Damme481a522013-03-26 10:34:33 +090030#define SCIF_COMMON(scif_type, baseaddr, irq) \
31 .type = scif_type, \
32 .mapbase = baseaddr, \
33 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
34 .scbrr_algo_id = SCBRR_ALGO_4, \
35 .irqs = SCIx_IRQ_MUXED(irq)
36
37#define SCIFA_DATA(index, baseaddr, irq) \
38[index] = { \
39 SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
40 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
41}
42
43#define SCIFB_DATA(index, baseaddr, irq) \
44[index] = { \
45 SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
46 .scscr = SCSCR_RE | SCSCR_TE, \
47}
48
49enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFB3 };
50
51static const struct plat_sci_port scif[] = {
52 SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
53 SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
54 SCIFB_DATA(SCIFB0, 0xe6c50000, gic_spi(145)), /* SCIFB0 */
55 SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
56 SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
57 SCIFB_DATA(SCIFB3, 0xe6cf0000, gic_spi(151)), /* SCIFB3 */
58};
59
60static inline void r8a73a4_register_scif(int idx)
61{
62 platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
63 sizeof(struct plat_sci_port));
64}
65
Magnus Dammeccf0602013-03-26 10:34:24 +090066void __init r8a73a4_add_standard_devices(void)
67{
Magnus Damme481a522013-03-26 10:34:33 +090068 r8a73a4_register_scif(SCIFA0);
69 r8a73a4_register_scif(SCIFA1);
70 r8a73a4_register_scif(SCIFB0);
71 r8a73a4_register_scif(SCIFB1);
72 r8a73a4_register_scif(SCIFB2);
73 r8a73a4_register_scif(SCIFB3);
Magnus Dammeccf0602013-03-26 10:34:24 +090074}
75
76#ifdef CONFIG_USE_OF
77void __init r8a73a4_add_standard_devices_dt(void)
78{
79 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
80}
81
82static const char *r8a73a4_boards_compat_dt[] __initdata = {
83 "renesas,r8a73a4",
84 NULL,
85};
86
87DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
88 .init_irq = irqchip_init,
89 .init_machine = r8a73a4_add_standard_devices_dt,
90 .init_time = shmobile_timer_init,
91 .dt_compat = r8a73a4_boards_compat_dt,
92MACHINE_END
93#endif /* CONFIG_USE_OF */