blob: 94ab6b90dd3fabdaf2856a5d7fc2abfd4ed2af88 [file] [log] [blame]
Andi Kleendfa46982006-09-26 10:52:30 +02001/* Various workarounds for chipset bugs.
2 This code runs very early and can't use the regular PCI subsystem
3 The entries are keyed to PCI bridges which usually identify chipsets
4 uniquely.
5 This is only for whole classes of chipsets with specific problems which
6 need early invasive action (e.g. before the timers are initialized).
7 Most PCI device specific workarounds can be done later and should be
8 in standard PCI quirks
9 Mainboard specific bugs should be handled by DMI entries.
10 CPU specific bugs in setup.c */
11
12#include <linux/pci.h>
13#include <linux/acpi.h>
14#include <linux/pci_ids.h>
15#include <asm/pci-direct.h>
Andi Kleendfa46982006-09-26 10:52:30 +020016#include <asm/dma.h>
Andi Kleen54ef3402007-10-19 20:35:03 +020017#include <asm/io_apic.h>
18#include <asm/apic.h>
FUJITA Tomonori46a7fa22008-07-11 10:23:42 +090019#include <asm/iommu.h>
Joerg Roedel1d9b16d2008-11-27 18:39:15 +010020#include <asm/gart.h>
Neil Horman03bbcb22013-04-16 16:38:32 -040021#include <asm/irq_remapping.h>
Andi Kleendfa46982006-09-26 10:52:30 +020022
Neil Hormanc6b48322008-01-30 13:31:25 +010023static void __init fix_hypertransport_config(int num, int slot, int func)
24{
25 u32 htcfg;
26 /*
27 * we found a hypertransport bus
28 * make sure that we are broadcasting
29 * interrupts to all cpus on the ht bus
30 * if we're using extended apic ids
31 */
32 htcfg = read_pci_config(num, slot, func, 0x68);
33 if (htcfg & (1 << 18)) {
Neil Horman7bcbc782008-01-30 13:31:26 +010034 printk(KERN_INFO "Detected use of extended apic ids "
35 "on hypertransport bus\n");
Neil Hormanc6b48322008-01-30 13:31:25 +010036 if ((htcfg & (1 << 17)) == 0) {
Neil Horman7bcbc782008-01-30 13:31:26 +010037 printk(KERN_INFO "Enabling hypertransport extended "
38 "apic interrupt broadcast\n");
39 printk(KERN_INFO "Note this is a bios bug, "
40 "please contact your hw vendor\n");
Neil Hormanc6b48322008-01-30 13:31:25 +010041 htcfg |= (1 << 17);
42 write_pci_config(num, slot, func, 0x68, htcfg);
43 }
44 }
45
46
47}
48
49static void __init via_bugs(int num, int slot, int func)
Andi Kleendfa46982006-09-26 10:52:30 +020050{
Joerg Roedel966396d2007-10-24 12:49:48 +020051#ifdef CONFIG_GART_IOMMU
Yinghai Luc987d122008-06-24 22:14:09 -070052 if ((max_pfn > MAX_DMA32_PFN || force_iommu) &&
Joerg Roedel0440d4c2007-10-24 12:49:50 +020053 !gart_iommu_aperture_allowed) {
Andi Kleendfa46982006-09-26 10:52:30 +020054 printk(KERN_INFO
Andi Kleen54ef3402007-10-19 20:35:03 +020055 "Looks like a VIA chipset. Disabling IOMMU."
56 " Override with iommu=allowed\n");
Joerg Roedel0440d4c2007-10-24 12:49:50 +020057 gart_iommu_aperture_disabled = 1;
Andi Kleendfa46982006-09-26 10:52:30 +020058 }
59#endif
60}
61
62#ifdef CONFIG_ACPI
Jeff Garzik03d0d202007-10-27 20:57:43 +020063#ifdef CONFIG_X86_IO_APIC
Andi Kleendfa46982006-09-26 10:52:30 +020064
Alexey Starikovskiy15a58ed2007-02-02 19:48:22 +030065static int __init nvidia_hpet_check(struct acpi_table_header *header)
Andi Kleendfa46982006-09-26 10:52:30 +020066{
Andi Kleendfa46982006-09-26 10:52:30 +020067 return 0;
68}
Jeff Garzik03d0d202007-10-27 20:57:43 +020069#endif /* CONFIG_X86_IO_APIC */
70#endif /* CONFIG_ACPI */
Andi Kleendfa46982006-09-26 10:52:30 +020071
Neil Hormanc6b48322008-01-30 13:31:25 +010072static void __init nvidia_bugs(int num, int slot, int func)
Andi Kleendfa46982006-09-26 10:52:30 +020073{
74#ifdef CONFIG_ACPI
Andi Kleen54ef3402007-10-19 20:35:03 +020075#ifdef CONFIG_X86_IO_APIC
Andi Kleendfa46982006-09-26 10:52:30 +020076 /*
77 * All timer overrides on Nvidia are
78 * wrong unless HPET is enabled.
Andi Kleenfa18f472006-11-14 16:57:46 +010079 * Unfortunately that's not true on many Asus boards.
80 * We don't know yet how to detect this automatically, but
81 * at least allow a command line override.
Andi Kleendfa46982006-09-26 10:52:30 +020082 */
Andi Kleenfa18f472006-11-14 16:57:46 +010083 if (acpi_use_timer_override)
84 return;
85
Len Brownfe699332007-03-08 18:28:32 -050086 if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
Andi Kleendfa46982006-09-26 10:52:30 +020087 acpi_skip_timer_override = 1;
88 printk(KERN_INFO "Nvidia board "
89 "detected. Ignoring ACPI "
90 "timer override.\n");
Andi Kleenfa18f472006-11-14 16:57:46 +010091 printk(KERN_INFO "If you got timer trouble "
92 "try acpi_use_timer_override\n");
Andi Kleendfa46982006-09-26 10:52:30 +020093 }
94#endif
Andi Kleen54ef3402007-10-19 20:35:03 +020095#endif
Andi Kleendfa46982006-09-26 10:52:30 +020096 /* RED-PEN skip them on mptables too? */
97
98}
99
Andreas Herrmann26adcfb2008-10-14 21:01:15 +0200100#if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC)
101static u32 __init ati_ixp4x0_rev(int num, int slot, int func)
Andreas Herrmann33fb0e42008-10-07 00:11:22 +0200102{
103 u32 d;
104 u8 b;
105
106 b = read_pci_config_byte(num, slot, func, 0xac);
107 b &= ~(1<<5);
108 write_pci_config_byte(num, slot, func, 0xac, b);
109
110 d = read_pci_config(num, slot, func, 0x70);
111 d |= 1<<8;
112 write_pci_config(num, slot, func, 0x70, d);
113
114 d = read_pci_config(num, slot, func, 0x8);
115 d &= 0xff;
116 return d;
117}
118
119static void __init ati_bugs(int num, int slot, int func)
120{
Andreas Herrmann33fb0e42008-10-07 00:11:22 +0200121 u32 d;
122 u8 b;
123
124 if (acpi_use_timer_override)
125 return;
126
127 d = ati_ixp4x0_rev(num, slot, func);
128 if (d < 0x82)
129 acpi_skip_timer_override = 1;
130 else {
131 /* check for IRQ0 interrupt swap */
132 outb(0x72, 0xcd6); b = inb(0xcd7);
133 if (!(b & 0x2))
134 acpi_skip_timer_override = 1;
135 }
136
137 if (acpi_skip_timer_override) {
138 printk(KERN_INFO "SB4X0 revision 0x%x\n", d);
139 printk(KERN_INFO "Ignoring ACPI timer override.\n");
140 printk(KERN_INFO "If you got timer trouble "
141 "try acpi_use_timer_override\n");
142 }
Andreas Herrmann33fb0e42008-10-07 00:11:22 +0200143}
144
Andreas Herrmann26adcfb2008-10-14 21:01:15 +0200145static u32 __init ati_sbx00_rev(int num, int slot, int func)
146{
Andreas Herrmann7f74f8f2011-02-24 15:53:46 +0100147 u32 d;
Andreas Herrmann26adcfb2008-10-14 21:01:15 +0200148
Andreas Herrmann26adcfb2008-10-14 21:01:15 +0200149 d = read_pci_config(num, slot, func, 0x8);
150 d &= 0xff;
Andreas Herrmann26adcfb2008-10-14 21:01:15 +0200151
152 return d;
153}
154
155static void __init ati_bugs_contd(int num, int slot, int func)
156{
157 u32 d, rev;
158
Andreas Herrmann7f74f8f2011-02-24 15:53:46 +0100159 rev = ati_sbx00_rev(num, slot, func);
160 if (rev >= 0x40)
161 acpi_fix_pin2_polarity = 1;
162
Andreas Herrmann1d3e09a2011-03-15 15:31:37 +0100163 /*
164 * SB600: revisions 0x11, 0x12, 0x13, 0x14, ...
165 * SB700: revisions 0x39, 0x3a, ...
166 * SB800: revisions 0x40, 0x41, ...
167 */
168 if (rev >= 0x39)
Andreas Herrmann26adcfb2008-10-14 21:01:15 +0200169 return;
170
Andreas Herrmann7f74f8f2011-02-24 15:53:46 +0100171 if (acpi_use_timer_override)
Andreas Herrmann26adcfb2008-10-14 21:01:15 +0200172 return;
173
174 /* check for IRQ0 interrupt swap */
175 d = read_pci_config(num, slot, func, 0x64);
176 if (!(d & (1<<14)))
177 acpi_skip_timer_override = 1;
178
179 if (acpi_skip_timer_override) {
180 printk(KERN_INFO "SB600 revision 0x%x\n", rev);
181 printk(KERN_INFO "Ignoring ACPI timer override.\n");
182 printk(KERN_INFO "If you got timer trouble "
183 "try acpi_use_timer_override\n");
184 }
185}
186#else
187static void __init ati_bugs(int num, int slot, int func)
188{
189}
190
191static void __init ati_bugs_contd(int num, int slot, int func)
192{
193}
194#endif
195
Neil Horman03bbcb22013-04-16 16:38:32 -0400196static void __init intel_remapping_check(int num, int slot, int func)
197{
198 u8 revision;
199
200 revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
201
202 /*
203 * Revision 0x13 of this chipset supports irq remapping
204 * but has an erratum that breaks its behavior, flag it as such
205 */
206 if (revision == 0x13)
207 set_irq_remapping_broken();
208
209}
210
Neil Hormanc6b48322008-01-30 13:31:25 +0100211#define QFLAG_APPLY_ONCE 0x1
212#define QFLAG_APPLIED 0x2
213#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
Andi Kleendfa46982006-09-26 10:52:30 +0200214struct chipset {
Neil Hormanc6b48322008-01-30 13:31:25 +0100215 u32 vendor;
216 u32 device;
217 u32 class;
218 u32 class_mask;
219 u32 flags;
220 void (*f)(int num, int slot, int func);
Andi Kleendfa46982006-09-26 10:52:30 +0200221};
222
Andi Kleen8659c402009-01-09 12:17:39 -0800223/*
224 * Only works for devices on the root bus. If you add any devices
225 * not on bus 0 readd another loop level in early_quirks(). But
226 * be careful because at least the Nvidia quirk here relies on
227 * only matching on bus 0.
228 */
Andrew Mortonc993c732007-04-08 16:04:03 -0700229static struct chipset early_qrk[] __initdata = {
Neil Hormanc6b48322008-01-30 13:31:25 +0100230 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
231 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
232 { PCI_VENDOR_ID_VIA, PCI_ANY_ID,
233 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
Neil Hormanc6b48322008-01-30 13:31:25 +0100234 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
235 PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
Andreas Herrmann33fb0e42008-10-07 00:11:22 +0200236 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS,
237 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
Andreas Herrmann26adcfb2008-10-14 21:01:15 +0200238 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
239 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
Neil Horman03bbcb22013-04-16 16:38:32 -0400240 { PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST,
241 PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
242 { PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST,
243 PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
Andi Kleendfa46982006-09-26 10:52:30 +0200244 {}
245};
246
Jesse Barnes15650a22008-06-16 15:29:45 -0700247/**
248 * check_dev_quirk - apply early quirks to a given PCI device
249 * @num: bus number
250 * @slot: slot number
251 * @func: PCI function
252 *
253 * Check the vendor & device ID against the early quirks table.
254 *
255 * If the device is single function, let early_quirks() know so we don't
256 * poke at this device again.
257 */
258static int __init check_dev_quirk(int num, int slot, int func)
Neil Horman7bcbc782008-01-30 13:31:26 +0100259{
260 u16 class;
261 u16 vendor;
262 u16 device;
263 u8 type;
264 int i;
265
266 class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);
267
268 if (class == 0xffff)
Jesse Barnes15650a22008-06-16 15:29:45 -0700269 return -1; /* no class, treat as single function */
Neil Horman7bcbc782008-01-30 13:31:26 +0100270
271 vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID);
272
273 device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
274
275 for (i = 0; early_qrk[i].f != NULL; i++) {
276 if (((early_qrk[i].vendor == PCI_ANY_ID) ||
277 (early_qrk[i].vendor == vendor)) &&
278 ((early_qrk[i].device == PCI_ANY_ID) ||
279 (early_qrk[i].device == device)) &&
280 (!((early_qrk[i].class ^ class) &
281 early_qrk[i].class_mask))) {
282 if ((early_qrk[i].flags &
283 QFLAG_DONE) != QFLAG_DONE)
284 early_qrk[i].f(num, slot, func);
285 early_qrk[i].flags |= QFLAG_APPLIED;
286 }
287 }
288
289 type = read_pci_config_byte(num, slot, func,
290 PCI_HEADER_TYPE);
291 if (!(type & 0x80))
Jesse Barnes15650a22008-06-16 15:29:45 -0700292 return -1;
293
294 return 0;
Neil Horman7bcbc782008-01-30 13:31:26 +0100295}
296
Andi Kleendfa46982006-09-26 10:52:30 +0200297void __init early_quirks(void)
298{
Andi Kleen8659c402009-01-09 12:17:39 -0800299 int slot, func;
Andi Kleen0637a702006-09-26 10:52:41 +0200300
301 if (!early_pci_allowed())
302 return;
303
Andi Kleendfa46982006-09-26 10:52:30 +0200304 /* Poor man's PCI discovery */
Andi Kleen8659c402009-01-09 12:17:39 -0800305 /* Only scan the root bus */
306 for (slot = 0; slot < 32; slot++)
307 for (func = 0; func < 8; func++) {
308 /* Only probe function 0 on single fn devices */
309 if (check_dev_quirk(0, slot, func))
310 break;
311 }
Andi Kleendfa46982006-09-26 10:52:30 +0200312}