Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/sh/mm/tlb-sh3.c |
| 3 | * |
| 4 | * SH-3 specific TLB operations |
| 5 | * |
| 6 | * Copyright (C) 1999 Niibe Yutaka |
| 7 | * Copyright (C) 2002 Paul Mundt |
| 8 | * |
| 9 | * Released under the terms of the GNU GPL v2.0. |
| 10 | */ |
Paul Mundt | 26b7a78 | 2006-12-28 10:31:48 +0900 | [diff] [blame] | 11 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <asm/system.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | #include <asm/mmu_context.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | |
Paul Mundt | ea9af69 | 2006-12-25 19:28:54 +0900 | [diff] [blame^] | 15 | void local_flush_tlb_one(unsigned long asid, unsigned long page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | { |
| 17 | unsigned long addr, data; |
| 18 | int i, ways = MMU_NTLB_WAYS; |
| 19 | |
| 20 | /* |
| 21 | * NOTE: PTEH.ASID should be set to this MM |
| 22 | * _AND_ we need to write ASID to the array. |
| 23 | * |
| 24 | * It would be simple if we didn't need to set PTEH.ASID... |
| 25 | */ |
| 26 | addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000); |
| 27 | data = (page & 0xfffe0000) | asid; /* VALID bit is off */ |
Paul Mundt | 0d6d82b | 2005-11-07 00:58:28 -0800 | [diff] [blame] | 28 | |
Paul Mundt | 11c1965 | 2006-12-25 10:19:56 +0900 | [diff] [blame] | 29 | if ((current_cpu_data.flags & CPU_HAS_MMU_PAGE_ASSOC)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | addr |= MMU_PAGE_ASSOC_BIT; |
| 31 | ways = 1; /* we already know the way .. */ |
| 32 | } |
| 33 | |
| 34 | for (i = 0; i < ways; i++) |
| 35 | ctrl_outl(data, addr + (i << 8)); |
| 36 | } |