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review.evervolv.com / android_kernel_oneplus_msm8996 / eb5e76ffd4e626655944e99bb85b07e17172620d / . / arch / arm / boot / dts / at91sam9g20.dtsi
blob: dd5d114a0e1dc428c34cbd7315988836f209b1d6 [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]1/*
2 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G20 family SoC";
15 compatible = "atmel,at91sam9g20";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
24 serial5 = &usart4;
25 serial6 = &usart5;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]29 tcb0 = &tcb0;
30 tcb1 = &tcb1;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]31 };
32 cpus {
33 cpu@0 {
34 compatible = "arm,arm926ejs";
35 };
36 };
37
38 memory@20000000 {
39 reg = <0x20000000 0x08000000>;
40 };
41
42 ahb {
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 ranges;
47
48 apb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 aic: interrupt-controller@fffff000 {
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]55 #interrupt-cells = <2>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]56 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller;
58 interrupt-parent;
59 reg = <0xfffff000 0x200>;
60 };
61
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +0800[diff] [blame^]62 pmc: pmc@fffffc00 {
63 compatible = "atmel,at91rm9200-pmc";
64 reg = <0xfffffc00 0x100>;
65 };
66
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +0100[diff] [blame]67 pit: timer@fffffd30 {
68 compatible = "atmel,at91sam9260-pit";
69 reg = <0xfffffd30 0xf>;
70 interrupts = <1 4>;
71 };
72
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]73 tcb0: timer@fffa0000 {
74 compatible = "atmel,at91rm9200-tcb";
75 reg = <0xfffa0000 0x100>;
76 interrupts = <17 4 18 4 19 4>;
77 };
78
79 tcb1: timer@fffdc000 {
80 compatible = "atmel,at91rm9200-tcb";
81 reg = <0xfffdc000 0x100>;
82 interrupts = <26 4 27 4 28 4>;
83 };
84
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]85 pioA: gpio@fffff400 {
86 compatible = "atmel,at91rm9200-gpio";
87 reg = <0xfffff400 0x100>;
88 interrupts = <2 4>;
89 #gpio-cells = <2>;
90 gpio-controller;
91 interrupt-controller;
92 };
93
94 pioB: gpio@fffff600 {
95 compatible = "atmel,at91rm9200-gpio";
96 reg = <0xfffff600 0x100>;
97 interrupts = <3 4>;
98 #gpio-cells = <2>;
99 gpio-controller;
100 interrupt-controller;
101 };
102
103 pioC: gpio@fffff800 {
104 compatible = "atmel,at91rm9200-gpio";
105 reg = <0xfffff800 0x100>;
106 interrupts = <4 4>;
107 #gpio-cells = <2>;
108 gpio-controller;
109 interrupt-controller;
110 };
111
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]112 dbgu: serial@fffff200 {
113 compatible = "atmel,at91sam9260-usart";
114 reg = <0xfffff200 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]115 interrupts = <1 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]116 status = "disabled";
117 };
118
119 usart0: serial@fffb0000 {
120 compatible = "atmel,at91sam9260-usart";
121 reg = <0xfffb0000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]122 interrupts = <6 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]123 atmel,use-dma-rx;
124 atmel,use-dma-tx;
125 status = "disabled";
126 };
127
128 usart1: serial@fffb4000 {
129 compatible = "atmel,at91sam9260-usart";
130 reg = <0xfffb4000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]131 interrupts = <7 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]132 atmel,use-dma-rx;
133 atmel,use-dma-tx;
134 status = "disabled";
135 };
136
137 usart2: serial@fffb8000 {
138 compatible = "atmel,at91sam9260-usart";
139 reg = <0xfffb8000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]140 interrupts = <8 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]141 atmel,use-dma-rx;
142 atmel,use-dma-tx;
143 status = "disabled";
144 };
145
146 usart3: serial@fffd0000 {
147 compatible = "atmel,at91sam9260-usart";
148 reg = <0xfffd0000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]149 interrupts = <23 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]150 atmel,use-dma-rx;
151 atmel,use-dma-tx;
152 status = "disabled";
153 };
154
155 usart4: serial@fffd4000 {
156 compatible = "atmel,at91sam9260-usart";
157 reg = <0xfffd4000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]158 interrupts = <24 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]159 atmel,use-dma-rx;
160 atmel,use-dma-tx;
161 status = "disabled";
162 };
163
164 usart5: serial@fffd8000 {
165 compatible = "atmel,at91sam9260-usart";
166 reg = <0xfffd8000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]167 interrupts = <25 4>;
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]168 atmel,use-dma-rx;
169 atmel,use-dma-tx;
170 status = "disabled";
171 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]172
173 macb0: ethernet@fffc4000 {
174 compatible = "cdns,at32ap7000-macb", "cdns,macb";
175 reg = <0xfffc4000 0x100>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]176 interrupts = <21 4>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]177 status = "disabled";
178 };
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]179 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800[diff] [blame]180
181 nand0: nand@40000000 {
182 compatible = "atmel,at91rm9200-nand";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 reg = <0x40000000 0x10000000
186 0xffffe800 0x200
187 >;
188 atmel,nand-addr-offset = <21>;
189 atmel,nand-cmd-offset = <22>;
190 gpios = <&pioC 13 0
191 &pioC 14 0
192 0
193 >;
194 status = "disabled";
195 };
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]196 };
Jean-Christophe PLAGNIOL-VILLARD3b3f8282012-02-05 18:25:33 +0800[diff] [blame]197
198 i2c@0 {
199 compatible = "i2c-gpio";
200 gpios = <&pioA 23 0 /* sda */
201 &pioA 24 0 /* scl */
202 >;
203 i2c-gpio,sda-open-drain;
204 i2c-gpio,scl-open-drain;
205 i2c-gpio,delay-us = <2>; /* ~100 kHz */
206 #address-cells = <1>;
207 #size-cells = <0>;
208 status = "disabled";
209 };
Jean-Christophe PLAGNIOL-VILLARDfea31582011-10-14 09:40:52 +0800[diff] [blame]210};