| Magnus Damm | fae4339 | 2009-11-27 07:38:01 +0000 | [diff] [blame] | 1 | /* | 
 | 2 |  * SuperH Pin Function Controller Support | 
 | 3 |  * | 
 | 4 |  * Copyright (c) 2008 Magnus Damm | 
 | 5 |  * | 
 | 6 |  * This file is subject to the terms and conditions of the GNU General Public | 
 | 7 |  * License.  See the file "COPYING" in the main directory of this archive | 
 | 8 |  * for more details. | 
 | 9 |  */ | 
 | 10 |  | 
 | 11 | #ifndef __SH_PFC_H | 
 | 12 | #define __SH_PFC_H | 
 | 13 |  | 
 | 14 | #include <asm-generic/gpio.h> | 
 | 15 |  | 
 | 16 | typedef unsigned short pinmux_enum_t; | 
 | 17 | typedef unsigned short pinmux_flag_t; | 
 | 18 |  | 
 | 19 | #define PINMUX_TYPE_NONE            0 | 
 | 20 | #define PINMUX_TYPE_FUNCTION        1 | 
 | 21 | #define PINMUX_TYPE_GPIO            2 | 
 | 22 | #define PINMUX_TYPE_OUTPUT          3 | 
 | 23 | #define PINMUX_TYPE_INPUT           4 | 
 | 24 | #define PINMUX_TYPE_INPUT_PULLUP    5 | 
 | 25 | #define PINMUX_TYPE_INPUT_PULLDOWN  6 | 
 | 26 |  | 
 | 27 | #define PINMUX_FLAG_TYPE            (0x7) | 
 | 28 | #define PINMUX_FLAG_WANT_PULLUP     (1 << 3) | 
 | 29 | #define PINMUX_FLAG_WANT_PULLDOWN   (1 << 4) | 
 | 30 |  | 
 | 31 | #define PINMUX_FLAG_DBIT_SHIFT      5 | 
 | 32 | #define PINMUX_FLAG_DBIT            (0x1f << PINMUX_FLAG_DBIT_SHIFT) | 
 | 33 | #define PINMUX_FLAG_DREG_SHIFT      10 | 
 | 34 | #define PINMUX_FLAG_DREG            (0x3f << PINMUX_FLAG_DREG_SHIFT) | 
 | 35 |  | 
 | 36 | struct pinmux_gpio { | 
 | 37 | 	pinmux_enum_t enum_id; | 
 | 38 | 	pinmux_flag_t flags; | 
 | 39 | }; | 
 | 40 |  | 
 | 41 | #define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark } | 
 | 42 | #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0 | 
 | 43 |  | 
 | 44 | struct pinmux_cfg_reg { | 
 | 45 | 	unsigned long reg, reg_width, field_width; | 
 | 46 | 	unsigned long *cnt; | 
 | 47 | 	pinmux_enum_t *enum_ids; | 
 | 48 | }; | 
 | 49 |  | 
 | 50 | #define PINMUX_CFG_REG(name, r, r_width, f_width) \ | 
 | 51 | 	.reg = r, .reg_width = r_width, .field_width = f_width,		\ | 
 | 52 | 	.cnt = (unsigned long [r_width / f_width]) {}, \ | 
 | 53 | 	.enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \ | 
 | 54 |  | 
 | 55 | struct pinmux_data_reg { | 
 | 56 | 	unsigned long reg, reg_width, reg_shadow; | 
 | 57 | 	pinmux_enum_t *enum_ids; | 
 | 58 | }; | 
 | 59 |  | 
 | 60 | #define PINMUX_DATA_REG(name, r, r_width) \ | 
 | 61 | 	.reg = r, .reg_width = r_width,	\ | 
 | 62 | 	.enum_ids = (pinmux_enum_t [r_width]) \ | 
 | 63 |  | 
 | 64 | struct pinmux_range { | 
 | 65 | 	pinmux_enum_t begin; | 
 | 66 | 	pinmux_enum_t end; | 
 | 67 | 	pinmux_enum_t force; | 
 | 68 | }; | 
 | 69 |  | 
 | 70 | struct pinmux_info { | 
 | 71 | 	char *name; | 
 | 72 | 	pinmux_enum_t reserved_id; | 
 | 73 | 	struct pinmux_range data; | 
 | 74 | 	struct pinmux_range input; | 
 | 75 | 	struct pinmux_range input_pd; | 
 | 76 | 	struct pinmux_range input_pu; | 
 | 77 | 	struct pinmux_range output; | 
 | 78 | 	struct pinmux_range mark; | 
 | 79 | 	struct pinmux_range function; | 
 | 80 |  | 
 | 81 | 	unsigned first_gpio, last_gpio; | 
 | 82 |  | 
 | 83 | 	struct pinmux_gpio *gpios; | 
 | 84 | 	struct pinmux_cfg_reg *cfg_regs; | 
 | 85 | 	struct pinmux_data_reg *data_regs; | 
 | 86 |  | 
 | 87 | 	pinmux_enum_t *gpio_data; | 
 | 88 | 	unsigned int gpio_data_size; | 
 | 89 |  | 
 | 90 | 	unsigned long *gpio_in_use; | 
 | 91 | 	struct gpio_chip chip; | 
 | 92 | }; | 
 | 93 |  | 
 | 94 | int register_pinmux(struct pinmux_info *pip); | 
 | 95 |  | 
 | 96 | #endif /* __SH_PFC_H */ |