| Barry Song | eb8b8f2 | 2012-12-20 16:51:31 +0800 | [diff] [blame^] | 1 | * Clock bindings for CSR SiRFprimaII |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: Should be "sirf,prima2-clkc" |
| 5 | - reg: Address and length of the register set |
| 6 | - interrupts: Should contain clock controller interrupt |
| 7 | - #clock-cells: Should be <1> |
| 8 | |
| 9 | The clock consumer should specify the desired clock by having the clock |
| 10 | ID in its "clocks" phandle cell. The following is a full list of prima2 |
| 11 | clocks and IDs. |
| 12 | |
| 13 | Clock ID |
| 14 | --------------------------- |
| 15 | rtc 0 |
| 16 | osc 1 |
| 17 | pll1 2 |
| 18 | pll2 3 |
| 19 | pll3 4 |
| 20 | mem 5 |
| 21 | sys 6 |
| 22 | security 7 |
| 23 | dsp 8 |
| 24 | gps 9 |
| 25 | mf 10 |
| 26 | io 11 |
| 27 | cpu 12 |
| 28 | uart0 13 |
| 29 | uart1 14 |
| 30 | uart2 15 |
| 31 | tsc 16 |
| 32 | i2c0 17 |
| 33 | i2c1 18 |
| 34 | spi0 19 |
| 35 | spi1 20 |
| 36 | pwmc 21 |
| 37 | efuse 22 |
| 38 | pulse 23 |
| 39 | dmac0 24 |
| 40 | dmac1 25 |
| 41 | nand 26 |
| 42 | audio 27 |
| 43 | usp0 28 |
| 44 | usp1 29 |
| 45 | usp2 30 |
| 46 | vip 31 |
| 47 | gfx 32 |
| 48 | mm 33 |
| 49 | lcd 34 |
| 50 | vpp 35 |
| 51 | mmc01 36 |
| 52 | mmc23 37 |
| 53 | mmc45 38 |
| 54 | usbpll 39 |
| 55 | usb0 40 |
| 56 | usb1 41 |
| 57 | |
| 58 | Examples: |
| 59 | |
| 60 | clks: clock-controller@88000000 { |
| 61 | compatible = "sirf,prima2-clkc"; |
| 62 | reg = <0x88000000 0x1000>; |
| 63 | interrupts = <3>; |
| 64 | #clock-cells = <1>; |
| 65 | }; |
| 66 | |
| 67 | i2c0: i2c@b00e0000 { |
| 68 | cell-index = <0>; |
| 69 | compatible = "sirf,prima2-i2c"; |
| 70 | reg = <0xb00e0000 0x10000>; |
| 71 | interrupts = <24>; |
| 72 | clocks = <&clks 17>; |
| 73 | }; |