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Rabin Vincentfe052032011-02-11 17:07:21 -07001/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL) version 2
5 */
6
7#include <linux/kernel.h>
8#include <linux/init.h>
Paul Gortmaker50af5ea2012-01-20 18:35:53 -05009#include <linux/bug.h>
Linus Walleij1baa5742012-04-19 18:27:38 +020010#include <linux/string.h>
Linus Walleijed781d32012-05-03 00:44:52 +020011#include <linux/pinctrl/machine.h>
Rabin Vincentfe052032011-02-11 17:07:21 -070012
Bibek Basu4bc3a692011-02-15 10:46:59 +010013#include <asm/mach-types.h>
Rabin Vincentfe052032011-02-11 17:07:21 -070014#include <plat/pincfg.h>
Linus Walleij0f332862011-08-22 08:33:30 +010015#include <plat/gpio-nomadik.h>
Linus Walleij1baa5742012-04-19 18:27:38 +020016
Rabin Vincentfe052032011-02-11 17:07:21 -070017#include <mach/hardware.h>
18
19#include "pins-db8500.h"
Rabin Vincent339bcf32012-04-17 13:35:31 +020020#include "pins.h"
Linus Walleij1baa5742012-04-19 18:27:38 +020021#include "board-mop500.h"
22
23enum custom_pin_cfg_t {
24 PINS_FOR_DEFAULT,
25 PINS_FOR_U9500,
26};
27
28static enum custom_pin_cfg_t pinsfor;
Rabin Vincentfe052032011-02-11 17:07:21 -070029
Linus Walleijed781d32012-05-03 00:44:52 +020030/* These simply sets bias for pins */
31#define BIAS(a,b) static unsigned long a[] = { b }
Bibek Basu4bc3a692011-02-15 10:46:59 +010032
Linus Walleijed781d32012-05-03 00:44:52 +020033BIAS(pd, PIN_PULL_DOWN);
34BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
35BIAS(in_nopull, PIN_INPUT_NOPULL);
36BIAS(in_pu, PIN_INPUT_PULLUP);
37BIAS(in_pd, PIN_INPUT_PULLDOWN);
38BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);
39BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);
40BIAS(out_hi, PIN_OUTPUT_HIGH);
41BIAS(out_lo, PIN_OUTPUT_LOW);
42/* These also force them into GPIO mode */
43BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
44BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
45BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
46BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
47BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
48BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
Bibek Basu4bc3a692011-02-15 10:46:59 +010049
Linus Walleijed781d32012-05-03 00:44:52 +020050/* We use these to define hog settings that are always done on boot */
51#define DB8500_MUX_HOG(group,func) \
52 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
53#define DB8500_PIN_HOG(pin,conf) \
54 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
Linus Walleij1baa5742012-04-19 18:27:38 +020055
Linus Walleijed781d32012-05-03 00:44:52 +020056/* These are default states associated with device and changed runtime */
57#define DB8500_MUX(group,func,dev) \
58 PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
59#define DB8500_PIN(pin,conf,dev) \
60 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
Bibek Basu4bc3a692011-02-15 10:46:59 +010061
Linus Walleijed781d32012-05-03 00:44:52 +020062/* Pin control settings */
63static struct pinctrl_map __initdata mop500_family_pinmap[] = {
64 /*
65 * uMSP0, mux in 4 pins, regular placement of RX/TX
66 * explicitly set the pins to no pull
Shreshtha Kumar Sahu1a7d4362011-06-13 10:11:44 +020067 */
Linus Walleijed781d32012-05-03 00:44:52 +020068 DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),
69 DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),
70 DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */
71 DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */
72 DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */
73 DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */
74 /* MSP2 for HDMI, pull down TXD, TCK, TFS */
75 DB8500_MUX_HOG("msp2_a_1", "msp2"),
76 DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */
77 DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */
78 DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */
79 DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */
80 /*
81 * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to
82 * pull-up
83 * TODO: is this really correct? Snowball doesn't have a LCD.
84 */
85 DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),
86 DB8500_PIN_HOG("GPIO68_E1", in_pu),
87 DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),
88 /*
89 * STMPE1601/tc35893 keypad IRQ GPIO 218
90 * TODO: set for snowball and HREF really??
91 */
92 DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),
93 /*
94 * UART0, we do not mux in u0 here.
95 * uart-0 pins gpio configuration should be kept intact to prevent
96 * a glitch in tx line when the tty dev is opened. Later these pins
97 * are configured to uart mop500_pins_uart0
98 */
99 DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
100 DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
101 DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */
102 DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */
103 /*
104 * Mux in UART2 on altfunction C and set pull-ups.
105 * TODO: is this used on U8500 variants and Snowball really?
106 * The setting on GPIO31 conflicts with magnetometer use on hrefv60
107 */
108 DB8500_MUX_HOG("u2rxtx_c_1", "u2"),
109 DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),
110 DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */
111 DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */
112 DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */
113 DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */
114 /*
115 * The following pin sets were known as "runtime pins" before being
116 * converted to the pinctrl model. Here we model them as "default"
117 * states.
118 */
119 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
120 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
121 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
122 /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
123 DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"),
124 /* Mux in I2C blocks, put pins into GPIO in sleepmode no pull-up */
125 DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
126 DB8500_PIN("GPIO147_C15", slpm_gpio_nopull, "nmk-i2c.0"),
127 DB8500_PIN("GPIO148_B16", slpm_gpio_nopull, "nmk-i2c.0"),
128 DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
129 DB8500_PIN("GPIO16_AD3", slpm_gpio_nopull, "nmk-i2c.1"),
130 DB8500_PIN("GPIO17_AD4", slpm_gpio_nopull, "nmk-i2c.1"),
131 DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
132 DB8500_PIN("GPIO10_AF5", slpm_gpio_nopull, "nmk-i2c.2"),
133 DB8500_PIN("GPIO11_AG4", slpm_gpio_nopull, "nmk-i2c.2"),
134 DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
135 DB8500_PIN("GPIO229_AG7", slpm_gpio_nopull, "nmk-i2c.3"),
136 DB8500_PIN("GPIO230_AF7", slpm_gpio_nopull, "nmk-i2c.3"),
137 /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
138 DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
139 DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
140 DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
141 DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
142 DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
143 DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
144 DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
145 DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
146 DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
147 DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
148 DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
149 /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
150 DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
151 DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
152 DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
153 DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
154 DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
155 DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
156 DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
157 DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
158 /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
159 DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
160 DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
161 DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
162 DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
163 DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
164 DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
165 DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
166 DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
167 DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
168 DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
169 DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
170 DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
171 /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
172 DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
173 DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
174 DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
175 DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
176 DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
177 DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
178 DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
179 DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
180 DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
181 DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
182 DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
183 DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
184 /* Mux in USB pins, drive STP high */
185 DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
186 DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
187 /* Mux in SPI2 pins on the "other C1" altfunction */
188 DB8500_MUX("spi2_oc1_1", "spi2", "spi2"),
189 DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
190 DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
191 DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
192 DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
Robert Marklundc41fac82011-06-21 09:39:13 +0200193};
194
Linus Walleij1baa5742012-04-19 18:27:38 +0200195/*
Linus Walleijed781d32012-05-03 00:44:52 +0200196 * These are specifically for the MOP500 and HREFP (pre-v60) version of the
197 * board, which utilized a TC35892 GPIO expander instead of using a lot of
198 * on-chip pins as the HREFv60 and later does.
Linus Walleij1baa5742012-04-19 18:27:38 +0200199 */
Linus Walleijed781d32012-05-03 00:44:52 +0200200static struct pinctrl_map __initdata mop500_pinmap[] = {
201 /* Mux in SSP0, pull down RXD pin */
202 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
203 DB8500_PIN_HOG("GPIO145_C13", pd),
204 /*
205 * XENON Flashgun on image processor GPIO (controlled from image
206 * processor firmware), mux in these image processor GPIO lines 0
207 * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up
208 * the pins.
209 */
210 DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
211 DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
212 DB8500_PIN_HOG("GPIO6_AF6", in_pu),
213 DB8500_PIN_HOG("GPIO7_AG5", in_pu),
214 /* TC35892 IRQ, pull up the line, let the driver mux in the pin */
215 DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
216 /* Mux in UART1 and set the pull-ups */
217 DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
218 DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
219 DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
220 DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
221 DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
222 DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
223 /*
224 * Runtime stuff: make it possible to mux in the SKE keypad
225 * and bias the pins
226 */
227 DB8500_MUX("kp_a_2", "kp", "ske"),
228 DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
229 DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
230 DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
231 DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
232 DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
233 DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
234 DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
235 DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
236 DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
237 DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
238 DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
239 DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
240 DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
241 DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
242 DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
243 DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
244 /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
245 DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
246 DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
Linus Walleij1baa5742012-04-19 18:27:38 +0200247};
248
Linus Walleijed781d32012-05-03 00:44:52 +0200249/*
250 * The HREFv60 series of platforms is using available pins on the DB8500
251 * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
252 * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
253 */
254static struct pinctrl_map __initdata hrefv60_pinmap[] = {
255 /* Drive WLAN_ENA low */
256 DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
257 /*
258 * XENON Flashgun on image processor GPIO (controlled from image
259 * processor firmware), mux in these image processor GPIO lines 0
260 * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
261 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
262 * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
263 */
264 DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
265 DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
266 DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),
267 DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */
268 DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */
269 DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */
270 DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */
271 /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
272 DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
273 DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
274 /*
275 * Display Interface 1 uses GPIO 65 for RST (reset).
276 * Display Interface 2 uses GPIO 66 for RST (reset).
277 * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
278 */
279 DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */
280 DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */
281 /*
282 * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
283 * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
284 * reset signals low.
285 */
286 DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
287 DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
288 DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
289 /*
290 * Drive D19-D23 for the ETM PTM trace interface low,
291 * (presumably pins are unconnected therefore grounded here,
292 * the "other alt C1" setting enables these pins)
293 */
294 DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
295 DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
296 DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
297 DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
298 DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
299 /* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
300 DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
301 DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
302 /* NFC ENA and RESET to low, pulldown IRQ line */
303 DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
304 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
305 DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
306 /*
307 * SKE keyboard partly on alt A and partly on "Other alt C1"
308 * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three
309 * rows of 6 keys, then pull up force sensing interrup and
310 * drive reset and force sensing WU low.
311 */
312 DB8500_MUX_HOG("kp_a_1", "kp"),
313 DB8500_MUX_HOG("kp_oc1_1", "kp"),
314 DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */
315 DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */
316 DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */
317 DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */
318 DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */
319 DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */
320 DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */
321 DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */
322 DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
323 DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
324 DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
325 /* DiPro Sensor interrupt */
326 DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
327 /* Audio Amplifier HF enable */
328 DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
329 /* GBF interface, pull low to reset state */
330 DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
331 /* MSP : HDTV INTERFACE GPIO line */
332 DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
333 /* Accelerometer interrupt lines */
334 DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
335 DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
336 /* SD card detect GPIO pin */
337 DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
338 /*
339 * Runtime stuff
340 * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
341 * etc.
342 */
343 DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
344 DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
345 DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
346 /*
347 * Make it possible to mux in the SKE keypad and bias the pins
348 * FIXME: what's the point with this on HREFv60? KP/SKE is already
349 * muxed in at another place! Enabling this will bork.
350 */
351 DB8500_MUX("kp_a_2", "kp", "ske"),
352 DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
353 DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
354 DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
355 DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
356 DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
357 DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
358 DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
359 DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
360 DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
361 DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
362 DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
363 DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
364 DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
365 DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
366 DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
367 DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
Linus Walleij1baa5742012-04-19 18:27:38 +0200368};
369
Linus Walleijed781d32012-05-03 00:44:52 +0200370static struct pinctrl_map __initdata u9500_pinmap[] = {
371 /* Mux in UART1 (just RX/TX) and set the pull-ups */
372 DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
373 DB8500_PIN_HOG("GPIO4_AH6", in_pu),
374 DB8500_PIN_HOG("GPIO5_AG6", out_hi),
375 /* WLAN_IRQ line */
376 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
377 /* HSI */
378 DB8500_MUX_HOG("hsir_a_1", "hsi"),
379 DB8500_MUX_HOG("hsit_a_1", "hsi"),
380 DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
381 DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
382 DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
383 DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
384 DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
385 DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
386 DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
387 DB8500_PIN_HOG("GPIO226_AF8", out_hi), /* ACWAKE0 */
388};
389
390static struct pinctrl_map __initdata u8500_pinmap[] = {
391 DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
392 DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
393};
394
395static struct pinctrl_map __initdata snowball_pinmap[] = {
396 /* Mux in SSP0 connected to AB8500, pull down RXD pin */
397 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
398 DB8500_PIN_HOG("GPIO145_C13", pd),
399 /* Always drive the MC0 DAT31DIR line high on these boards */
400 DB8500_PIN_HOG("GPIO21_AB3", out_hi),
401 /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
402 DB8500_MUX_HOG("sm_b_1", "sm"),
403 /* Drive RSTn_LAN high */
404 DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
405 /* Accelerometer/Magnetometer */
406 DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
407 DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
408 DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
409 /* WLAN/GBF */
410 DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
411 DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
412 DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
413 DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
Linus Walleij1baa5742012-04-19 18:27:38 +0200414};
415
416/*
417 * passing "pinsfor=" in kernel cmdline allows for custom
418 * configuration of GPIOs on u8500 derived boards.
419 */
420static int __init early_pinsfor(char *p)
421{
422 pinsfor = PINS_FOR_DEFAULT;
423
424 if (strcmp(p, "u9500-21") == 0)
425 pinsfor = PINS_FOR_U9500;
426
427 return 0;
428}
429early_param("pinsfor", early_pinsfor);
430
431int pins_for_u9500(void)
432{
433 if (pinsfor == PINS_FOR_U9500)
434 return 1;
435
436 return 0;
437}
438
Linus Walleijed781d32012-05-03 00:44:52 +0200439static void __init mop500_href_family_pinmaps_init(void)
Rabin Vincentfe052032011-02-11 17:07:21 -0700440{
Linus Walleij1baa5742012-04-19 18:27:38 +0200441 switch (pinsfor) {
442 case PINS_FOR_U9500:
Linus Walleijed781d32012-05-03 00:44:52 +0200443 pinctrl_register_mappings(u9500_pinmap,
444 ARRAY_SIZE(u9500_pinmap));
Linus Walleij1baa5742012-04-19 18:27:38 +0200445 break;
Linus Walleij1baa5742012-04-19 18:27:38 +0200446 case PINS_FOR_DEFAULT:
Linus Walleijed781d32012-05-03 00:44:52 +0200447 pinctrl_register_mappings(u8500_pinmap,
448 ARRAY_SIZE(u8500_pinmap));
Linus Walleij1baa5742012-04-19 18:27:38 +0200449 default:
450 break;
451 }
Lee Jones110c2c22011-08-26 16:54:07 +0100452}
453
Linus Walleijed781d32012-05-03 00:44:52 +0200454void __init mop500_pinmaps_init(void)
Lee Jones110c2c22011-08-26 16:54:07 +0100455{
Linus Walleijed781d32012-05-03 00:44:52 +0200456 pinctrl_register_mappings(mop500_family_pinmap,
457 ARRAY_SIZE(mop500_family_pinmap));
458 pinctrl_register_mappings(mop500_pinmap,
459 ARRAY_SIZE(mop500_pinmap));
460 mop500_href_family_pinmaps_init();
Lee Jones110c2c22011-08-26 16:54:07 +0100461}
462
Linus Walleijed781d32012-05-03 00:44:52 +0200463void __init snowball_pinmaps_init(void)
Lee Jones110c2c22011-08-26 16:54:07 +0100464{
Linus Walleijed781d32012-05-03 00:44:52 +0200465 pinctrl_register_mappings(mop500_family_pinmap,
466 ARRAY_SIZE(mop500_family_pinmap));
467 pinctrl_register_mappings(snowball_pinmap,
468 ARRAY_SIZE(snowball_pinmap));
469 pinctrl_register_mappings(u8500_pinmap,
470 ARRAY_SIZE(u8500_pinmap));
471}
Lee Jones110c2c22011-08-26 16:54:07 +0100472
Linus Walleijed781d32012-05-03 00:44:52 +0200473void __init hrefv60_pinmaps_init(void)
474{
475 pinctrl_register_mappings(mop500_family_pinmap,
476 ARRAY_SIZE(mop500_family_pinmap));
477 pinctrl_register_mappings(hrefv60_pinmap,
478 ARRAY_SIZE(hrefv60_pinmap));
479 mop500_href_family_pinmaps_init();
Rabin Vincentfe052032011-02-11 17:07:21 -0700480}