| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 1 | /* | 
|  | 2 | * MSI hooks for standard x86 apic | 
|  | 3 | */ | 
|  | 4 |  | 
|  | 5 | #include <linux/pci.h> | 
|  | 6 | #include <linux/irq.h> | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 7 | #include <linux/msi.h> | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 8 | #include <linux/dmar.h> | 
| Christian Kujau | a4cffb6 | 2006-06-26 14:00:02 +0200 | [diff] [blame] | 9 | #include <asm/smp.h> | 
| Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 10 | #include <asm/msidef.h> | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 11 |  | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 12 | static struct irq_chip	ia64_msi_chip; | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 13 |  | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 14 | #ifdef CONFIG_SMP | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 15 | static int ia64_set_msi_irq_affinity(struct irq_data *idata, | 
|  | 16 | const cpumask_t *cpu_mask, bool force) | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 17 | { | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 18 | struct msi_msg msg; | 
| Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 19 | u32 addr, data; | 
| Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 20 | int cpu = first_cpu(*cpu_mask); | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 21 | unsigned int irq = idata->irq; | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 22 |  | 
| Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 23 | if (!cpu_online(cpu)) | 
| Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 24 | return -1; | 
| Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 25 |  | 
| Kenji Kaneshige | a6cd6322 | 2008-02-25 14:32:22 +0900 | [diff] [blame] | 26 | if (irq_prepare_move(irq, cpu)) | 
| Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 27 | return -1; | 
| Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 28 |  | 
| Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 29 | get_cached_msi_msg(irq, &msg); | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 30 |  | 
|  | 31 | addr = msg.address_lo; | 
| Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 32 | addr &= MSI_ADDR_DEST_ID_MASK; | 
|  | 33 | addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 34 | msg.address_lo = addr; | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 35 |  | 
| Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 36 | data = msg.data; | 
|  | 37 | data &= MSI_DATA_VECTOR_MASK; | 
|  | 38 | data |= MSI_DATA_VECTOR(irq_to_vector(irq)); | 
|  | 39 | msg.data = data; | 
|  | 40 |  | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 41 | write_msi_msg(irq, &msg); | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 42 | cpumask_copy(idata->affinity, cpumask_of(cpu)); | 
| Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 43 |  | 
|  | 44 | return 0; | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 45 | } | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 46 | #endif /* CONFIG_SMP */ | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 47 |  | 
| Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 48 | int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 49 | { | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 50 | struct msi_msg	msg; | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 51 | unsigned long	dest_phys_id; | 
| Kenji Kaneshige | 8a3a0ee | 2007-03-26 09:38:42 +0900 | [diff] [blame] | 52 | int	irq, vector; | 
| Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 53 | cpumask_t mask; | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 54 |  | 
| Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 55 | irq = create_irq(); | 
|  | 56 | if (irq < 0) | 
|  | 57 | return irq; | 
|  | 58 |  | 
| Thomas Gleixner | 53c909c | 2011-03-25 21:06:09 +0100 | [diff] [blame] | 59 | irq_set_msi_desc(irq, desc); | 
| Srivatsa S. Bhat | 7d7f984 | 2012-03-28 14:42:46 -0700 | [diff] [blame] | 60 | cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask); | 
| Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 61 | dest_phys_id = cpu_physical_id(first_cpu(mask)); | 
| Ishimatsu Yasuaki | 9438a12 | 2007-04-06 16:51:12 +0900 | [diff] [blame] | 62 | vector = irq_to_vector(irq); | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 63 |  | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 64 | msg.address_hi = 0; | 
|  | 65 | msg.address_lo = | 
| Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 66 | MSI_ADDR_HEADER | | 
| Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 67 | MSI_ADDR_DEST_MODE_PHYS | | 
| Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 68 | MSI_ADDR_REDIRECTION_CPU | | 
| Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 69 | MSI_ADDR_DEST_ID_CPU(dest_phys_id); | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 70 |  | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 71 | msg.data = | 
| Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 72 | MSI_DATA_TRIGGER_EDGE | | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 73 | MSI_DATA_LEVEL_ASSERT | | 
|  | 74 | MSI_DATA_DELIVERY_FIXED | | 
|  | 75 | MSI_DATA_VECTOR(vector); | 
|  | 76 |  | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 77 | write_msi_msg(irq, &msg); | 
| Thomas Gleixner | 53c909c | 2011-03-25 21:06:09 +0100 | [diff] [blame] | 78 | irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq); | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 79 |  | 
| Kenji Kaneshige | 3aff037 | 2007-10-30 16:01:49 +0900 | [diff] [blame] | 80 | return 0; | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 81 | } | 
|  | 82 |  | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 83 | void ia64_teardown_msi_irq(unsigned int irq) | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 84 | { | 
| Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 85 | destroy_irq(irq); | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 86 | } | 
|  | 87 |  | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 88 | static void ia64_ack_msi_irq(struct irq_data *data) | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 89 | { | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 90 | irq_complete_move(data->irq); | 
| Thomas Gleixner | 97499b2 | 2011-03-25 20:36:55 +0100 | [diff] [blame] | 91 | irq_move_irq(data); | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 92 | ia64_eoi(); | 
|  | 93 | } | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 94 |  | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 95 | static int ia64_msi_retrigger_irq(struct irq_data *data) | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 96 | { | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 97 | unsigned int vector = irq_to_vector(data->irq); | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 98 | ia64_resend_irq(vector); | 
|  | 99 |  | 
|  | 100 | return 1; | 
|  | 101 | } | 
|  | 102 |  | 
|  | 103 | /* | 
|  | 104 | * Generic ops used on most IA64 platforms. | 
|  | 105 | */ | 
|  | 106 | static struct irq_chip ia64_msi_chip = { | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 107 | .name			= "PCI-MSI", | 
|  | 108 | .irq_mask		= mask_msi_irq, | 
|  | 109 | .irq_unmask		= unmask_msi_irq, | 
|  | 110 | .irq_ack		= ia64_ack_msi_irq, | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 111 | #ifdef CONFIG_SMP | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 112 | .irq_set_affinity	= ia64_set_msi_irq_affinity, | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 113 | #endif | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 114 | .irq_retrigger		= ia64_msi_retrigger_irq, | 
| Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 115 | }; | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 116 |  | 
|  | 117 |  | 
| Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 118 | int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 119 | { | 
|  | 120 | if (platform_setup_msi_irq) | 
| Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 121 | return platform_setup_msi_irq(pdev, desc); | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 122 |  | 
| Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 123 | return ia64_setup_msi_irq(pdev, desc); | 
| Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 124 | } | 
|  | 125 |  | 
|  | 126 | void arch_teardown_msi_irq(unsigned int irq) | 
|  | 127 | { | 
|  | 128 | if (platform_teardown_msi_irq) | 
|  | 129 | return platform_teardown_msi_irq(irq); | 
|  | 130 |  | 
|  | 131 | return ia64_teardown_msi_irq(irq); | 
|  | 132 | } | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 133 |  | 
| Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 134 | #ifdef CONFIG_INTEL_IOMMU | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 135 | #ifdef CONFIG_SMP | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 136 | static int dmar_msi_set_affinity(struct irq_data *data, | 
|  | 137 | const struct cpumask *mask, bool force) | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 138 | { | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 139 | unsigned int irq = data->irq; | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 140 | struct irq_cfg *cfg = irq_cfg + irq; | 
|  | 141 | struct msi_msg msg; | 
| Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 142 | int cpu = cpumask_first(mask); | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 143 |  | 
|  | 144 | if (!cpu_online(cpu)) | 
| Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 145 | return -1; | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 146 |  | 
|  | 147 | if (irq_prepare_move(irq, cpu)) | 
| Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 148 | return -1; | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 149 |  | 
|  | 150 | dmar_msi_read(irq, &msg); | 
|  | 151 |  | 
|  | 152 | msg.data &= ~MSI_DATA_VECTOR_MASK; | 
|  | 153 | msg.data |= MSI_DATA_VECTOR(cfg->vector); | 
| Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 154 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; | 
|  | 155 | msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 156 |  | 
|  | 157 | dmar_msi_write(irq, &msg); | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 158 | cpumask_copy(data->affinity, mask); | 
| Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 159 |  | 
|  | 160 | return 0; | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 161 | } | 
|  | 162 | #endif /* CONFIG_SMP */ | 
|  | 163 |  | 
| Jaswinder Singh Rajput | 9542b21 | 2009-06-10 12:45:01 -0700 | [diff] [blame] | 164 | static struct irq_chip dmar_msi_type = { | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 165 | .name = "DMAR_MSI", | 
| Thomas Gleixner | 5c2837f | 2010-09-28 17:15:11 +0200 | [diff] [blame] | 166 | .irq_unmask = dmar_msi_unmask, | 
|  | 167 | .irq_mask = dmar_msi_mask, | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 168 | .irq_ack = ia64_ack_msi_irq, | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 169 | #ifdef CONFIG_SMP | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 170 | .irq_set_affinity = dmar_msi_set_affinity, | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 171 | #endif | 
| Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 172 | .irq_retrigger = ia64_msi_retrigger_irq, | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 173 | }; | 
|  | 174 |  | 
|  | 175 | static int | 
|  | 176 | msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) | 
|  | 177 | { | 
|  | 178 | struct irq_cfg *cfg = irq_cfg + irq; | 
|  | 179 | unsigned dest; | 
|  | 180 | cpumask_t mask; | 
|  | 181 |  | 
| Srivatsa S. Bhat | 7d7f984 | 2012-03-28 14:42:46 -0700 | [diff] [blame] | 182 | cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask); | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 183 | dest = cpu_physical_id(first_cpu(mask)); | 
|  | 184 |  | 
|  | 185 | msg->address_hi = 0; | 
|  | 186 | msg->address_lo = | 
|  | 187 | MSI_ADDR_HEADER | | 
| Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 188 | MSI_ADDR_DEST_MODE_PHYS | | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 189 | MSI_ADDR_REDIRECTION_CPU | | 
| Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 190 | MSI_ADDR_DEST_ID_CPU(dest); | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 191 |  | 
|  | 192 | msg->data = | 
|  | 193 | MSI_DATA_TRIGGER_EDGE | | 
|  | 194 | MSI_DATA_LEVEL_ASSERT | | 
|  | 195 | MSI_DATA_DELIVERY_FIXED | | 
|  | 196 | MSI_DATA_VECTOR(cfg->vector); | 
|  | 197 | return 0; | 
|  | 198 | } | 
|  | 199 |  | 
|  | 200 | int arch_setup_dmar_msi(unsigned int irq) | 
|  | 201 | { | 
|  | 202 | int ret; | 
|  | 203 | struct msi_msg msg; | 
|  | 204 |  | 
|  | 205 | ret = msi_compose_msg(NULL, irq, &msg); | 
|  | 206 | if (ret < 0) | 
|  | 207 | return ret; | 
|  | 208 | dmar_msi_write(irq, &msg); | 
| Thomas Gleixner | 53c909c | 2011-03-25 21:06:09 +0100 | [diff] [blame] | 209 | irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, | 
|  | 210 | "edge"); | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 211 | return 0; | 
|  | 212 | } | 
| Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 213 | #endif /* CONFIG_INTEL_IOMMU */ | 
| Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 214 |  |