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Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001/*
2 * cx18 driver internal defines and structures
3 *
4 * Derived from ivtv-driver.h
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
Andy Walls1ed9dcc2008-11-22 01:37:34 -03007 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#ifndef CX18_DRIVER_H
26#define CX18_DRIVER_H
27
28#include <linux/version.h>
29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/sched.h>
34#include <linux/fs.h>
35#include <linux/pci.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/i2c.h>
39#include <linux/i2c-algo-bit.h>
40#include <linux/list.h>
41#include <linux/unistd.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030042#include <linux/pagemap.h>
43#include <linux/workqueue.h>
44#include <linux/mutex.h>
Harvey Harrison1a651a02008-10-18 20:28:37 -070045#include <asm/byteorder.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030046
47#include <linux/dvb/video.h>
48#include <linux/dvb/audio.h>
49#include <media/v4l2-common.h>
Hans Verkuil35ea11f2008-07-20 08:12:02 -030050#include <media/v4l2-ioctl.h>
Andy Walls888cdb02009-01-11 15:08:53 -030051#include <media/v4l2-device.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030052#include <media/tuner.h>
Andy Walls83526192009-11-21 13:39:28 -030053#include <media/ir-kbd-i2c.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030054#include "cx18-mailbox.h"
55#include "cx18-av-core.h"
56#include "cx23418.h"
57
58/* DVB */
59#include "demux.h"
60#include "dmxdev.h"
61#include "dvb_demux.h"
62#include "dvb_frontend.h"
63#include "dvb_net.h"
64#include "dvbdev.h"
65
66#ifndef CONFIG_PCI
67# error "This driver requires kernel PCI support."
68#endif
69
70#define CX18_MEM_OFFSET 0x00000000
71#define CX18_MEM_SIZE 0x04000000
72#define CX18_REG_OFFSET 0x02000000
73
74/* Maximum cx18 driver instances. */
75#define CX18_MAX_CARDS 32
76
77/* Supported cards */
78#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
79#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
80#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
81#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
Sri Deevi03c28082008-06-21 11:06:44 -030082#define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */
Andy Walls9eee4fb2008-10-04 20:28:40 -030083#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/
Andy Walls9d5af862009-06-09 20:37:24 -030084#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */
85#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */
86#define CX18_CARD_LAST 7
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030087
88#define CX18_ENC_STREAM_TYPE_MPG 0
89#define CX18_ENC_STREAM_TYPE_TS 1
90#define CX18_ENC_STREAM_TYPE_YUV 2
91#define CX18_ENC_STREAM_TYPE_VBI 3
92#define CX18_ENC_STREAM_TYPE_PCM 4
93#define CX18_ENC_STREAM_TYPE_IDX 5
94#define CX18_ENC_STREAM_TYPE_RAD 6
95#define CX18_MAX_STREAMS 7
96
97/* system vendor and device IDs */
98#define PCI_VENDOR_ID_CX 0x14f1
99#define PCI_DEVICE_ID_CX23418 0x5b7a
100
101/* subsystem vendor ID */
102#define CX18_PCI_ID_HAUPPAUGE 0x0070
103#define CX18_PCI_ID_COMPRO 0x185b
104#define CX18_PCI_ID_YUAN 0x12ab
Sri Deevi03c28082008-06-21 11:06:44 -0300105#define CX18_PCI_ID_CONEXANT 0x14f1
Andy Walls9eee4fb2008-10-04 20:28:40 -0300106#define CX18_PCI_ID_TOSHIBA 0x1179
107#define CX18_PCI_ID_LEADTEK 0x107D
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300108
109/* ======================================================================== */
110/* ========================== START USER SETTABLE DMA VARIABLES =========== */
111/* ======================================================================== */
112
113/* DMA Buffers, Default size in MB allocated */
114#define CX18_DEFAULT_ENC_TS_BUFFERS 1
115#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
116#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
117#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
118#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
119#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
120
Andy Walls6ecd86d2008-12-07 23:30:17 -0300121/* Maximum firmware DMA buffers per stream */
Andy Walls0ef02892008-12-14 18:52:12 -0300122#define CX18_MAX_FW_MDLS_PER_STREAM 63
Andy Walls6ecd86d2008-12-07 23:30:17 -0300123
Andy Walls22dce182009-11-09 23:55:30 -0300124/* YUV buffer sizes in bytes to ensure integer # of frames per buffer */
125#define CX18_UNIT_ENC_YUV_BUFSIZE (720 * 32 * 3 / 2) /* bytes */
126#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32)
127#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32)
128
Andy Wallsefc0b122009-12-30 22:54:53 -0300129/* IDX buffer size should be a multiple of the index entry size from the chip */
130struct cx18_enc_idx_entry {
131 __le32 length;
132 __le32 offset_low;
133 __le32 offset_high;
134 __le32 flags;
135 __le32 pts_low;
136 __le32 pts_high;
137} __attribute__ ((packed));
138#define CX18_UNIT_ENC_IDX_BUFSIZE \
139 (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES)
140
Andy Walls6ecd86d2008-12-07 23:30:17 -0300141/* DMA buffer, default size in kB allocated */
142#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
143#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32
Andy Wallsefc0b122009-12-30 22:54:53 -0300144#define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1)
Andy Walls22dce182009-11-09 23:55:30 -0300145#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1)
Andy Walls6ecd86d2008-12-07 23:30:17 -0300146#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4
147
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300148/* i2c stuff */
149#define I2C_CLIENTS_MAX 16
150
151/* debugging */
152
153/* Flag to turn on high volume debugging */
154#define CX18_DBGFLG_WARN (1 << 0)
155#define CX18_DBGFLG_INFO (1 << 1)
156#define CX18_DBGFLG_API (1 << 2)
157#define CX18_DBGFLG_DMA (1 << 3)
158#define CX18_DBGFLG_IOCTL (1 << 4)
159#define CX18_DBGFLG_FILE (1 << 5)
160#define CX18_DBGFLG_I2C (1 << 6)
161#define CX18_DBGFLG_IRQ (1 << 7)
162/* Flag to turn on high volume debugging */
163#define CX18_DBGFLG_HIGHVOL (1 << 8)
164
Andy Walls5811cf92009-02-14 17:08:37 -0300165/* NOTE: extra space before comma in 'fmt , ## args' is required for
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300166 gcc-2.95, otherwise it won't compile. */
167#define CX18_DEBUG(x, type, fmt, args...) \
168 do { \
169 if ((x) & cx18_debug) \
Andy Walls5811cf92009-02-14 17:08:37 -0300170 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300171 } while (0)
172#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
173#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
174#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
175#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
176#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
177#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
178#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
179#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
180
181#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
182 do { \
183 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
Andy Walls5811cf92009-02-14 17:08:37 -0300184 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300185 } while (0)
186#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
187#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
188#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
189#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
190#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
191#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
192#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
193#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
194
195/* Standard kernel messages */
Andy Walls5811cf92009-02-14 17:08:37 -0300196#define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args)
197#define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args)
198#define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300199
Andy Walls6246d4e2009-02-21 22:27:37 -0300200/* Messages for internal subdevs to use */
201#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \
202 do { \
203 if ((x) & cx18_debug) \
204 v4l2_info(dev, " " type ": " fmt , ## args); \
205 } while (0)
206#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \
207 CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
208#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \
209 CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
210#define CX18_DEBUG_API_DEV(dev, fmt, args...) \
211 CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
212#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \
213 CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
214#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \
215 CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
216#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \
217 CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
218#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \
219 CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
220#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \
221 CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
222
223#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \
224 do { \
225 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
226 v4l2_info(dev, " " type ": " fmt , ## args); \
227 } while (0)
228#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \
229 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
230#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \
231 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
232#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \
233 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
234#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \
235 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
236#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \
237 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
238#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \
239 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
240#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \
241 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
242#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \
243 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
244
245#define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args)
246#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args)
247#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args)
248
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300249/* Values for CX18_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
250#define MPEG_FRAME_TYPE_IFRAME 1
251#define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
252#define MPEG_FRAME_TYPE_ALL 7
253
254#define CX18_MAX_PGM_INDEX (400)
255
256extern int cx18_debug;
257
258
259struct cx18_options {
260 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
261 int cardtype; /* force card type on load */
262 int tuner; /* set tuner on load */
263 int radio; /* enable/disable radio */
264};
265
Andy Walls52fcb3e2009-11-08 23:45:24 -0300266/* per-mdl bit flags */
267#define CX18_F_M_NEED_SWAP 0 /* mdl buffer data must be endianess swapped */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300268
269/* per-stream, s_flags */
270#define CX18_F_S_CLAIMED 3 /* this stream is claimed */
271#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
272#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
273#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
274#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
Andy Walls87116152009-04-13 22:42:43 -0300275#define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300276
277/* per-cx18, i_flags */
Andy Walls1d6782b2008-11-05 00:49:14 -0300278#define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */
279#define CX18_F_I_EOS 4 /* End of encoder stream */
280#define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */
281#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
Andy Walls1d6782b2008-11-05 00:49:14 -0300282#define CX18_F_I_INITED 21 /* set after first open */
283#define CX18_F_I_FAILED 22 /* set if first open failed */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300284
285/* These are the VBI types as they appear in the embedded VBI private packets. */
286#define CX18_SLICED_TYPE_TELETEXT_B (1)
287#define CX18_SLICED_TYPE_CAPTION_525 (4)
288#define CX18_SLICED_TYPE_WSS_625 (5)
289#define CX18_SLICED_TYPE_VPS (7)
290
291struct cx18_buffer {
292 struct list_head list;
293 dma_addr_t dma_handle;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300294 char *buf;
295
296 u32 bytesused;
297 u32 readpos;
298};
299
Andy Walls52fcb3e2009-11-08 23:45:24 -0300300struct cx18_mdl {
301 struct list_head list;
302 u32 id; /* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */
303
304 unsigned int skipped;
305 unsigned long m_flags;
306
307 struct list_head buf_list;
308 struct cx18_buffer *curr_buf; /* current buffer in list for reading */
309
310 u32 bytesused;
311 u32 readpos;
312};
313
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300314struct cx18_queue {
315 struct list_head list;
Andy Wallsc37b11b2009-11-04 23:13:58 -0300316 atomic_t depth;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300317 u32 bytesused;
Andy Walls40c55202009-04-13 23:08:00 -0300318 spinlock_t lock;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300319};
320
321struct cx18_dvb {
322 struct dmx_frontend hw_frontend;
323 struct dmx_frontend mem_frontend;
324 struct dmxdev dmxdev;
325 struct dvb_adapter dvb_adapter;
326 struct dvb_demux demux;
327 struct dvb_frontend *fe;
328 struct dvb_net dvbnet;
329 int enabled;
330 int feeding;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300331 struct mutex feedlock;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300332};
333
334struct cx18; /* forward reference */
335struct cx18_scb; /* forward reference */
336
Andy Walls72a4f802008-11-16 21:18:00 -0300337
Andy Wallsee2d64f2008-11-16 01:38:19 -0300338#define CX18_MAX_MDL_ACKS 2
Andy Wallsdeed75e2009-04-13 22:22:40 -0300339#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
Andy Walls0ef02892008-12-14 18:52:12 -0300340/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
Andy Wallsee2d64f2008-11-16 01:38:19 -0300341
Andy Walls72a4f802008-11-16 21:18:00 -0300342#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
343#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2
344#define CX18_F_EWO_MB_STALE \
345 (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC)
346
Andy Wallsdeed75e2009-04-13 22:22:40 -0300347struct cx18_in_work_order {
Andy Wallsee2d64f2008-11-16 01:38:19 -0300348 struct work_struct work;
349 atomic_t pending;
350 struct cx18 *cx;
Andy Walls72a4f802008-11-16 21:18:00 -0300351 unsigned long flags;
Andy Wallsee2d64f2008-11-16 01:38:19 -0300352 int rpu;
353 struct cx18_mailbox mb;
354 struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS];
355 char *str;
356};
357
Andy Wallsd3c5e702008-08-23 16:42:29 -0300358#define CX18_INVALID_TASK_HANDLE 0xffffffff
359
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300360struct cx18_stream {
361 /* These first four fields are always set, even if the stream
362 is not actually created. */
Andy Walls3d059132009-01-10 21:54:39 -0300363 struct video_device *video_dev; /* NULL when stream not created */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300364 struct cx18 *cx; /* for ease of use */
365 const char *name; /* name of the stream */
366 int type; /* stream type */
367 u32 handle; /* task handle */
Andy Wallsfa655dd2009-11-05 21:51:24 -0300368 unsigned int mdl_base_idx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300369
370 u32 id;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300371 unsigned long s_flags; /* status flags, see above */
372 int dma; /* can be PCI_DMA_TODEVICE,
373 PCI_DMA_FROMDEVICE or
374 PCI_DMA_NONE */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300375 wait_queue_head_t waitq;
376
Andy Walls52fcb3e2009-11-08 23:45:24 -0300377 /* Buffers */
378 struct list_head buf_pool; /* buffers not attached to an MDL */
379 u32 buffers; /* total buffers owned by this stream */
380 u32 buf_size; /* size in bytes of a single buffer */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300381
Andy Walls52fcb3e2009-11-08 23:45:24 -0300382 /* MDL sizes - all stream MDLs are the same size */
383 u32 bufs_per_mdl;
384 u32 mdl_size; /* total bytes in all buffers in a mdl */
385
386 /* MDL Queues */
387 struct cx18_queue q_free; /* free - in rotation, not committed */
388 struct cx18_queue q_busy; /* busy - in use by firmware */
389 struct cx18_queue q_full; /* full - data for user apps */
390 struct cx18_queue q_idle; /* idle - not in rotation */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300391
Andy Walls21a278b2009-04-15 20:45:10 -0300392 struct work_struct out_work_order;
393
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300394 /* DVB / Digital Transport */
395 struct cx18_dvb dvb;
396};
397
398struct cx18_open_id {
399 u32 open_id;
400 int type;
401 enum v4l2_priority prio;
402 struct cx18 *cx;
403};
404
405/* forward declaration of struct defined in cx18-cards.h */
406struct cx18_card;
407
Andy Walls302df972009-01-31 00:33:02 -0300408/*
409 * A note about "sliced" VBI data as implemented in this driver:
410 *
411 * Currently we collect the sliced VBI in the form of Ancillary Data
412 * packets, inserted by the AV core decoder/digitizer/slicer in the
413 * horizontal blanking region of the VBI lines, in "raw" mode as far as
414 * the Encoder is concerned. We don't ever tell the Encoder itself
415 * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode)
416 *
417 * We then process the ancillary data ourselves to send the sliced data
418 * to the user application directly or build up MPEG-2 private stream 1
419 * packets to splice into (only!) MPEG-2 PS streams for the user app.
420 *
421 * (That's how ivtv essentially does it.)
422 *
423 * The Encoder should be able to extract certain sliced VBI data for
424 * us and provide it in a separate stream or splice it into any type of
425 * MPEG PS or TS stream, but this isn't implemented yet.
426 */
427
428/*
429 * Number of "raw" VBI samples per horizontal line we tell the Encoder to
430 * grab from the decoder/digitizer/slicer output for raw or sliced VBI.
431 * It depends on the pixel clock and the horiz rate:
432 *
433 * (1/Fh)*(2*Fp) = Samples/line
434 * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples
435 *
436 * Sliced VBI data is sent as ancillary data during horizontal blanking
437 * Raw VBI is sent as active video samples during vertcal blanking
438 *
439 * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line
440 * length of 720 pixels @ 4:2:2 sampling. Thus...
441 *
442 * For systems that use a 15.734 kHz horizontal rate, such as
443 * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have:
444 *
445 * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line =
446 * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples
447 *
448 * For systems that use a 15.625 kHz horizontal rate, such as
449 * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have:
450 *
451 * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line =
452 * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples
453 */
454static const u32 vbi_active_samples = 1444; /* 4 byte SAV + 720 Y + 720 U/V */
455static const u32 vbi_hblank_samples_60Hz = 272; /* 4 byte EAV + 268 anc/fill */
456static const u32 vbi_hblank_samples_50Hz = 284; /* 4 byte EAV + 280 anc/fill */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300457
458#define CX18_VBI_FRAMES 32
459
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300460struct vbi_info {
Andy Walls302df972009-01-31 00:33:02 -0300461 /* Current state of v4l2 VBI settings for this device */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300462 struct v4l2_format in;
Andy Walls302df972009-01-31 00:33:02 -0300463 struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */
464 u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */
465 u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */
466
467 u32 frame; /* Count of VBI buffers/frames received from Encoder */
468
469 /*
470 * Vars for creation and insertion of MPEG Private Stream 1 packets
471 * of sliced VBI data into an MPEG PS
472 */
473
474 /* Boolean: create and insert Private Stream 1 packets into the PS */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300475 int insert_mpeg;
476
Andy Walls302df972009-01-31 00:33:02 -0300477 /*
478 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
479 * Used in cx18-vbi.c only for collecting sliced data, and as a source
480 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets.
481 * We don't need to save state here, but the array may have been a bit
482 * too big (2304 bytes) to alloc from the stack.
483 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300484 struct v4l2_sliced_vbi_data sliced_data[36];
485
Andy Walls302df972009-01-31 00:33:02 -0300486 /*
487 * A ring buffer of driver-generated MPEG-2 PS
488 * Program Pack/Private Stream 1 packets for sliced VBI data insertion
489 * into the MPEG PS stream.
490 *
491 * In each sliced_mpeg_data[] buffer is:
492 * 16 byte MPEG-2 PS Program Pack Header
493 * 16 byte MPEG-2 Private Stream 1 PES Header
494 * 4 byte magic number: "itv0" or "ITV0"
495 * 4 byte first field line mask, if "itv0"
496 * 4 byte second field line mask, if "itv0"
497 * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data
498 *
499 * Each line in the payload is
500 * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.)
501 * 42 bytes of line data
502 *
503 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet
504 * which is the payload size a PVR-350 (CX23415) MPEG decoder will
505 * accept for VBI data. So, including the headers, it's a maximum 1584
506 * bytes total.
507 */
508#define CX18_SLICED_MPEG_DATA_MAXSZ 1584
509 /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */
510#define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300511 u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
512 u32 sliced_mpeg_size[CX18_VBI_FRAMES];
Andy Walls302df972009-01-31 00:33:02 -0300513
514 /* Count of Program Pack/Program Stream 1 packets inserted into PS */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300515 u32 inserted_frame;
516
Andy Walls302df972009-01-31 00:33:02 -0300517 /*
Andy Walls52fcb3e2009-11-08 23:45:24 -0300518 * A dummy driver stream transfer mdl & buffer with a copy of the next
Andy Walls302df972009-01-31 00:33:02 -0300519 * sliced_mpeg_data[] buffer for output to userland apps.
520 * Only used in cx18-fileops.c, but its state needs to persist at times.
521 */
Andy Walls52fcb3e2009-11-08 23:45:24 -0300522 struct cx18_mdl sliced_mpeg_mdl;
Andy Walls302df972009-01-31 00:33:02 -0300523 struct cx18_buffer sliced_mpeg_buf;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300524};
525
526/* Per cx23418, per I2C bus private algo callback data */
527struct cx18_i2c_algo_callback_data {
528 struct cx18 *cx;
529 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
530};
531
Andy Wallsf7823f82008-11-02 18:15:28 -0300532#define CX18_MAX_MMIO_WR_RETRIES 10
Andy Walls330c6ec2008-11-08 14:19:37 -0300533
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300534/* Struct to hold info about cx18 cards */
535struct cx18 {
Andy Walls5811cf92009-02-14 17:08:37 -0300536 int instance;
Andy Walls3d059132009-01-10 21:54:39 -0300537 struct pci_dev *pci_dev;
Andy Walls888cdb02009-01-11 15:08:53 -0300538 struct v4l2_device v4l2_dev;
Andy Wallsff2a2002009-02-20 23:52:13 -0300539 struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */
Andy Wallseefe1012009-02-21 18:42:49 -0300540 struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */
Andy Walls888cdb02009-01-11 15:08:53 -0300541
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300542 const struct cx18_card *card; /* card information */
543 const char *card_name; /* full name of the card */
544 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
545 u8 is_50hz;
546 u8 is_60hz;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300547 u8 nof_inputs; /* number of video inputs */
548 u8 nof_audio_inputs; /* number of audio inputs */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300549 u32 v4l2_cap; /* V4L2 capabilities of card */
550 u32 hw_flags; /* Hardware description of the board */
Andy Wallsfa655dd2009-11-05 21:51:24 -0300551 unsigned int free_mdl_idx;
Andy Walls72c2d6d2008-11-06 01:15:41 -0300552 struct cx18_scb __iomem *scb; /* pointer to SCB */
553 struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/
554 struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/
555
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300556 struct cx18_av_state av_state;
557
558 /* codec settings */
559 struct cx2341x_mpeg_params params;
560 u32 filter_mode;
561 u32 temporal_strength;
562 u32 spatial_strength;
563
564 /* dualwatch */
565 unsigned long dualwatch_jiffies;
Andy Walls0d82fe82009-01-01 19:02:31 -0300566 u32 dualwatch_stereo_mode;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300567
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300568 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
569 struct cx18_options options; /* User options */
Andy Walls6ecd86d2008-12-07 23:30:17 -0300570 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300571 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
572 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
573 unsigned long i_flags; /* global cx18 flags */
Hans Verkuil31554ae2008-05-25 11:21:27 -0300574 atomic_t ana_capturing; /* count number of active analog capture streams */
575 atomic_t tot_capturing; /* total count number of active capture streams */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300576 int search_pack_header;
577
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300578 int open_id; /* incremented each time an open occurs, used as
579 unique ID. Starts at 1, so 0 can be used as
580 uninitialized value in the stream->id. */
581
582 u32 base_addr;
583 struct v4l2_prio_state prio;
584
585 u8 card_rev;
586 void __iomem *enc_mem, *reg_mem;
587
588 struct vbi_info vbi;
589
590 u32 pgm_info_offset;
591 u32 pgm_info_num;
592 u32 pgm_info_write_idx;
593 u32 pgm_info_read_idx;
594 struct v4l2_enc_idx_entry pgm_info[CX18_MAX_PGM_INDEX];
595
596 u64 mpg_data_received;
597 u64 vbi_data_inserted;
598
599 wait_queue_head_t mb_apu_waitq;
600 wait_queue_head_t mb_cpu_waitq;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300601 wait_queue_head_t cap_w;
602 /* when the current DMA is finished this queue is woken up */
603 wait_queue_head_t dma_waitq;
604
Andy Wallsd6c7e5f2008-11-17 22:48:46 -0300605 u32 sw1_irq_mask;
606 u32 sw2_irq_mask;
607 u32 hw2_irq_mask;
608
Andy Wallsdeed75e2009-04-13 22:22:40 -0300609 struct workqueue_struct *in_work_queue;
610 char in_workq_name[11]; /* "cx18-NN-in" */
611 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
Andy Wallsee2d64f2008-11-16 01:38:19 -0300612 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
Andy Walls1d6782b2008-11-05 00:49:14 -0300613
Andy Walls87116152009-04-13 22:42:43 -0300614 struct workqueue_struct *out_work_queue;
615 char out_workq_name[12]; /* "cx18-NN-out" */
Andy Walls87116152009-04-13 22:42:43 -0300616
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300617 /* i2c */
618 struct i2c_adapter i2c_adap[2];
619 struct i2c_algo_bit_data i2c_algo[2];
620 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300621
Andy Walls83526192009-11-21 13:39:28 -0300622 struct IR_i2c_init_data ir_i2c_init_data;
623
Hans Verkuilba60bc62008-05-25 14:34:36 -0300624 /* gpio */
625 u32 gpio_dir;
626 u32 gpio_val;
Andy Walls8abdd002008-07-13 19:05:25 -0300627 struct mutex gpio_lock;
Andy Wallseefe1012009-02-21 18:42:49 -0300628 struct v4l2_subdev sd_gpiomux;
629 struct v4l2_subdev sd_resetctrl;
Hans Verkuilba60bc62008-05-25 14:34:36 -0300630
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300631 /* v4l2 and User settings */
632
633 /* codec settings */
634 u32 audio_input;
635 u32 active_input;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300636 v4l2_std_id std;
637 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
638};
639
Andy Walls5811cf92009-02-14 17:08:37 -0300640static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
641{
642 return container_of(v4l2_dev, struct cx18, v4l2_dev);
643}
644
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300645/* Globals */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300646extern int cx18_first_minor;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300647
648/*==============Prototypes==================*/
649
650/* Return non-zero if a signal is pending */
651int cx18_msleep_timeout(unsigned int msecs, int intr);
652
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300653/* Read Hauppauge eeprom */
654struct tveeprom; /* forward reference */
655void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
656
657/* First-open initialization: load firmware, etc. */
658int cx18_init_on_first_open(struct cx18 *cx);
659
Andy Wallsdd073432008-12-12 16:24:04 -0300660/* Test if the current VBI mode is raw (1) or sliced (0) */
661static inline int cx18_raw_vbi(const struct cx18 *cx)
662{
663 return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
664}
665
Andy Wallsff2a2002009-02-20 23:52:13 -0300666/* Call the specified callback for all subdevs with a grp_id bit matching the
667 * mask in hw (if 0, then match them all). Ignore any errors. */
668#define cx18_call_hw(cx, hw, o, f, args...) \
669 __v4l2_device_call_subdevs(&(cx)->v4l2_dev, \
670 !(hw) || (sd->grp_id & (hw)), o, f , ##args)
671
672#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args)
673
674/* Call the specified callback for all subdevs with a grp_id bit matching the
675 * mask in hw (if 0, then match them all). If the callback returns an error
676 * other than 0 or -ENOIOCTLCMD, then return with that error code. */
677#define cx18_call_hw_err(cx, hw, o, f, args...) \
678 __v4l2_device_call_subdevs_until_err( \
679 &(cx)->v4l2_dev, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
680
681#define cx18_call_all_err(cx, o, f, args...) \
682 cx18_call_hw_err(cx, 0, o, f , ##args)
683
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300684#endif /* CX18_DRIVER_H */