blob: 78a15af3294231f1d1403ab593dc704c27ef1f06 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * (C) Copyright 2003-2004
3 * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
4
5 * This is a combined i2c adapter and algorithm driver for the
6 * MPC107/Tsi107 PowerPC northbridge and processors that include
7 * the same I2C unit (8240, 8245, 85xx).
8 *
9 * Release 0.8
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/sched.h>
19#include <linux/init.h>
Jon Smirl0d1cde22008-06-30 19:01:26 -040020#include <linux/of_platform.h>
21#include <linux/of_i2c.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010022
Wolfgang Grandegger8101a302009-04-07 10:20:53 +020023#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070024#include <linux/fsl_devices.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <linux/i2c.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
28
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +020029#include <asm/mpc52xx.h>
30#include <sysdev/fsl_soc.h>
31
Jon Smirl0d1cde22008-06-30 19:01:26 -040032#define DRV_NAME "mpc-i2c"
33
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +010034#define MPC_I2C_CLOCK_LEGACY 0
35#define MPC_I2C_CLOCK_PRESERVE (~0U)
36
Wolfgang Grandegger8101a302009-04-07 10:20:53 +020037#define MPC_I2C_FDR 0x04
38#define MPC_I2C_CR 0x08
39#define MPC_I2C_SR 0x0c
40#define MPC_I2C_DR 0x10
Linus Torvalds1da177e2005-04-16 15:20:36 -070041#define MPC_I2C_DFSRR 0x14
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
43#define CCR_MEN 0x80
44#define CCR_MIEN 0x40
45#define CCR_MSTA 0x20
46#define CCR_MTX 0x10
47#define CCR_TXAK 0x08
48#define CCR_RSTA 0x04
49
50#define CSR_MCF 0x80
51#define CSR_MAAS 0x40
52#define CSR_MBB 0x20
53#define CSR_MAL 0x10
54#define CSR_SRW 0x04
55#define CSR_MIF 0x02
56#define CSR_RXAK 0x01
57
58struct mpc_i2c {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +020059 struct device *dev;
Al Viro7366d362005-04-25 18:32:12 -070060 void __iomem *base;
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 u32 interrupt;
62 wait_queue_head_t queue;
63 struct i2c_adapter adap;
64 int irq;
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +020065};
66
67struct mpc_i2c_divider {
68 u16 divider;
69 u16 fdr; /* including dfsrr */
70};
71
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +010072struct mpc_i2c_data {
Wolfgang Grandeggera9352212010-02-17 11:19:18 +010073 void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
74 u32 clock, u32 prescaler);
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +020075 u32 prescaler;
Linus Torvalds1da177e2005-04-16 15:20:36 -070076};
77
Wolfgang Grandegger8101a302009-04-07 10:20:53 +020078static inline void writeccr(struct mpc_i2c *i2c, u32 x)
Linus Torvalds1da177e2005-04-16 15:20:36 -070079{
80 writeb(x, i2c->base + MPC_I2C_CR);
81}
82
David Howells7d12e782006-10-05 14:55:46 +010083static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -070084{
85 struct mpc_i2c *i2c = dev_id;
86 if (readb(i2c->base + MPC_I2C_SR) & CSR_MIF) {
87 /* Read again to allow register to stabilise */
88 i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
89 writeb(0, i2c->base + MPC_I2C_SR);
Timur Tabi1ab082d2009-02-06 08:00:37 -060090 wake_up(&i2c->queue);
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 }
92 return IRQ_HANDLED;
93}
94
Domen Puncer254db9b2007-07-12 14:12:31 +020095/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
96 * the bus, because it wants to send ACK.
97 * Following sequence of enabling/disabling and sending start/stop generates
98 * the pulse, so it's all OK.
99 */
100static void mpc_i2c_fixup(struct mpc_i2c *i2c)
101{
102 writeccr(i2c, 0);
103 udelay(30);
104 writeccr(i2c, CCR_MEN);
105 udelay(30);
106 writeccr(i2c, CCR_MSTA | CCR_MTX);
107 udelay(30);
108 writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
109 udelay(30);
110 writeccr(i2c, CCR_MEN);
111 udelay(30);
112}
113
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
115{
116 unsigned long orig_jiffies = jiffies;
117 u32 x;
118 int result = 0;
119
Wolfgang Grandegger8101a302009-04-07 10:20:53 +0200120 if (i2c->irq == NO_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
122 schedule();
123 if (time_after(jiffies, orig_jiffies + timeout)) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200124 dev_dbg(i2c->dev, "timeout\n");
Domen Puncer5af0e072007-08-14 18:37:14 +0200125 writeccr(i2c, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126 result = -EIO;
127 break;
128 }
129 }
130 x = readb(i2c->base + MPC_I2C_SR);
131 writeb(0, i2c->base + MPC_I2C_SR);
132 } else {
133 /* Interrupt mode */
Timur Tabi1ab082d2009-02-06 08:00:37 -0600134 result = wait_event_timeout(i2c->queue,
Jean Delvare8a52c6b2009-03-28 21:34:43 +0100135 (i2c->interrupt & CSR_MIF), timeout);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136
Timur Tabi1ab082d2009-02-06 08:00:37 -0600137 if (unlikely(!(i2c->interrupt & CSR_MIF))) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200138 dev_dbg(i2c->dev, "wait timeout\n");
Domen Puncer5af0e072007-08-14 18:37:14 +0200139 writeccr(i2c, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140 result = -ETIMEDOUT;
141 }
142
143 x = i2c->interrupt;
144 i2c->interrupt = 0;
145 }
146
147 if (result < 0)
148 return result;
149
150 if (!(x & CSR_MCF)) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200151 dev_dbg(i2c->dev, "unfinished\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 return -EIO;
153 }
154
155 if (x & CSR_MAL) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200156 dev_dbg(i2c->dev, "MAL\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 return -EIO;
158 }
159
160 if (writing && (x & CSR_RXAK)) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200161 dev_dbg(i2c->dev, "No RXAK\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 /* generate stop */
163 writeccr(i2c, CCR_MEN);
164 return -EIO;
165 }
166 return 0;
167}
168
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100169#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100170static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200171 {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
172 {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
173 {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
174 {52, 0x63}, {56, 0x29}, {60, 0x41}, {64, 0x2a},
175 {68, 0x07}, {72, 0x2b}, {80, 0x2c}, {88, 0x09},
176 {96, 0x2d}, {104, 0x0a}, {112, 0x2e}, {120, 0x81},
177 {128, 0x2f}, {136, 0x47}, {144, 0x0c}, {160, 0x30},
178 {176, 0x49}, {192, 0x31}, {208, 0x4a}, {224, 0x32},
179 {240, 0x0f}, {256, 0x33}, {272, 0x87}, {288, 0x10},
180 {320, 0x34}, {352, 0x89}, {384, 0x35}, {416, 0x8a},
181 {448, 0x36}, {480, 0x13}, {512, 0x37}, {576, 0x14},
182 {640, 0x38}, {768, 0x39}, {896, 0x3a}, {960, 0x17},
183 {1024, 0x3b}, {1152, 0x18}, {1280, 0x3c}, {1536, 0x3d},
184 {1792, 0x3e}, {1920, 0x1b}, {2048, 0x3f}, {2304, 0x1c},
185 {2560, 0x1d}, {3072, 0x1e}, {3584, 0x7e}, {3840, 0x1f},
186 {4096, 0x7f}, {4608, 0x5c}, {5120, 0x5d}, {6144, 0x5e},
187 {7168, 0xbe}, {7680, 0x5f}, {8192, 0xbf}, {9216, 0x9c},
188 {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
189};
190
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100191static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
192 int prescaler)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193{
Wolfgang Grandegger1904b032009-04-09 11:59:52 +0200194 const struct mpc_i2c_divider *div = NULL;
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200195 unsigned int pvr = mfspr(SPRN_PVR);
196 u32 divider;
197 int i;
198
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100199 if (clock == MPC_I2C_CLOCK_LEGACY)
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200200 return -EINVAL;
201
202 /* Determine divider value */
Wolfgang Denk87c441e2009-06-17 00:30:22 -0600203 divider = mpc5xxx_get_bus_frequency(node) / clock;
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200204
205 /*
206 * We want to choose an FDR/DFSR that generates an I2C bus speed that
207 * is equal to or lower than the requested speed.
208 */
Wolfgang Grandegger1904b032009-04-09 11:59:52 +0200209 for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_52xx); i++) {
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200210 div = &mpc_i2c_dividers_52xx[i];
211 /* Old MPC5200 rev A CPUs do not support the high bits */
212 if (div->fdr & 0xc0 && pvr == 0x80822011)
213 continue;
214 if (div->divider >= divider)
215 break;
216 }
217
218 return div ? (int)div->fdr : -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219}
220
Wolfgang Grandeggera9352212010-02-17 11:19:18 +0100221static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
222 struct mpc_i2c *i2c,
223 u32 clock, u32 prescaler)
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200224{
Wolfgang Grandegger1904b032009-04-09 11:59:52 +0200225 int ret, fdr;
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200226
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100227 if (clock == MPC_I2C_CLOCK_PRESERVE) {
228 dev_dbg(i2c->dev, "using fdr %d\n",
229 readb(i2c->base + MPC_I2C_FDR));
230 return;
231 }
232
Wolfgang Grandegger1904b032009-04-09 11:59:52 +0200233 ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
234 fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */
235
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200236 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
Wolfgang Grandegger1904b032009-04-09 11:59:52 +0200237
238 if (ret >= 0)
239 dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200240}
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100241#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
Wolfgang Grandeggera9352212010-02-17 11:19:18 +0100242static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
243 struct mpc_i2c *i2c,
244 u32 clock, u32 prescaler)
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200245{
246}
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100247#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
248
249#ifdef CONFIG_PPC_MPC512x
250static void __devinit mpc_i2c_setup_512x(struct device_node *node,
251 struct mpc_i2c *i2c,
252 u32 clock, u32 prescaler)
253{
254 struct device_node *node_ctrl;
255 void __iomem *ctrl;
256 const u32 *pval;
257 u32 idx;
258
259 /* Enable I2C interrupts for mpc5121 */
260 node_ctrl = of_find_compatible_node(NULL, NULL,
261 "fsl,mpc5121-i2c-ctrl");
262 if (node_ctrl) {
263 ctrl = of_iomap(node_ctrl, 0);
264 if (ctrl) {
265 /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
266 pval = of_get_property(node, "reg", NULL);
267 idx = (*pval & 0xff) / 0x20;
268 setbits32(ctrl, 1 << (24 + idx * 2));
269 iounmap(ctrl);
270 }
271 of_node_put(node_ctrl);
272 }
273
274 /* The clock setup for the 52xx works also fine for the 512x */
275 mpc_i2c_setup_52xx(node, i2c, clock, prescaler);
276}
277#else /* CONFIG_PPC_MPC512x */
278static void __devinit mpc_i2c_setup_512x(struct device_node *node,
279 struct mpc_i2c *i2c,
280 u32 clock, u32 prescaler)
281{
282}
283#endif /* CONFIG_PPC_MPC512x */
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200284
285#ifdef CONFIG_FSL_SOC
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100286static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = {
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200287 {160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
288 {288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
289 {416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
290 {544, 0x0b03}, {576, 0x0104}, {608, 0x1603}, {640, 0x0105},
291 {672, 0x2003}, {704, 0x0b05}, {736, 0x2b03}, {768, 0x0106},
292 {800, 0x3603}, {832, 0x0b06}, {896, 0x012a}, {960, 0x0107},
293 {1024, 0x012b}, {1088, 0x1607}, {1152, 0x0108}, {1216, 0x2b07},
294 {1280, 0x0109}, {1408, 0x1609}, {1536, 0x010a}, {1664, 0x160a},
295 {1792, 0x012e}, {1920, 0x010b}, {2048, 0x012f}, {2176, 0x2b0b},
296 {2304, 0x010c}, {2560, 0x010d}, {2816, 0x2b0d}, {3072, 0x010e},
297 {3328, 0x2b0e}, {3584, 0x0132}, {3840, 0x010f}, {4096, 0x0133},
298 {4608, 0x0110}, {5120, 0x0111}, {6144, 0x0112}, {7168, 0x0136},
299 {7680, 0x0113}, {8192, 0x0137}, {9216, 0x0114}, {10240, 0x0115},
300 {12288, 0x0116}, {14336, 0x013a}, {15360, 0x0117}, {16384, 0x013b},
301 {18432, 0x0118}, {20480, 0x0119}, {24576, 0x011a}, {28672, 0x013e},
302 {30720, 0x011b}, {32768, 0x013f}, {36864, 0x011c}, {40960, 0x011d},
303 {49152, 0x011e}, {61440, 0x011f}
304};
305
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100306static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200307{
308 struct device_node *node = NULL;
309 u32 __iomem *reg;
310 u32 val = 0;
311
312 node = of_find_node_by_name(NULL, "global-utilities");
313 if (node) {
314 const u32 *prop = of_get_property(node, "reg", NULL);
315 if (prop) {
316 /*
317 * Map and check POR Device Status Register 2
318 * (PORDEVSR2) at 0xE0014
319 */
320 reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
321 if (!reg)
322 printk(KERN_ERR
323 "Error: couldn't map PORDEVSR2\n");
324 else
325 val = in_be32(reg) & 0x00000080; /* sec-cfg */
326 iounmap(reg);
327 }
328 }
329 if (node)
330 of_node_put(node);
331
332 return val;
333}
334
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100335static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
336 u32 prescaler)
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200337{
338 const struct mpc_i2c_divider *div = NULL;
339 u32 divider;
340 int i;
341
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100342 if (clock == MPC_I2C_CLOCK_LEGACY)
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200343 return -EINVAL;
344
345 /* Determine proper divider value */
346 if (of_device_is_compatible(node, "fsl,mpc8544-i2c"))
347 prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2;
348 if (!prescaler)
349 prescaler = 1;
350
351 divider = fsl_get_sys_freq() / clock / prescaler;
352
353 pr_debug("I2C: src_clock=%d clock=%d divider=%d\n",
354 fsl_get_sys_freq(), clock, divider);
355
356 /*
357 * We want to choose an FDR/DFSR that generates an I2C bus speed that
358 * is equal to or lower than the requested speed.
359 */
360 for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_8xxx); i++) {
361 div = &mpc_i2c_dividers_8xxx[i];
362 if (div->divider >= divider)
363 break;
364 }
365
366 return div ? (int)div->fdr : -EINVAL;
367}
368
Wolfgang Grandeggera9352212010-02-17 11:19:18 +0100369static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
370 struct mpc_i2c *i2c,
371 u32 clock, u32 prescaler)
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200372{
Wolfgang Grandegger1904b032009-04-09 11:59:52 +0200373 int ret, fdr;
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200374
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100375 if (clock == MPC_I2C_CLOCK_PRESERVE) {
376 dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n",
377 readb(i2c->base + MPC_I2C_DFSRR),
378 readb(i2c->base + MPC_I2C_FDR));
379 return;
380 }
381
Wolfgang Grandegger1904b032009-04-09 11:59:52 +0200382 ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
383 fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */
384
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200385 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
386 writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR);
Wolfgang Grandegger1904b032009-04-09 11:59:52 +0200387
388 if (ret >= 0)
389 dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
390 clock, fdr >> 8, fdr & 0xff);
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200391}
392
393#else /* !CONFIG_FSL_SOC */
Wolfgang Grandeggera9352212010-02-17 11:19:18 +0100394static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
395 struct mpc_i2c *i2c,
396 u32 clock, u32 prescaler)
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200397{
398}
399#endif /* CONFIG_FSL_SOC */
400
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401static void mpc_i2c_start(struct mpc_i2c *i2c)
402{
403 /* Clear arbitration */
404 writeb(0, i2c->base + MPC_I2C_SR);
405 /* Start with MEN */
406 writeccr(i2c, CCR_MEN);
407}
408
409static void mpc_i2c_stop(struct mpc_i2c *i2c)
410{
411 writeccr(i2c, CCR_MEN);
412}
413
414static int mpc_write(struct mpc_i2c *i2c, int target,
Wolfgang Grandegger8101a302009-04-07 10:20:53 +0200415 const u8 *data, int length, int restart)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416{
Jon Smirl4bd28eb2008-01-27 18:14:52 +0100417 int i, result;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 unsigned timeout = i2c->adap.timeout;
419 u32 flags = restart ? CCR_RSTA : 0;
420
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421 /* Start as master */
422 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
423 /* Write target byte */
424 writeb((target << 1), i2c->base + MPC_I2C_DR);
425
Jon Smirl4bd28eb2008-01-27 18:14:52 +0100426 result = i2c_wait(i2c, timeout, 1);
427 if (result < 0)
428 return result;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429
430 for (i = 0; i < length; i++) {
431 /* Write data byte */
432 writeb(data[i], i2c->base + MPC_I2C_DR);
433
Jon Smirl4bd28eb2008-01-27 18:14:52 +0100434 result = i2c_wait(i2c, timeout, 1);
435 if (result < 0)
436 return result;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 }
438
439 return 0;
440}
441
442static int mpc_read(struct mpc_i2c *i2c, int target,
Wolfgang Grandegger8101a302009-04-07 10:20:53 +0200443 u8 *data, int length, int restart)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444{
445 unsigned timeout = i2c->adap.timeout;
Jon Smirl4bd28eb2008-01-27 18:14:52 +0100446 int i, result;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 u32 flags = restart ? CCR_RSTA : 0;
448
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 /* Switch to read - restart */
450 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
451 /* Write target address byte - this time with the read flag set */
452 writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
453
Jon Smirl4bd28eb2008-01-27 18:14:52 +0100454 result = i2c_wait(i2c, timeout, 1);
455 if (result < 0)
456 return result;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457
458 if (length) {
459 if (length == 1)
460 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
461 else
462 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
463 /* Dummy read */
464 readb(i2c->base + MPC_I2C_DR);
465 }
466
467 for (i = 0; i < length; i++) {
Jon Smirl4bd28eb2008-01-27 18:14:52 +0100468 result = i2c_wait(i2c, timeout, 0);
469 if (result < 0)
470 return result;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471
472 /* Generate txack on next to last byte */
473 if (i == length - 2)
474 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
Joakim Tjernlund45da7902009-10-13 10:12:03 +0200475 /* Do not generate stop on last byte */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476 if (i == length - 1)
Joakim Tjernlund45da7902009-10-13 10:12:03 +0200477 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 data[i] = readb(i2c->base + MPC_I2C_DR);
479 }
480
481 return length;
482}
483
484static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
485{
486 struct i2c_msg *pmsg;
487 int i;
488 int ret = 0;
489 unsigned long orig_jiffies = jiffies;
490 struct mpc_i2c *i2c = i2c_get_adapdata(adap);
491
492 mpc_i2c_start(i2c);
493
494 /* Allow bus up to 1s to become not busy */
495 while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
496 if (signal_pending(current)) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200497 dev_dbg(i2c->dev, "Interrupted\n");
Domen Puncer5af0e072007-08-14 18:37:14 +0200498 writeccr(i2c, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499 return -EINTR;
500 }
501 if (time_after(jiffies, orig_jiffies + HZ)) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200502 dev_dbg(i2c->dev, "timeout\n");
Domen Puncer254db9b2007-07-12 14:12:31 +0200503 if (readb(i2c->base + MPC_I2C_SR) ==
504 (CSR_MCF | CSR_MBB | CSR_RXAK))
505 mpc_i2c_fixup(i2c);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700506 return -EIO;
507 }
508 schedule();
509 }
510
511 for (i = 0; ret >= 0 && i < num; i++) {
512 pmsg = &msgs[i];
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200513 dev_dbg(i2c->dev,
514 "Doing %s %d bytes to 0x%02x - %d of %d messages\n",
515 pmsg->flags & I2C_M_RD ? "read" : "write",
516 pmsg->len, pmsg->addr, i + 1, num);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517 if (pmsg->flags & I2C_M_RD)
518 ret =
519 mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
520 else
521 ret =
522 mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
523 }
524 mpc_i2c_stop(i2c);
525 return (ret < 0) ? ret : num;
526}
527
528static u32 mpc_functionality(struct i2c_adapter *adap)
529{
530 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
531}
532
Jean Delvare8f9082c2006-09-03 22:39:46 +0200533static const struct i2c_algorithm mpc_algo = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534 .master_xfer = mpc_xfer,
535 .functionality = mpc_functionality,
536};
537
538static struct i2c_adapter mpc_ops = {
539 .owner = THIS_MODULE,
540 .name = "MPC adapter",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541 .algo = &mpc_algo,
Jean Delvare8a52c6b2009-03-28 21:34:43 +0100542 .timeout = HZ,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543};
544
Wolfgang Grandegger8101a302009-04-07 10:20:53 +0200545static int __devinit fsl_i2c_probe(struct of_device *op,
546 const struct of_device_id *match)
Kumar Gala8c86cb12005-07-27 11:43:26 -0700547{
Kumar Gala8c86cb12005-07-27 11:43:26 -0700548 struct mpc_i2c *i2c;
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200549 const u32 *prop;
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100550 u32 clock = MPC_I2C_CLOCK_LEGACY;
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200551 int result = 0;
552 int plen;
Kumar Gala8c86cb12005-07-27 11:43:26 -0700553
Jon Smirl4bd28eb2008-01-27 18:14:52 +0100554 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
555 if (!i2c)
Kumar Gala8c86cb12005-07-27 11:43:26 -0700556 return -ENOMEM;
Kumar Gala8c86cb12005-07-27 11:43:26 -0700557
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200558 i2c->dev = &op->dev; /* for debug and error output */
559
Kumar Gala8c86cb12005-07-27 11:43:26 -0700560 init_waitqueue_head(&i2c->queue);
561
Jon Smirl0d1cde22008-06-30 19:01:26 -0400562 i2c->base = of_iomap(op->node, 0);
Kumar Gala8c86cb12005-07-27 11:43:26 -0700563 if (!i2c->base) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200564 dev_err(i2c->dev, "failed to map controller\n");
Kumar Gala8c86cb12005-07-27 11:43:26 -0700565 result = -ENOMEM;
566 goto fail_map;
567 }
568
Jon Smirl0d1cde22008-06-30 19:01:26 -0400569 i2c->irq = irq_of_parse_and_map(op->node, 0);
570 if (i2c->irq != NO_IRQ) { /* i2c->irq = NO_IRQ implies polling */
571 result = request_irq(i2c->irq, mpc_i2c_isr,
572 IRQF_SHARED, "i2c-mpc", i2c);
573 if (result < 0) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200574 dev_err(i2c->dev, "failed to attach interrupt\n");
Jon Smirl0d1cde22008-06-30 19:01:26 -0400575 goto fail_request;
Kumar Gala8c86cb12005-07-27 11:43:26 -0700576 }
Jon Smirl0d1cde22008-06-30 19:01:26 -0400577 }
Wolfgang Grandegger8101a302009-04-07 10:20:53 +0200578
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100579 if (of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
580 clock = MPC_I2C_CLOCK_PRESERVE;
581 } else {
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200582 prop = of_get_property(op->node, "clock-frequency", &plen);
583 if (prop && plen == sizeof(u32))
584 clock = *prop;
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100585 }
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200586
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100587 if (match->data) {
588 struct mpc_i2c_data *data = match->data;
589 data->setup(op->node, i2c, clock, data->prescaler);
590 } else {
591 /* Backwards compatibility */
592 if (of_get_property(op->node, "dfsrr", NULL))
593 mpc_i2c_setup_8xxx(op->node, i2c, clock, 0);
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200594 }
Jon Smirl0d1cde22008-06-30 19:01:26 -0400595
596 dev_set_drvdata(&op->dev, i2c);
Kumar Gala8c86cb12005-07-27 11:43:26 -0700597
598 i2c->adap = mpc_ops;
599 i2c_set_adapdata(&i2c->adap, i2c);
Jon Smirl0d1cde22008-06-30 19:01:26 -0400600 i2c->adap.dev.parent = &op->dev;
601
602 result = i2c_add_adapter(&i2c->adap);
603 if (result < 0) {
Wolfgang Grandegger54377cd2009-04-07 10:20:54 +0200604 dev_err(i2c->dev, "failed to add adapter\n");
Kumar Gala8c86cb12005-07-27 11:43:26 -0700605 goto fail_add;
606 }
Jon Smirl0d1cde22008-06-30 19:01:26 -0400607 of_register_i2c_devices(&i2c->adap, op->node);
Kumar Gala8c86cb12005-07-27 11:43:26 -0700608
609 return result;
610
Jon Smirl0d1cde22008-06-30 19:01:26 -0400611 fail_add:
612 dev_set_drvdata(&op->dev, NULL);
613 free_irq(i2c->irq, i2c);
614 fail_request:
615 irq_dispose_mapping(i2c->irq);
Wolfgang Grandegger8101a302009-04-07 10:20:53 +0200616 iounmap(i2c->base);
Jon Smirl0d1cde22008-06-30 19:01:26 -0400617 fail_map:
Kumar Gala8c86cb12005-07-27 11:43:26 -0700618 kfree(i2c);
619 return result;
620};
621
Jon Smirl0d1cde22008-06-30 19:01:26 -0400622static int __devexit fsl_i2c_remove(struct of_device *op)
Kumar Gala8c86cb12005-07-27 11:43:26 -0700623{
Jon Smirl0d1cde22008-06-30 19:01:26 -0400624 struct mpc_i2c *i2c = dev_get_drvdata(&op->dev);
Kumar Gala8c86cb12005-07-27 11:43:26 -0700625
626 i2c_del_adapter(&i2c->adap);
Jon Smirl0d1cde22008-06-30 19:01:26 -0400627 dev_set_drvdata(&op->dev, NULL);
Kumar Gala8c86cb12005-07-27 11:43:26 -0700628
Jon Smirlf5fff362008-05-11 20:37:04 +0200629 if (i2c->irq != NO_IRQ)
Kumar Gala8c86cb12005-07-27 11:43:26 -0700630 free_irq(i2c->irq, i2c);
631
Jon Smirl0d1cde22008-06-30 19:01:26 -0400632 irq_dispose_mapping(i2c->irq);
Kumar Gala8c86cb12005-07-27 11:43:26 -0700633 iounmap(i2c->base);
634 kfree(i2c);
635 return 0;
636};
637
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100638static struct mpc_i2c_data mpc_i2c_data_512x __devinitdata = {
639 .setup = mpc_i2c_setup_512x,
640};
641
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100642static struct mpc_i2c_data mpc_i2c_data_52xx __devinitdata = {
Wolfgang Grandeggera9352212010-02-17 11:19:18 +0100643 .setup = mpc_i2c_setup_52xx,
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100644};
645
646static struct mpc_i2c_data mpc_i2c_data_8313 __devinitdata = {
Wolfgang Grandeggera9352212010-02-17 11:19:18 +0100647 .setup = mpc_i2c_setup_8xxx,
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100648};
649
650static struct mpc_i2c_data mpc_i2c_data_8543 __devinitdata = {
Wolfgang Grandeggera9352212010-02-17 11:19:18 +0100651 .setup = mpc_i2c_setup_8xxx,
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100652 .prescaler = 2,
653};
654
655static struct mpc_i2c_data mpc_i2c_data_8544 __devinitdata = {
Wolfgang Grandeggera9352212010-02-17 11:19:18 +0100656 .setup = mpc_i2c_setup_8xxx,
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100657 .prescaler = 3,
658};
659
Jon Smirl0d1cde22008-06-30 19:01:26 -0400660static const struct of_device_id mpc_i2c_of_match[] = {
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100661 {.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
662 {.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
663 {.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100664 {.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
Wolfgang Grandegger6e56dd32010-02-17 11:19:17 +0100665 {.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
666 {.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
667 {.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200668 /* Backward compatibility */
Wolfgang Grandeggerf2bd5ef2009-04-07 10:20:55 +0200669 {.compatible = "fsl-i2c", },
Jon Smirl0d1cde22008-06-30 19:01:26 -0400670 {},
671};
672MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
673
Kumar Gala8c86cb12005-07-27 11:43:26 -0700674/* Structure for a device driver */
Jon Smirl0d1cde22008-06-30 19:01:26 -0400675static struct of_platform_driver mpc_i2c_driver = {
676 .match_table = mpc_i2c_of_match,
677 .probe = fsl_i2c_probe,
678 .remove = __devexit_p(fsl_i2c_remove),
679 .driver = {
680 .owner = THIS_MODULE,
681 .name = DRV_NAME,
Russell King3ae5eae2005-11-09 22:32:44 +0000682 },
Kumar Gala8c86cb12005-07-27 11:43:26 -0700683};
684
685static int __init fsl_i2c_init(void)
686{
Jon Smirl0d1cde22008-06-30 19:01:26 -0400687 int rv;
688
689 rv = of_register_platform_driver(&mpc_i2c_driver);
690 if (rv)
Wolfgang Grandegger8101a302009-04-07 10:20:53 +0200691 printk(KERN_ERR DRV_NAME
Jon Smirl0d1cde22008-06-30 19:01:26 -0400692 " of_register_platform_driver failed (%i)\n", rv);
693 return rv;
Kumar Gala8c86cb12005-07-27 11:43:26 -0700694}
695
696static void __exit fsl_i2c_exit(void)
697{
Jon Smirl0d1cde22008-06-30 19:01:26 -0400698 of_unregister_platform_driver(&mpc_i2c_driver);
Kumar Gala8c86cb12005-07-27 11:43:26 -0700699}
700
701module_init(fsl_i2c_init);
702module_exit(fsl_i2c_exit);
703
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
Wolfgang Grandegger8101a302009-04-07 10:20:53 +0200705MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
Wolfgang Grandeggerf00d7382010-02-17 11:19:19 +0100706 "MPC824x/83xx/85xx/86xx/512x/52xx processors");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700707MODULE_LICENSE("GPL");