blob: 1ca9b3ecb882cc113e6400a29cebbdc7bd89eda0 [file] [log] [blame]
Richard Zhao3c8276c2011-12-14 09:26:46 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx6q.dtsi"
15
16/ {
17 model = "Freescale i.MX6 Quad SABRE Lite Board";
18 compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x40000000>;
22 };
23
24 soc {
Fabio Estevamf07439c2012-04-24 20:35:36 -030025 aips-bus@02000000 { /* AIPS1 */
26 spba-bus@02000000 {
27 ecspi@02008000 { /* eCSPI1 */
28 fsl,spi-num-chipselects = <1>;
29 cs-gpios = <&gpio3 19 0>;
30 status = "okay";
31
32 flash: m25p80@0 {
33 compatible = "sst,sst25vf016b";
34 spi-max-frequency = <20000000>;
35 reg = <0>;
36 };
37 };
38 };
39
40 };
41
Richard Zhao3c8276c2011-12-14 09:26:46 +080042 aips-bus@02100000 { /* AIPS2 */
Shawn Guo0c456cf2012-04-02 14:39:26 +080043 ethernet@02188000 {
Richard Zhao3c8276c2011-12-14 09:26:46 +080044 phy-mode = "rgmii";
45 phy-reset-gpios = <&gpio3 23 0>;
46 status = "okay";
47 };
48
49 usdhc@02198000 { /* uSDHC3 */
50 cd-gpios = <&gpio7 0 0>;
51 wp-gpios = <&gpio7 1 0>;
Shawn Guo6f6ea9372012-02-27 17:15:12 +080052 vmmc-supply = <&reg_3p3v>;
Richard Zhao3c8276c2011-12-14 09:26:46 +080053 status = "okay";
54 };
55
56 usdhc@0219c000 { /* uSDHC4 */
57 cd-gpios = <&gpio2 6 0>;
58 wp-gpios = <&gpio2 7 0>;
Shawn Guo6f6ea9372012-02-27 17:15:12 +080059 vmmc-supply = <&reg_3p3v>;
Richard Zhao3c8276c2011-12-14 09:26:46 +080060 status = "okay";
61 };
62
Shawn Guo0c456cf2012-04-02 14:39:26 +080063 uart2: serial@021e8000 {
Richard Zhao3c8276c2011-12-14 09:26:46 +080064 status = "okay";
65 };
Richard Zhaoadcec4c2012-02-02 10:12:03 +080066
67 i2c@021a0000 { /* I2C1 */
68 status = "okay";
69 clock-frequency = <100000>;
70
71 codec: sgtl5000@0a {
72 compatible = "fsl,sgtl5000";
73 reg = <0x0a>;
74 VDDA-supply = <&reg_2p5v>;
75 VDDIO-supply = <&reg_3p3v>;
76 };
77 };
Richard Zhao3c8276c2011-12-14 09:26:46 +080078 };
79 };
Richard Zhaocf37a8e2012-02-02 10:12:02 +080080
81 regulators {
82 compatible = "simple-bus";
83
84 reg_2p5v: 2p5v {
85 compatible = "regulator-fixed";
86 regulator-name = "2P5V";
87 regulator-min-microvolt = <2500000>;
88 regulator-max-microvolt = <2500000>;
89 regulator-always-on;
90 };
91
92 reg_3p3v: 3p3v {
93 compatible = "regulator-fixed";
94 regulator-name = "3P3V";
95 regulator-min-microvolt = <3300000>;
96 regulator-max-microvolt = <3300000>;
97 regulator-always-on;
98 };
99 };
Richard Zhao3c8276c2011-12-14 09:26:46 +0800100};