| Niklaus Giger | 9fa126d | 2008-10-01 19:23:23 +0000 | [diff] [blame] | 1 | /* | 
|  | 2 | * Device Tree Source for Netstal Maschinen HCU4 | 
|  | 3 | * based on the IBM Walnut | 
|  | 4 | * | 
|  | 5 | * Copyright 2008 | 
|  | 6 | * Niklaus Giger <niklaus.giger@member.fsf.org> | 
|  | 7 | * | 
|  | 8 | * Copyright 2007 IBM Corp. | 
|  | 9 | * Josh Boyer <jwboyer@linux.vnet.ibm.com> | 
|  | 10 | * | 
|  | 11 | * This file is licensed under the terms of the GNU General Public | 
|  | 12 | * License version 2.  This program is licensed "as is" without | 
|  | 13 | * any warranty of any kind, whether express or implied. | 
|  | 14 | */ | 
|  | 15 |  | 
|  | 16 | /dts-v1/; | 
|  | 17 |  | 
|  | 18 | / { | 
|  | 19 | #address-cells = <0x1>; | 
|  | 20 | #size-cells = <0x1>; | 
|  | 21 | model = "netstal,hcu4"; | 
|  | 22 | compatible = "netstal,hcu4"; | 
|  | 23 | dcr-parent = <0x1>; | 
|  | 24 |  | 
|  | 25 | aliases { | 
|  | 26 | ethernet0 = "/plb/opb/ethernet@ef600800"; | 
|  | 27 | serial0 = "/plb/opb/serial@ef600300"; | 
|  | 28 | }; | 
|  | 29 |  | 
|  | 30 | cpus { | 
|  | 31 | #address-cells = <0x1>; | 
|  | 32 | #size-cells = <0x0>; | 
|  | 33 |  | 
|  | 34 | cpu@0 { | 
|  | 35 | device_type = "cpu"; | 
|  | 36 | model = "PowerPC,405GPr"; | 
|  | 37 | reg = <0x0>; | 
|  | 38 | clock-frequency = <0>;		/* Filled in by U-Boot */ | 
|  | 39 | timebase-frequency = <0x0>;	/* Filled in by U-Boot */ | 
|  | 40 | i-cache-line-size = <0x20>; | 
|  | 41 | d-cache-line-size = <0x20>; | 
|  | 42 | i-cache-size = <0x4000>; | 
|  | 43 | d-cache-size = <0x4000>; | 
|  | 44 | dcr-controller; | 
|  | 45 | dcr-access-method = "native"; | 
|  | 46 | linux,phandle = <0x1>; | 
|  | 47 | }; | 
|  | 48 | }; | 
|  | 49 |  | 
|  | 50 | memory { | 
|  | 51 | device_type = "memory"; | 
|  | 52 | reg = <0x0 0x0>;	/* Filled in by U-Boot */ | 
|  | 53 | }; | 
|  | 54 |  | 
|  | 55 | UIC0: interrupt-controller { | 
|  | 56 | compatible = "ibm,uic"; | 
|  | 57 | interrupt-controller; | 
|  | 58 | cell-index = <0x0>; | 
|  | 59 | dcr-reg = <0xc0 0x9>; | 
|  | 60 | #address-cells = <0x0>; | 
|  | 61 | #size-cells = <0x0>; | 
|  | 62 | #interrupt-cells = <0x2>; | 
|  | 63 | linux,phandle = <0x2>; | 
|  | 64 | }; | 
|  | 65 |  | 
|  | 66 | plb { | 
|  | 67 | compatible = "ibm,plb3"; | 
|  | 68 | #address-cells = <0x1>; | 
|  | 69 | #size-cells = <0x1>; | 
|  | 70 | ranges; | 
|  | 71 | clock-frequency = <0x0>;	/* Filled in by U-Boot */ | 
|  | 72 |  | 
|  | 73 | SDRAM0: memory-controller { | 
|  | 74 | compatible = "ibm,sdram-405gp"; | 
|  | 75 | dcr-reg = <0x10 0x2>; | 
|  | 76 | }; | 
|  | 77 |  | 
|  | 78 | MAL: mcmal { | 
|  | 79 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; | 
|  | 80 | dcr-reg = <0x180 0x62>; | 
|  | 81 | num-tx-chans = <0x1>; | 
|  | 82 | num-rx-chans = <0x1>; | 
|  | 83 | interrupt-parent = <0x2>; | 
|  | 84 | interrupts = <0xb 0x4 0xc 0x4 0xa 0x4 0xd 0x4 0xe 0x4>; | 
|  | 85 | linux,phandle = <0x3>; | 
|  | 86 | }; | 
|  | 87 |  | 
|  | 88 | POB0: opb { | 
|  | 89 | compatible = "ibm,opb-405gp", "ibm,opb"; | 
|  | 90 | #address-cells = <0x1>; | 
|  | 91 | #size-cells = <0x1>; | 
|  | 92 | ranges = <0xef600000 0xef600000 0xa00000>; | 
|  | 93 | dcr-reg = <0xa0 0x5>; | 
|  | 94 | clock-frequency = <0x0>;	/* Filled in by U-Boot */ | 
|  | 95 |  | 
|  | 96 | UART0: serial@ef600300 { | 
|  | 97 | device_type = "serial"; | 
|  | 98 | compatible = "ns16550"; | 
|  | 99 | reg = <0xef600300 0x8>; | 
|  | 100 | virtual-reg = <0xef600300>; | 
|  | 101 | clock-frequency = <0x0>;/* Filled in by U-Boot */ | 
|  | 102 | current-speed = <0>;	/* Filled in by U-Boot */ | 
|  | 103 | interrupt-parent = <0x2>; | 
|  | 104 | interrupts = <0x0 0x4>; | 
|  | 105 | }; | 
|  | 106 |  | 
|  | 107 | IIC: i2c@ef600500 { | 
|  | 108 | compatible = "ibm,iic-405gp", "ibm,iic"; | 
|  | 109 | reg = <0xef600500 0x11>; | 
|  | 110 | interrupt-parent = <0x2>; | 
|  | 111 | interrupts = <0x2 0x4>; | 
|  | 112 | }; | 
|  | 113 |  | 
|  | 114 | GPIO: gpio@ef600700 { | 
|  | 115 | compatible = "ibm,gpio-405gp"; | 
|  | 116 | reg = <0xef600700 0x20>; | 
|  | 117 | }; | 
|  | 118 |  | 
|  | 119 | EMAC: ethernet@ef600800 { | 
|  | 120 | device_type = "network"; | 
|  | 121 | compatible = "ibm,emac-405gp", "ibm,emac"; | 
|  | 122 | interrupt-parent = <0x2>; | 
|  | 123 | interrupts = <0xf 0x4 0x9 0x4>; | 
|  | 124 | local-mac-address = [00 00 00 00 00 00]; | 
|  | 125 | reg = <0xef600800 0x70>; | 
|  | 126 | mal-device = <0x3>; | 
|  | 127 | mal-tx-channel = <0x0>; | 
|  | 128 | mal-rx-channel = <0x0>; | 
|  | 129 | cell-index = <0x0>; | 
|  | 130 | max-frame-size = <0x5dc>; | 
|  | 131 | rx-fifo-size = <0x1000>; | 
|  | 132 | tx-fifo-size = <0x800>; | 
|  | 133 | phy-mode = "rmii"; | 
|  | 134 | phy-map = <0x1>; | 
|  | 135 | }; | 
|  | 136 | }; | 
|  | 137 |  | 
|  | 138 | EBC0: ebc { | 
|  | 139 | compatible = "ibm,ebc-405gp", "ibm,ebc"; | 
|  | 140 | dcr-reg = <0x12 0x2>; | 
|  | 141 | #address-cells = <0x2>; | 
|  | 142 | #size-cells = <0x1>; | 
|  | 143 | clock-frequency = <0x0>;	/* Filled in by U-Boot */ | 
|  | 144 |  | 
|  | 145 | sram@0,0 { | 
|  | 146 | reg = <0x0 0x0 0x80000>; | 
|  | 147 | }; | 
|  | 148 |  | 
|  | 149 | flash@0,80000 { | 
|  | 150 | compatible = "jedec-flash"; | 
|  | 151 | bank-width = <0x1>; | 
|  | 152 | reg = <0x0 0x80000 0x80000>; | 
|  | 153 | #address-cells = <0x1>; | 
|  | 154 | #size-cells = <0x1>; | 
|  | 155 |  | 
|  | 156 | partition@0 { | 
|  | 157 | label = "OpenBIOS"; | 
|  | 158 | reg = <0x0 0x80000>; | 
|  | 159 | read-only; | 
|  | 160 | }; | 
|  | 161 | }; | 
|  | 162 | }; | 
|  | 163 | }; | 
|  | 164 |  | 
|  | 165 | chosen { | 
|  | 166 | linux,stdout-path = "/plb/opb/serial@ef600300"; | 
|  | 167 | }; | 
|  | 168 | }; |