| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 1 | /* | 
 | 2 |  * Generate definitions needed by assembly language modules. | 
 | 3 |  * This code generates raw asm output which is post-processed to extract | 
 | 4 |  * and format the required data. | 
 | 5 |  */ | 
 | 6 |  | 
 | 7 | #include <linux/crypto.h> | 
 | 8 | #include <linux/sched.h>  | 
 | 9 | #include <linux/stddef.h> | 
 | 10 | #include <linux/errno.h>  | 
 | 11 | #include <linux/hardirq.h> | 
 | 12 | #include <linux/suspend.h> | 
| Christoph Lameter | 66916cd | 2008-04-29 01:03:54 -0700 | [diff] [blame] | 13 | #include <linux/kbuild.h> | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 14 | #include <asm/processor.h> | 
 | 15 | #include <asm/segment.h> | 
 | 16 | #include <asm/thread_info.h> | 
 | 17 | #include <asm/ia32.h> | 
| Eric W. Biederman | bd53147 | 2007-10-26 11:29:04 -0600 | [diff] [blame] | 18 | #include <asm/bootparam.h> | 
| Magnus Damm | a8af789 | 2009-03-31 15:23:37 -0700 | [diff] [blame] | 19 | #include <asm/suspend.h> | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 20 |  | 
| Jeremy Fitzhardinge | 555cf2b | 2008-07-08 15:06:45 -0700 | [diff] [blame] | 21 | #include <xen/interface/xen.h> | 
 | 22 |  | 
| Hiroshi Shimamoto | 8869a2e | 2008-12-18 14:46:52 -0800 | [diff] [blame] | 23 | #include <asm/sigframe.h> | 
 | 24 |  | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 25 | #define __NO_STUBS 1 | 
 | 26 | #undef __SYSCALL | 
| H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 27 | #undef _ASM_X86_UNISTD_64_H | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 28 | #define __SYSCALL(nr, sym) [nr] = 1, | 
 | 29 | static char syscalls[] = { | 
 | 30 | #include <asm/unistd.h> | 
 | 31 | }; | 
 | 32 |  | 
 | 33 | int main(void) | 
 | 34 | { | 
 | 35 | #define ENTRY(entry) DEFINE(tsk_ ## entry, offsetof(struct task_struct, entry)) | 
 | 36 | 	ENTRY(state); | 
 | 37 | 	ENTRY(flags);  | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 38 | 	ENTRY(pid); | 
 | 39 | 	BLANK(); | 
 | 40 | #undef ENTRY | 
| Glauber Costa | 26ccb8a | 2008-06-24 11:19:35 -0300 | [diff] [blame] | 41 | #define ENTRY(entry) DEFINE(TI_ ## entry, offsetof(struct thread_info, entry)) | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 42 | 	ENTRY(flags); | 
 | 43 | 	ENTRY(addr_limit); | 
 | 44 | 	ENTRY(preempt_count); | 
 | 45 | 	ENTRY(status); | 
| Roland McGrath | 36197c9 | 2008-01-30 13:30:43 +0100 | [diff] [blame] | 46 | #ifdef CONFIG_IA32_EMULATION | 
 | 47 | 	ENTRY(sysenter_return); | 
 | 48 | #endif | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 49 | 	BLANK(); | 
 | 50 | #undef ENTRY | 
| Glauber de Oliveira Costa | a59153dc | 2008-01-30 13:33:19 +0100 | [diff] [blame] | 51 | #ifdef CONFIG_PARAVIRT | 
 | 52 | 	BLANK(); | 
 | 53 | 	OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled); | 
 | 54 | 	OFFSET(PARAVIRT_PATCH_pv_cpu_ops, paravirt_patch_template, pv_cpu_ops); | 
 | 55 | 	OFFSET(PARAVIRT_PATCH_pv_irq_ops, paravirt_patch_template, pv_irq_ops); | 
 | 56 | 	OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable); | 
 | 57 | 	OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable); | 
| Jeremy Fitzhardinge | fab5842 | 2008-06-25 00:19:31 -0400 | [diff] [blame] | 58 | 	OFFSET(PV_IRQ_adjust_exception_frame, pv_irq_ops, adjust_exception_frame); | 
| Glauber de Oliveira Costa | a59153dc | 2008-01-30 13:33:19 +0100 | [diff] [blame] | 59 | 	OFFSET(PV_CPU_iret, pv_cpu_ops, iret); | 
| Jeremy Fitzhardinge | 2be2998 | 2008-06-25 00:19:28 -0400 | [diff] [blame] | 60 | 	OFFSET(PV_CPU_usergs_sysret32, pv_cpu_ops, usergs_sysret32); | 
 | 61 | 	OFFSET(PV_CPU_usergs_sysret64, pv_cpu_ops, usergs_sysret64); | 
 | 62 | 	OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit); | 
| Glauber de Oliveira Costa | a59153dc | 2008-01-30 13:33:19 +0100 | [diff] [blame] | 63 | 	OFFSET(PV_CPU_swapgs, pv_cpu_ops, swapgs); | 
 | 64 | 	OFFSET(PV_MMU_read_cr2, pv_mmu_ops, read_cr2); | 
 | 65 | #endif | 
 | 66 |  | 
 | 67 |  | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 68 | #ifdef CONFIG_IA32_EMULATION | 
 | 69 | #define ENTRY(entry) DEFINE(IA32_SIGCONTEXT_ ## entry, offsetof(struct sigcontext_ia32, entry)) | 
| H. Peter Anvin | 742fa54 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 70 | 	ENTRY(ax); | 
 | 71 | 	ENTRY(bx); | 
 | 72 | 	ENTRY(cx); | 
 | 73 | 	ENTRY(dx); | 
 | 74 | 	ENTRY(si); | 
 | 75 | 	ENTRY(di); | 
 | 76 | 	ENTRY(bp); | 
 | 77 | 	ENTRY(sp); | 
 | 78 | 	ENTRY(ip); | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 79 | 	BLANK(); | 
 | 80 | #undef ENTRY | 
 | 81 | 	DEFINE(IA32_RT_SIGFRAME_sigcontext, | 
| Hiroshi Shimamoto | 8869a2e | 2008-12-18 14:46:52 -0800 | [diff] [blame] | 82 | 	       offsetof (struct rt_sigframe_ia32, uc.uc_mcontext)); | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 83 | 	BLANK(); | 
 | 84 | #endif | 
 | 85 | 	DEFINE(pbe_address, offsetof(struct pbe, address)); | 
 | 86 | 	DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); | 
 | 87 | 	DEFINE(pbe_next, offsetof(struct pbe, next)); | 
 | 88 | 	BLANK(); | 
| Rafael J. Wysocki | 0de80bc | 2007-10-23 22:37:24 +0200 | [diff] [blame] | 89 | #define ENTRY(entry) DEFINE(pt_regs_ ## entry, offsetof(struct pt_regs, entry)) | 
| H. Peter Anvin | 65ea5b0 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 90 | 	ENTRY(bx); | 
 | 91 | 	ENTRY(bx); | 
 | 92 | 	ENTRY(cx); | 
 | 93 | 	ENTRY(dx); | 
 | 94 | 	ENTRY(sp); | 
 | 95 | 	ENTRY(bp); | 
 | 96 | 	ENTRY(si); | 
 | 97 | 	ENTRY(di); | 
| Rafael J. Wysocki | 0de80bc | 2007-10-23 22:37:24 +0200 | [diff] [blame] | 98 | 	ENTRY(r8); | 
 | 99 | 	ENTRY(r9); | 
 | 100 | 	ENTRY(r10); | 
 | 101 | 	ENTRY(r11); | 
 | 102 | 	ENTRY(r12); | 
 | 103 | 	ENTRY(r13); | 
 | 104 | 	ENTRY(r14); | 
 | 105 | 	ENTRY(r15); | 
| H. Peter Anvin | 65ea5b0 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 106 | 	ENTRY(flags); | 
| Rafael J. Wysocki | 0de80bc | 2007-10-23 22:37:24 +0200 | [diff] [blame] | 107 | 	BLANK(); | 
 | 108 | #undef ENTRY | 
 | 109 | #define ENTRY(entry) DEFINE(saved_context_ ## entry, offsetof(struct saved_context, entry)) | 
 | 110 | 	ENTRY(cr0); | 
 | 111 | 	ENTRY(cr2); | 
 | 112 | 	ENTRY(cr3); | 
 | 113 | 	ENTRY(cr4); | 
 | 114 | 	ENTRY(cr8); | 
 | 115 | 	BLANK(); | 
 | 116 | #undef ENTRY | 
| Glauber de Oliveira Costa | ca241c7 | 2008-01-30 13:31:31 +0100 | [diff] [blame] | 117 | 	DEFINE(TSS_ist, offsetof(struct tss_struct, x86_tss.ist)); | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 118 | 	BLANK(); | 
 | 119 | 	DEFINE(crypto_tfm_ctx_offset, offsetof(struct crypto_tfm, __crt_ctx)); | 
 | 120 | 	BLANK(); | 
 | 121 | 	DEFINE(__NR_syscall_max, sizeof(syscalls) - 1); | 
| Eric W. Biederman | bd53147 | 2007-10-26 11:29:04 -0600 | [diff] [blame] | 122 |  | 
 | 123 | 	BLANK(); | 
 | 124 | 	OFFSET(BP_scratch, boot_params, scratch); | 
 | 125 | 	OFFSET(BP_loadflags, boot_params, hdr.loadflags); | 
 | 126 | 	OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); | 
 | 127 | 	OFFSET(BP_version, boot_params, hdr.version); | 
| H. Peter Anvin | 37ba7ab | 2009-05-11 15:56:08 -0700 | [diff] [blame] | 128 | 	OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment); | 
| Jeremy Fitzhardinge | 8c5e5ac | 2008-07-08 15:06:44 -0700 | [diff] [blame] | 129 |  | 
 | 130 | 	BLANK(); | 
 | 131 | 	DEFINE(PAGE_SIZE_asm, PAGE_SIZE); | 
| Jeremy Fitzhardinge | 555cf2b | 2008-07-08 15:06:45 -0700 | [diff] [blame] | 132 | #ifdef CONFIG_XEN | 
 | 133 | 	BLANK(); | 
 | 134 | 	OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask); | 
 | 135 | 	OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending); | 
 | 136 | #undef ENTRY | 
 | 137 | #endif | 
| Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 138 | 	return 0; | 
 | 139 | } |