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Antti Palosaari7f882c22012-03-30 09:10:08 -03001/*
2 * Afatech AF9035 DVB USB driver
3 *
4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22#ifndef AF9035_H
23#define AF9035_H
24
Antti Palosaari5a9abae2012-03-30 17:15:16 -030025/* prefix for dvb-usb log writings */
26#define DVB_USB_LOG_PREFIX "af9035"
27
Antti Palosaari7f882c22012-03-30 09:10:08 -030028#include "dvb-usb.h"
29
30struct reg_val {
31 u32 reg;
32 u8 val;
33};
34
35struct reg_val_mask {
36 u32 reg;
37 u8 val;
38 u8 mask;
39};
40
41struct usb_req {
42 u8 cmd;
43 u8 mbox;
44 u8 wlen;
45 u8 *wbuf;
46 u8 rlen;
47 u8 *rbuf;
48};
49
50struct config {
51 bool dual_mode;
Antti Palosaari5a9abae2012-03-30 17:15:16 -030052 bool hw_not_supported;
Antti Palosaari7f882c22012-03-30 09:10:08 -030053};
54
55struct fw_segment {
56#define SEGMENT_FW_DL 0
57#define SEGMENT_ROM_COPY 1
58#define SEGMENT_DIRECT_CMD 2
59 u8 type;
60 u32 len;
61};
62
63struct fw_header {
64#define SEGMENT_MAX_COUNT 6
65 u8 segment_count;
66 struct fw_segment segment[SEGMENT_MAX_COUNT];
67};
68
69u32 clock_lut[] = {
70 20480000, /* FPGA */
71 16384000, /* 16.38 MHz */
72 20480000, /* 20.48 MHz */
73 36000000, /* 36.00 MHz */
74 30000000, /* 30.00 MHz */
75 26000000, /* 26.00 MHz */
76 28000000, /* 28.00 MHz */
77 32000000, /* 32.00 MHz */
78 34000000, /* 34.00 MHz */
79 24000000, /* 24.00 MHz */
80 22000000, /* 22.00 MHz */
81 12000000, /* 12.00 MHz */
82};
83
Antti Palosaarif2b61d02012-04-05 20:28:51 -030084u32 clock_lut_it9135[] = {
85 12000000, /* 12.00 MHz */
86 20480000, /* 20.48 MHz */
87 36000000, /* 36.00 MHz */
88 30000000, /* 30.00 MHz */
89 26000000, /* 26.00 MHz */
90 28000000, /* 28.00 MHz */
91 32000000, /* 32.00 MHz */
92 34000000, /* 34.00 MHz */
93 24000000, /* 24.00 MHz */
94 22000000, /* 22.00 MHz */
95};
96
Antti Palosaari7f882c22012-03-30 09:10:08 -030097/* EEPROM locations */
98#define EEPROM_IR_MODE 0x430d
99#define EEPROM_DUAL_MODE 0x4326
100#define EEPROM_IR_TYPE 0x4329
101#define EEPROM_1_IFFREQ_L 0x432d
102#define EEPROM_1_IFFREQ_H 0x432e
103#define EEPROM_1_TUNER_ID 0x4331
104#define EEPROM_2_IFFREQ_L 0x433d
105#define EEPROM_2_IFFREQ_H 0x433e
106#define EEPROM_2_TUNER_ID 0x4341
107
108/* USB commands */
109#define CMD_MEM_RD 0x00
110#define CMD_MEM_WR 0x01
111#define CMD_I2C_RD 0x02
112#define CMD_I2C_WR 0x03
113#define CMD_FW_DL 0x21
114#define CMD_FW_QUERYINFO 0x22
115#define CMD_FW_BOOT 0x23
116#define CMD_FW_DL_BEGIN 0x24
117#define CMD_FW_DL_END 0x25
Antti Palosaarif2b61d02012-04-05 20:28:51 -0300118#define CMD_FW_SCATTER_WR 0x29
Antti Palosaari7f882c22012-03-30 09:10:08 -0300119
120#endif