Russell King | f32f4ce | 2009-05-16 12:14:21 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * linux/arch/arm/kernel/smp_twd.c |
| 3 | * |
| 4 | * Copyright (C) 2002 ARM Ltd. |
| 5 | * All Rights Reserved |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/delay.h> |
| 14 | #include <linux/device.h> |
| 15 | #include <linux/smp.h> |
| 16 | #include <linux/jiffies.h> |
| 17 | #include <linux/clockchips.h> |
| 18 | #include <linux/irq.h> |
| 19 | #include <linux/io.h> |
| 20 | |
| 21 | #include <asm/smp_twd.h> |
| 22 | #include <asm/hardware/gic.h> |
| 23 | |
| 24 | #define TWD_TIMER_LOAD 0x00 |
| 25 | #define TWD_TIMER_COUNTER 0x04 |
| 26 | #define TWD_TIMER_CONTROL 0x08 |
| 27 | #define TWD_TIMER_INTSTAT 0x0C |
| 28 | |
| 29 | #define TWD_WDOG_LOAD 0x20 |
| 30 | #define TWD_WDOG_COUNTER 0x24 |
| 31 | #define TWD_WDOG_CONTROL 0x28 |
| 32 | #define TWD_WDOG_INTSTAT 0x2C |
| 33 | #define TWD_WDOG_RESETSTAT 0x30 |
| 34 | #define TWD_WDOG_DISABLE 0x34 |
| 35 | |
| 36 | #define TWD_TIMER_CONTROL_ENABLE (1 << 0) |
| 37 | #define TWD_TIMER_CONTROL_ONESHOT (0 << 1) |
| 38 | #define TWD_TIMER_CONTROL_PERIODIC (1 << 1) |
| 39 | #define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2) |
| 40 | |
| 41 | /* set up by the platform code */ |
| 42 | void __iomem *twd_base; |
| 43 | |
| 44 | static unsigned long twd_timer_rate; |
| 45 | |
| 46 | static void twd_set_mode(enum clock_event_mode mode, |
| 47 | struct clock_event_device *clk) |
| 48 | { |
| 49 | unsigned long ctrl; |
| 50 | |
| 51 | switch(mode) { |
| 52 | case CLOCK_EVT_MODE_PERIODIC: |
| 53 | /* timer load already set up */ |
| 54 | ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE |
| 55 | | TWD_TIMER_CONTROL_PERIODIC; |
| 56 | break; |
| 57 | case CLOCK_EVT_MODE_ONESHOT: |
| 58 | /* period set, and timer enabled in 'next_event' hook */ |
| 59 | ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT; |
| 60 | break; |
| 61 | case CLOCK_EVT_MODE_UNUSED: |
| 62 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 63 | default: |
| 64 | ctrl = 0; |
| 65 | } |
| 66 | |
| 67 | __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL); |
| 68 | } |
| 69 | |
| 70 | static int twd_set_next_event(unsigned long evt, |
| 71 | struct clock_event_device *unused) |
| 72 | { |
| 73 | unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL); |
| 74 | |
| 75 | __raw_writel(evt, twd_base + TWD_TIMER_COUNTER); |
| 76 | __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, twd_base + TWD_TIMER_CONTROL); |
| 77 | |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | /* |
| 82 | * local_timer_ack: checks for a local timer interrupt. |
| 83 | * |
| 84 | * If a local timer interrupt has occurred, acknowledge and return 1. |
| 85 | * Otherwise, return 0. |
| 86 | */ |
| 87 | int twd_timer_ack(void) |
| 88 | { |
| 89 | if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) { |
| 90 | __raw_writel(1, twd_base + TWD_TIMER_INTSTAT); |
| 91 | return 1; |
| 92 | } |
| 93 | |
| 94 | return 0; |
| 95 | } |
| 96 | |
| 97 | static void __cpuinit twd_calibrate_rate(void) |
| 98 | { |
| 99 | unsigned long load, count; |
| 100 | u64 waitjiffies; |
| 101 | |
| 102 | /* |
| 103 | * If this is the first time round, we need to work out how fast |
| 104 | * the timer ticks |
| 105 | */ |
| 106 | if (twd_timer_rate == 0) { |
| 107 | printk("Calibrating local timer... "); |
| 108 | |
| 109 | /* Wait for a tick to start */ |
| 110 | waitjiffies = get_jiffies_64() + 1; |
| 111 | |
| 112 | while (get_jiffies_64() < waitjiffies) |
| 113 | udelay(10); |
| 114 | |
| 115 | /* OK, now the tick has started, let's get the timer going */ |
| 116 | waitjiffies += 5; |
| 117 | |
| 118 | /* enable, no interrupt or reload */ |
| 119 | __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL); |
| 120 | |
| 121 | /* maximum value */ |
| 122 | __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER); |
| 123 | |
| 124 | while (get_jiffies_64() < waitjiffies) |
| 125 | udelay(10); |
| 126 | |
| 127 | count = __raw_readl(twd_base + TWD_TIMER_COUNTER); |
| 128 | |
| 129 | twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); |
| 130 | |
| 131 | printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, |
| 132 | (twd_timer_rate / 100000) % 100); |
| 133 | } |
| 134 | |
| 135 | load = twd_timer_rate / HZ; |
| 136 | |
| 137 | __raw_writel(load, twd_base + TWD_TIMER_LOAD); |
| 138 | } |
| 139 | |
| 140 | /* |
| 141 | * Setup the local clock events for a CPU. |
| 142 | */ |
| 143 | void __cpuinit twd_timer_setup(struct clock_event_device *clk) |
| 144 | { |
| 145 | unsigned long flags; |
| 146 | |
| 147 | twd_calibrate_rate(); |
| 148 | |
| 149 | clk->name = "local_timer"; |
| 150 | clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; |
| 151 | clk->rating = 350; |
| 152 | clk->set_mode = twd_set_mode; |
| 153 | clk->set_next_event = twd_set_next_event; |
| 154 | clk->shift = 20; |
| 155 | clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift); |
| 156 | clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); |
| 157 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); |
| 158 | |
| 159 | /* Make sure our local interrupt controller has this enabled */ |
| 160 | local_irq_save(flags); |
| 161 | get_irq_chip(clk->irq)->unmask(clk->irq); |
| 162 | local_irq_restore(flags); |
| 163 | |
| 164 | clockevents_register_device(clk); |
| 165 | } |
| 166 | |
| 167 | /* |
| 168 | * take a local timer down |
| 169 | */ |
| 170 | void __cpuexit twd_timer_stop(void) |
| 171 | { |
| 172 | __raw_writel(0, twd_base + TWD_TIMER_CONTROL); |
| 173 | } |