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review.evervolv.com / android_kernel_oneplus_msm8996 / f5a6422d4e0e85a9c7f5522d3321254bfdfa7f04 / . / arch / arm / mach-omap2 / pm.h
blob: a43e0697b6bc1aa520f9979a264e2111b17eec0b [file] [log] [blame]
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]1/*
2 * OMAP2/3 Power Management Routines
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 * Jouni Hogander
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
12#define __ARCH_ARM_MACH_OMAP2_PM_H
13
Tony Lindgrence491cf2009-10-20 09:40:47 -0700[diff] [blame]14#include <plat/powerdomain.h>
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]15
Tero Kristo27d59a42008-10-13 13:15:00 +0300[diff] [blame]16extern void *omap3_secure_ram_storage;
Kevin Hilmanc40552b2009-10-06 14:25:09 -0700[diff] [blame]17extern void omap3_pm_off_mode_enable(int);
Rajendra Nayak99e6a4d2008-10-08 17:30:58 +0530[diff] [blame]18extern void omap_sram_idle(void);
Rajendra Nayak20b01662008-10-08 17:31:22 +0530[diff] [blame]19extern int omap3_can_sleep(void);
Santosh Shilimkareb6a2c72010-09-15 01:04:01 +0530[diff] [blame]20extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
Kalle Jokiniemi03433712008-09-26 11:04:20 +0300[diff] [blame]21extern int omap3_idle_init(void);
Tero Kristo27d59a42008-10-13 13:15:00 +0300[diff] [blame]22
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]23#if defined(CONFIG_PM_OPP)
24extern int omap3_opp_init(void);
Nishanth Menonf5a64222010-12-09 09:13:47 -0600[diff] [blame^]25extern int omap4_opp_init(void);
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]26#else
27static inline int omap3_opp_init(void)
28{
29 return -EINVAL;
30}
Nishanth Menonf5a64222010-12-09 09:13:47 -0600[diff] [blame^]31static inline int omap4_opp_init(void)
32{
33 return -EINVAL;
34}
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]35#endif
36
Kevin Hilmanbb4de3d2009-12-15 16:37:18 -0800[diff] [blame]37struct cpuidle_params {
Kalle Jokiniemi709731b2009-10-29 10:30:19 +0200[diff] [blame]38 u8 valid;
Kevin Hilmanbb4de3d2009-12-15 16:37:18 -0800[diff] [blame]39 u32 sleep_latency;
40 u32 wake_latency;
41 u32 threshold;
42};
43
44#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE)
45extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
46#else
47static
48inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
49{
50}
51#endif
52
Tero Kristo68d47782008-11-26 12:26:24 +0200[diff] [blame]53extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
54extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
55
Kevin Hilmand7814e42009-10-06 14:30:23 -0700[diff] [blame]56extern u32 wakeup_timer_seconds;
Ari Kauppi8e2efde2010-03-23 09:04:59 +0200[diff] [blame]57extern u32 wakeup_timer_milliseconds;
Kevin Hilmand7814e42009-10-06 14:30:23 -0700[diff] [blame]58extern struct omap_dm_timer *gptimer_wakeup;
59
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]60#ifdef CONFIG_PM_DEBUG
61extern void omap2_pm_dump(int mode, int resume, unsigned int us);
Santosh Shilimkar86b0c1e2010-09-15 01:03:59 +0530[diff] [blame]62extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]63extern int omap2_pm_debug;
Loïc Minierebfa88c2010-09-27 23:04:20 +0200[diff] [blame]64extern u32 enable_off_mode;
65extern u32 sleep_while_idle;
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]66#else
67#define omap2_pm_dump(mode, resume, us) do {} while (0);
Santosh Shilimkar86b0c1e2010-09-15 01:03:59 +0530[diff] [blame]68#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]69#define omap2_pm_debug 0
Loïc Minierebfa88c2010-09-27 23:04:20 +0200[diff] [blame]70#define enable_off_mode 0
71#define sleep_while_idle 0
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]72#endif
73
Sanjeev Premi6af83b32010-01-28 23:16:43 +0530[diff] [blame]74#if defined(CONFIG_CPU_IDLE)
75extern void omap3_cpuidle_update_states(void);
76#endif
77
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]78#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]79extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
Tero Kristo2811d6b2008-10-29 13:31:24 +0200[diff] [blame]80extern int pm_dbg_regset_save(int reg_set);
81extern int pm_dbg_regset_init(int reg_set);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]82#else
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]83#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
Tero Kristo2811d6b2008-10-29 13:31:24 +0200[diff] [blame]84#define pm_dbg_regset_save(reg_set) do {} while (0);
85#define pm_dbg_regset_init(reg_set) do {} while (0);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]86#endif /* CONFIG_PM_DEBUG */
87
88extern void omap24xx_idle_loop_suspend(void);
89
90extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
91 void __iomem *sdrc_power);
92extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
93extern void save_secure_ram_context(u32 *addr);
Tero Kristo27d59a42008-10-13 13:15:00 +0300[diff] [blame]94extern void omap3_save_scratchpad_contents(void);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]95
96extern unsigned int omap24xx_idle_loop_suspend_sz;
97extern unsigned int omap34xx_suspend_sz;
98extern unsigned int save_secure_ram_context_sz;
99extern unsigned int omap24xx_cpu_suspend_sz;
100extern unsigned int omap34xx_cpu_suspend_sz;
101
102#endif