blob: dc7ab9c80611567baa497dffbe42d89e040e68e8 [file] [log] [blame]
Vitaly Bordugdf344032007-01-24 22:41:42 +03001/*
2 * MPC885 ADS Device Tree Source
3 *
4 * Copyright 2006 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12
13/ {
14 model = "MPC885ADS";
15 compatible = "mpc8xx";
16 #address-cells = <1>;
17 #size-cells = <1>;
Vitaly Bordugdf344032007-01-24 22:41:42 +030018
19 cpus {
Vitaly Bordugdf344032007-01-24 22:41:42 +030020 #address-cells = <1>;
21 #size-cells = <0>;
Vitaly Bordugdf344032007-01-24 22:41:42 +030022
23 PowerPC,885@0 {
24 device_type = "cpu";
25 reg = <0>;
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <2000>; // L1, 8K
29 i-cache-size = <2000>; // L1, 8K
30 timebase-frequency = <0>;
31 bus-frequency = <0>;
32 clock-frequency = <0>;
33 32-bit;
34 interrupts = <f 2>; // decrementer interrupt
Vitaly Bordugb8ce2272007-07-09 11:37:36 -070035 interrupt-parent = <&Mpc8xx_pic>;
Vitaly Bordugdf344032007-01-24 22:41:42 +030036 };
37 };
38
39 memory {
40 device_type = "memory";
Vitaly Bordugdf344032007-01-24 22:41:42 +030041 reg = <00000000 800000>;
42 };
43
44 soc885@ff000000 {
45 #address-cells = <1>;
46 #size-cells = <1>;
47 #interrupt-cells = <2>;
48 device_type = "soc";
49 ranges = <0 ff000000 00100000>;
50 reg = <ff000000 00000200>;
51 bus-frequency = <0>;
52 mdio@e80 {
53 device_type = "mdio";
54 compatible = "fs_enet";
55 reg = <e80 8>;
Vitaly Bordugdf344032007-01-24 22:41:42 +030056 #address-cells = <1>;
57 #size-cells = <0>;
Vitaly Bordugb8ce2272007-07-09 11:37:36 -070058 Phy0: ethernet-phy@0 {
Vitaly Bordugdf344032007-01-24 22:41:42 +030059 reg = <0>;
60 device_type = "ethernet-phy";
61 };
Vitaly Bordugb8ce2272007-07-09 11:37:36 -070062 Phy1: ethernet-phy@1 {
Vitaly Bordugdf344032007-01-24 22:41:42 +030063 reg = <1>;
64 device_type = "ethernet-phy";
65 };
Vitaly Bordugb8ce2272007-07-09 11:37:36 -070066 Phy2: ethernet-phy@2 {
Vitaly Bordugdf344032007-01-24 22:41:42 +030067 reg = <2>;
68 device_type = "ethernet-phy";
69 };
70 };
71
72 fec@e00 {
73 device_type = "network";
74 compatible = "fs_enet";
75 model = "FEC";
76 device-id = <1>;
77 reg = <e00 188>;
78 mac-address = [ 00 00 0C 00 01 FD ];
79 interrupts = <3 1>;
Vitaly Bordugb8ce2272007-07-09 11:37:36 -070080 interrupt-parent = <&Mpc8xx_pic>;
81 phy-handle = <&Phy1>;
Vitaly Bordugdf344032007-01-24 22:41:42 +030082 };
83
84 fec@1e00 {
85 device_type = "network";
86 compatible = "fs_enet";
87 model = "FEC";
88 device-id = <2>;
89 reg = <1e00 188>;
90 mac-address = [ 00 00 0C 00 02 FD ];
91 interrupts = <7 1>;
Vitaly Bordugb8ce2272007-07-09 11:37:36 -070092 interrupt-parent = <&Mpc8xx_pic>;
93 phy-handle = <&Phy2>;
Vitaly Bordugdf344032007-01-24 22:41:42 +030094 };
95
Vitaly Bordugb8ce2272007-07-09 11:37:36 -070096 Mpc8xx_pic: pic@ff000000 {
Vitaly Bordugdf344032007-01-24 22:41:42 +030097 interrupt-controller;
98 #address-cells = <0>;
99 #interrupt-cells = <2>;
100 reg = <0 24>;
101 built-in;
102 device_type = "mpc8xx-pic";
103 compatible = "CPM";
104 };
105
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700106 pcmcia@0080 {
107 #address-cells = <3>;
108 #interrupt-cells = <1>;
109 #size-cells = <2>;
110 compatible = "fsl,pq-pcmcia";
111 device_type = "pcmcia";
112 reg = <80 80>;
Vitaly Bordugb8ce2272007-07-09 11:37:36 -0700113 interrupt-parent = <&Mpc8xx_pic>;
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700114 interrupts = <d 1>;
115 };
116
Vitaly Bordugdf344032007-01-24 22:41:42 +0300117 cpm@ff000000 {
Vitaly Bordugdf344032007-01-24 22:41:42 +0300118 #address-cells = <1>;
119 #size-cells = <1>;
120 #interrupt-cells = <2>;
121 device_type = "cpm";
122 model = "CPM";
123 ranges = <0 0 4000>;
124 reg = <860 f0>;
125 command-proc = <9c0>;
126 brg-frequency = <0>;
127 interrupts = <0 2>; // cpm error interrupt
Vitaly Bordugb8ce2272007-07-09 11:37:36 -0700128 interrupt-parent = <&Cpm_pic>;
Vitaly Bordugdf344032007-01-24 22:41:42 +0300129
Vitaly Bordugb8ce2272007-07-09 11:37:36 -0700130 Cpm_pic: pic@930 {
Vitaly Bordugdf344032007-01-24 22:41:42 +0300131 interrupt-controller;
132 #address-cells = <0>;
133 #interrupt-cells = <2>;
134 interrupts = <5 2 0 2>;
Vitaly Bordugb8ce2272007-07-09 11:37:36 -0700135 interrupt-parent = <&Mpc8xx_pic>;
Vitaly Bordugdf344032007-01-24 22:41:42 +0300136 reg = <930 20>;
137 built-in;
138 device_type = "cpm-pic";
139 compatible = "CPM";
140 };
141
142 smc@a80 {
143 device_type = "serial";
144 compatible = "cpm_uart";
145 model = "SMC";
146 device-id = <1>;
147 reg = <a80 10 3e80 40>;
148 clock-setup = <00ffffff 0>;
149 rx-clock = <1>;
150 tx-clock = <1>;
151 current-speed = <0>;
152 interrupts = <4 3>;
Vitaly Bordugb8ce2272007-07-09 11:37:36 -0700153 interrupt-parent = <&Cpm_pic>;
Vitaly Bordugdf344032007-01-24 22:41:42 +0300154 };
155
156 smc@a90 {
157 device_type = "serial";
158 compatible = "cpm_uart";
159 model = "SMC";
160 device-id = <2>;
161 reg = <a90 20 3f80 40>;
162 clock-setup = <ff00ffff 90000>;
163 rx-clock = <2>;
164 tx-clock = <2>;
165 current-speed = <0>;
166 interrupts = <3 3>;
Vitaly Bordugb8ce2272007-07-09 11:37:36 -0700167 interrupt-parent = <&Cpm_pic>;
Vitaly Bordugdf344032007-01-24 22:41:42 +0300168 };
169
170 scc@a40 {
171 device_type = "network";
172 compatible = "fs_enet";
173 model = "SCC";
174 device-id = <3>;
175 reg = <a40 18 3e00 80>;
176 mac-address = [ 00 00 0C 00 03 FD ];
177 interrupts = <1c 3>;
Vitaly Bordugb8ce2272007-07-09 11:37:36 -0700178 interrupt-parent = <&Cpm_pic>;
179 phy-handle = <&Phy2>;
Vitaly Bordugdf344032007-01-24 22:41:42 +0300180 };
181 };
182 };
183};