| David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 1 | /* ASB2305-specific 8250 serial ports | 
|  | 2 | * | 
|  | 3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | 
|  | 4 | * Written by David Howells (dhowells@redhat.com) | 
|  | 5 | * | 
|  | 6 | * This program is free software; you can redistribute it and/or | 
|  | 7 | * modify it under the terms of the GNU General Public Licence | 
|  | 8 | * as published by the Free Software Foundation; either version | 
|  | 9 | * 2 of the Licence, or (at your option) any later version. | 
|  | 10 | */ | 
|  | 11 | #ifndef _ASM_UNIT_SERIAL_H | 
|  | 12 | #define _ASM_UNIT_SERIAL_H | 
|  | 13 |  | 
|  | 14 | #include <asm/cpu/cpu-regs.h> | 
|  | 15 | #include <asm/proc/irq.h> | 
|  | 16 | #include <linux/serial_reg.h> | 
|  | 17 |  | 
|  | 18 | #define SERIAL_PORT0_BASE_ADDRESS	0xA6FB0000 | 
|  | 19 | #define ASB2305_DEBUG_MCR	__SYSREG(0xA6FB0000 + UART_MCR * 2, u8) | 
|  | 20 |  | 
|  | 21 | #define SERIAL_IRQ	XIRQ0	/* Dual serial (PC16552)	(Hi) */ | 
|  | 22 |  | 
|  | 23 | /* | 
|  | 24 | * dispose of the /dev/ttyS0 serial port | 
|  | 25 | */ | 
|  | 26 | #ifndef CONFIG_GDBSTUB_ON_TTYSx | 
|  | 27 |  | 
|  | 28 | #define SERIAL_PORT_DFNS						\ | 
|  | 29 | {								\ | 
|  | 30 | .baud_base		= BASE_BAUD,				\ | 
|  | 31 | .irq			= SERIAL_IRQ,				\ | 
|  | 32 | .flags			= STD_COM_FLAGS,			\ | 
|  | 33 | .iomem_base		= (u8 *) SERIAL_PORT0_BASE_ADDRESS,	\ | 
|  | 34 | .iomem_reg_shift	= 2,					\ | 
|  | 35 | .io_type		= SERIAL_IO_MEM,			\ | 
|  | 36 | }, | 
|  | 37 |  | 
|  | 38 | #ifndef __ASSEMBLY__ | 
|  | 39 |  | 
|  | 40 | static inline void __debug_to_serial(const char *p, int n) | 
|  | 41 | { | 
|  | 42 | } | 
|  | 43 |  | 
|  | 44 | #endif /* !__ASSEMBLY__ */ | 
|  | 45 |  | 
|  | 46 | #else /* CONFIG_GDBSTUB_ON_TTYSx */ | 
|  | 47 |  | 
|  | 48 | #define SERIAL_PORT_DFNS /* stolen by gdb-stub */ | 
|  | 49 |  | 
|  | 50 | #if defined(CONFIG_GDBSTUB_ON_TTYS0) | 
|  | 51 | #define GDBPORT_SERIAL_RX	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX  * 4, u8) | 
|  | 52 | #define GDBPORT_SERIAL_TX	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX  * 4, u8) | 
|  | 53 | #define GDBPORT_SERIAL_DLL	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8) | 
|  | 54 | #define GDBPORT_SERIAL_DLM	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8) | 
|  | 55 | #define GDBPORT_SERIAL_IER	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8) | 
|  | 56 | #define GDBPORT_SERIAL_IIR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8) | 
|  | 57 | #define GDBPORT_SERIAL_FCR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8) | 
|  | 58 | #define GDBPORT_SERIAL_LCR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8) | 
|  | 59 | #define GDBPORT_SERIAL_MCR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8) | 
|  | 60 | #define GDBPORT_SERIAL_LSR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8) | 
|  | 61 | #define GDBPORT_SERIAL_MSR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8) | 
|  | 62 | #define GDBPORT_SERIAL_SCR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8) | 
|  | 63 | #define GDBPORT_SERIAL_IRQ	SERIAL_IRQ | 
|  | 64 |  | 
|  | 65 | #elif defined(CONFIG_GDBSTUB_ON_TTYS1) | 
|  | 66 | #error The ASB2305 doesnt have a /dev/ttyS1 | 
|  | 67 | #endif | 
|  | 68 |  | 
|  | 69 | #ifndef __ASSEMBLY__ | 
|  | 70 |  | 
|  | 71 | #define TTYS0_TX	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX  * 4, u8) | 
|  | 72 | #define TTYS0_MCR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8) | 
|  | 73 | #define TTYS0_LSR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8) | 
|  | 74 | #define TTYS0_MSR	__SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8) | 
|  | 75 |  | 
|  | 76 | #define LSR_WAIT_FOR(STATE)				\ | 
|  | 77 | do {							\ | 
|  | 78 | while (!(TTYS0_LSR & UART_LSR_##STATE)) {}	\ | 
|  | 79 | } while (0) | 
|  | 80 | #define FLOWCTL_WAIT_FOR(LINE)				\ | 
|  | 81 | do {							\ | 
|  | 82 | while (!(TTYS0_MSR & UART_MSR_##LINE)) {}	\ | 
|  | 83 | } while (0) | 
|  | 84 | #define FLOWCTL_CLEAR(LINE)			\ | 
|  | 85 | do {						\ | 
|  | 86 | TTYS0_MCR &= ~UART_MCR_##LINE;		\ | 
|  | 87 | } while (0) | 
|  | 88 | #define FLOWCTL_SET(LINE)			\ | 
|  | 89 | do {						\ | 
|  | 90 | TTYS0_MCR |= UART_MCR_##LINE;		\ | 
|  | 91 | } while (0) | 
|  | 92 | #define FLOWCTL_QUERY(LINE)	({ TTYS0_MSR & UART_MSR_##LINE; }) | 
|  | 93 |  | 
|  | 94 | static inline void __debug_to_serial(const char *p, int n) | 
|  | 95 | { | 
|  | 96 | char ch; | 
|  | 97 |  | 
|  | 98 | FLOWCTL_SET(DTR); | 
|  | 99 |  | 
|  | 100 | for (; n > 0; n--) { | 
|  | 101 | LSR_WAIT_FOR(THRE); | 
|  | 102 | FLOWCTL_WAIT_FOR(CTS); | 
|  | 103 |  | 
|  | 104 | ch = *p++; | 
|  | 105 | if (ch == 0x0a) { | 
|  | 106 | TTYS0_TX = 0x0d; | 
|  | 107 | LSR_WAIT_FOR(THRE); | 
|  | 108 | FLOWCTL_WAIT_FOR(CTS); | 
|  | 109 | } | 
|  | 110 | TTYS0_TX = ch; | 
|  | 111 | } | 
|  | 112 |  | 
|  | 113 | FLOWCTL_CLEAR(DTR); | 
|  | 114 | } | 
|  | 115 |  | 
|  | 116 | #endif /* !__ASSEMBLY__ */ | 
|  | 117 |  | 
|  | 118 | #endif /* CONFIG_GDBSTUB_ON_TTYSx */ | 
|  | 119 |  | 
|  | 120 | #endif /* _ASM_UNIT_SERIAL_H */ |