blob: bf12af46132e07e48fee7ed0a0c8c4f5ce7bba2f [file] [log] [blame]
Andrew Isaacsonf137e462005-10-19 23:56:38 -07001/*
2 * Copyright (C) 2000,2001,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/*
20 * These are routines to set up and handle interrupts from the
21 * bcm1480 general purpose timer 0. We're using the timer as a
22 * system clock, so we set it up to run at 100 Hz. On every
23 * interrupt, we update our idea of what the time of day is,
24 * then call do_timer() in the architecture-independent kernel
25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.)
27 */
Andrew Isaacsonf137e462005-10-19 23:56:38 -070028#include <linux/interrupt.h>
29#include <linux/sched.h>
30#include <linux/spinlock.h>
31#include <linux/kernel_stat.h>
32
33#include <asm/irq.h>
Andrew Isaacsonf137e462005-10-19 23:56:38 -070034#include <asm/addrspace.h>
35#include <asm/time.h>
36#include <asm/io.h>
37
38#include <asm/sibyte/bcm1480_regs.h>
39#include <asm/sibyte/sb1250_regs.h>
40#include <asm/sibyte/bcm1480_int.h>
41#include <asm/sibyte/bcm1480_scd.h>
42
43#include <asm/sibyte/sb1250.h>
44
45
46#define IMR_IP2_VAL K_BCM1480_INT_MAP_I0
47#define IMR_IP3_VAL K_BCM1480_INT_MAP_I1
48#define IMR_IP4_VAL K_BCM1480_INT_MAP_I2
49
50extern int bcm1480_steal_irq(int irq);
51
52void bcm1480_time_init(void)
53{
54 int cpu = smp_processor_id();
55 int irq = K_BCM1480_INT_TIMER_0+cpu;
56
57 /* Only have 4 general purpose timers */
58 if (cpu > 3) {
59 BUG();
60 }
61
62 if (!cpu) {
63 /* Use our own gettimeoffset() routine */
64 do_gettimeoffset = bcm1480_gettimeoffset;
65 }
66
67 bcm1480_mask_irq(cpu, irq);
68
69 /* Map the timer interrupt to ip[4] of this cpu */
70 __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H)
71 + (irq<<3)));
72
73 /* the general purpose timer ticks at 1 Mhz independent of the rest of the system */
74 /* Disable the timer and set up the count */
75 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
76 __raw_writeq(
77#ifndef CONFIG_SIMULATION
78 1000000/HZ
79#else
80 50000/HZ
81#endif
82 , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
83
84 /* Set the timer running */
85 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
86 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
87
88 bcm1480_unmask_irq(cpu, irq);
89 bcm1480_steal_irq(irq);
90 /*
91 * This interrupt is "special" in that it doesn't use the request_irq
92 * way to hook the irq line. The timer interrupt is initialized early
93 * enough to make this a major pain, and it's also firing enough to
94 * warrant a bit of special case code. bcm1480_timer_interrupt is
95 * called directly from irq_handler.S when IP[4] is set during an
96 * interrupt
97 */
98}
99
100#include <asm/sibyte/sb1250.h>
101
Ralf Baechle937a8012006-10-07 19:44:33 +0100102void bcm1480_timer_interrupt(void)
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700103{
104 int cpu = smp_processor_id();
Ralf Baechle937a8012006-10-07 19:44:33 +0100105 int irq = K_BCM1480_INT_TIMER_0 + cpu;
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700106
107 /* Reset the timer */
108 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
109 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
110
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700111 if (cpu == 0) {
[MIPS] James E Wilsone1701fb2006-02-27 15:04:38 -0800112 /*
113 * CPU 0 handles the global timer interrupt job
114 */
Ralf Baechle937a8012006-10-07 19:44:33 +0100115 ll_timer_interrupt(irq);
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700116 }
[MIPS] James E Wilsone1701fb2006-02-27 15:04:38 -0800117 else {
118 /*
119 * other CPUs should just do profiling and process accounting
120 */
Ralf Baechle937a8012006-10-07 19:44:33 +0100121 ll_local_timer_interrupt(irq);
[MIPS] James E Wilsone1701fb2006-02-27 15:04:38 -0800122 }
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700123}
124
125/*
126 * We use our own do_gettimeoffset() instead of the generic one,
127 * because the generic one does not work for SMP case.
128 * In addition, since we use general timer 0 for system time,
129 * we can get accurate intra-jiffy offset without calibration.
130 */
131unsigned long bcm1480_gettimeoffset(void)
132{
133 unsigned long count =
134 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
135
136 return 1000000/HZ - count;
137}