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review.evervolv.com / android_kernel_oneplus_msm8996 / f9e7592230b72acb703e6c29691d587341b6c710 / . / arch / arm / boot / dts / kirkwood.dtsi
blob: a990c30f0a2602936f76c3cd79cca99e2966ad40 [file] [log] [blame]
Jason Cooper3d468b62012-02-27 16:07:13 +0000[diff] [blame]1/include/ "skeleton.dtsi"
2
3/ {
Andrew Lunn77843502012-07-18 19:22:54 +0200[diff] [blame]4 compatible = "marvell,kirkwood";
Andrew Lunn278b45b2012-06-27 13:40:04 +0200[diff] [blame]5 interrupt-parent = <&intc>;
6
Andrew Lunnf9e75922012-11-17 17:00:44 +0100[diff] [blame^]7 aliases {
8 gpio0 = &gpio0;
9 gpio1 = &gpio1;
10 };
Andrew Lunn278b45b2012-06-27 13:40:04 +0200[diff] [blame]11 intc: interrupt-controller {
12 compatible = "marvell,orion-intc", "marvell,intc";
13 interrupt-controller;
14 #interrupt-cells = <1>;
15 reg = <0xf1020204 0x04>,
16 <0xf1020214 0x04>;
17 };
Jason Cooper3d468b62012-02-27 16:07:13 +0000[diff] [blame]18
Jason Cooper163f2ce2012-03-15 01:00:27 +0000[diff] [blame]19 ocp@f1000000 {
20 compatible = "simple-bus";
Andrew Lunnf37fbd32012-09-03 20:29:34 +0200[diff] [blame]21 ranges = <0x00000000 0xf1000000 0x4000000
22 0xf5000000 0xf5000000 0x0000400>;
Jason Cooper163f2ce2012-03-15 01:00:27 +0000[diff] [blame]23 #address-cells = <1>;
24 #size-cells = <1>;
25
Andrew Lunn278b45b2012-06-27 13:40:04 +0200[diff] [blame]26 gpio0: gpio@10100 {
27 compatible = "marvell,orion-gpio";
28 #gpio-cells = <2>;
29 gpio-controller;
30 reg = <0x10100 0x40>;
Andrew Lunnf9e75922012-11-17 17:00:44 +0100[diff] [blame^]31 ngpios = <32>;
32 interrupt-controller;
Andrew Lunn278b45b2012-06-27 13:40:04 +0200[diff] [blame]33 interrupts = <35>, <36>, <37>, <38>;
34 };
35
36 gpio1: gpio@10140 {
37 compatible = "marvell,orion-gpio";
38 #gpio-cells = <2>;
39 gpio-controller;
40 reg = <0x10140 0x40>;
Andrew Lunnf9e75922012-11-17 17:00:44 +0100[diff] [blame^]41 ngpios = <18>;
42 interrupt-controller;
Andrew Lunn278b45b2012-06-27 13:40:04 +0200[diff] [blame]43 interrupts = <39>, <40>, <41>;
44 };
45
Jason Cooper163f2ce2012-03-15 01:00:27 +0000[diff] [blame]46 serial@12000 {
47 compatible = "ns16550a";
48 reg = <0x12000 0x100>;
49 reg-shift = <2>;
50 interrupts = <33>;
51 /* set clock-frequency in board dts */
52 status = "disabled";
53 };
54
55 serial@12100 {
56 compatible = "ns16550a";
57 reg = <0x12100 0x100>;
58 reg-shift = <2>;
59 interrupts = <34>;
60 /* set clock-frequency in board dts */
61 status = "disabled";
62 };
Jason Coopere871b872012-03-06 23:55:04 +0000[diff] [blame]63
64 rtc@10300 {
Andrew Lunn77843502012-07-18 19:22:54 +0200[diff] [blame]65 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
Jason Coopere871b872012-03-06 23:55:04 +0000[diff] [blame]66 reg = <0x10300 0x20>;
67 interrupts = <53>;
68 };
Jamie Lentin858156b2012-04-18 11:06:42 +0100[diff] [blame]69
Michael Walle76372122012-06-06 20:30:57 +0200[diff] [blame]70 spi@10600 {
71 compatible = "marvell,orion-spi";
72 #address-cells = <1>;
73 #size-cells = <0>;
74 cell-index = <0>;
75 interrupts = <23>;
76 reg = <0x10600 0x28>;
77 status = "disabled";
78 };
79
Andrew Lunn1e7bad02012-06-10 15:20:06 +0200[diff] [blame]80 wdt@20300 {
81 compatible = "marvell,orion-wdt";
82 reg = <0x20300 0x28>;
83 status = "okay";
84 };
85
Andrew Lunnb6cf8072012-10-20 13:10:01 +0200[diff] [blame]86 ehci@50000 {
87 compatible = "marvell,orion-ehci";
88 reg = <0x50000 0x1000>;
89 interrupts = <19>;
90 status = "okay";
91 };
92
Andrew Lunn97b414e2012-06-10 16:45:37 +0200[diff] [blame]93 sata@80000 {
94 compatible = "marvell,orion-sata";
95 reg = <0x80000 0x5000>;
96 interrupts = <21>;
97 status = "disabled";
98 };
99
Jamie Lentin858156b2012-04-18 11:06:42 +0100[diff] [blame]100 nand@3000000 {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 cle = <0>;
104 ale = <1>;
105 bank-width = <1>;
Andrew Lunn77843502012-07-18 19:22:54 +0200[diff] [blame]106 compatible = "marvell,orion-nand";
Jamie Lentin858156b2012-04-18 11:06:42 +0100[diff] [blame]107 reg = <0x3000000 0x400>;
108 chip-delay = <25>;
109 /* set partition map and/or chip-delay in board dts */
110 status = "disabled";
111 };
Andrew Lunne91cac02012-07-20 13:51:55 +0200[diff] [blame]112
113 i2c@11000 {
114 compatible = "marvell,mv64xxx-i2c";
115 reg = <0x11000 0x20>;
116 #address-cells = <1>;
117 #size-cells = <0>;
118 interrupts = <29>;
119 clock-frequency = <100000>;
120 status = "disabled";
121 };
Andrew Lunnf37fbd32012-09-03 20:29:34 +0200[diff] [blame]122
123 crypto@30000 {
124 compatible = "marvell,orion-crypto";
125 reg = <0x30000 0x10000>,
126 <0xf5000000 0x800>;
127 reg-names = "regs", "sram";
128 interrupts = <22>;
129 status = "okay";
130 };
Jason Cooper163f2ce2012-03-15 01:00:27 +0000[diff] [blame]131 };
132};