| Peter Ujfalusi | 3f187f8 | 2012-07-26 17:01:32 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for OMAP243x SoC |
| 3 | * |
| 4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of any |
| 8 | * kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | /include/ "omap2.dtsi" |
| 12 | |
| 13 | / { |
| 14 | compatible = "ti,omap2430", "ti,omap2"; |
| 15 | |
| 16 | ocp { |
| Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 17 | omap2430_pmx: pinmux@49002030 { |
| 18 | compatible = "ti,omap2430-padconf", "pinctrl-single"; |
| 19 | reg = <0x49002030 0x0154>; |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <0>; |
| 22 | pinctrl-single,register-width = <8>; |
| 23 | pinctrl-single,function-mask = <0x3f>; |
| 24 | }; |
| 25 | |
| Peter Ujfalusi | 3f187f8 | 2012-07-26 17:01:32 +0300 | [diff] [blame] | 26 | mcbsp1: mcbsp@48074000 { |
| 27 | compatible = "ti,omap2430-mcbsp"; |
| 28 | reg = <0x48074000 0xff>; |
| 29 | reg-names = "mpu"; |
| 30 | interrupts = <64>, /* OCP compliant interrupt */ |
| 31 | <59>, /* TX interrupt */ |
| 32 | <60>, /* RX interrupt */ |
| 33 | <61>; /* RX overflow interrupt */ |
| 34 | interrupt-names = "common", "tx", "rx", "rx_overflow"; |
| Peter Ujfalusi | 3f187f8 | 2012-07-26 17:01:32 +0300 | [diff] [blame] | 35 | ti,buffer-size = <128>; |
| 36 | ti,hwmods = "mcbsp1"; |
| 37 | }; |
| 38 | |
| 39 | mcbsp2: mcbsp@48076000 { |
| 40 | compatible = "ti,omap2430-mcbsp"; |
| 41 | reg = <0x48076000 0xff>; |
| 42 | reg-names = "mpu"; |
| 43 | interrupts = <16>, /* OCP compliant interrupt */ |
| 44 | <62>, /* TX interrupt */ |
| 45 | <63>; /* RX interrupt */ |
| 46 | interrupt-names = "common", "tx", "rx"; |
| Peter Ujfalusi | 3f187f8 | 2012-07-26 17:01:32 +0300 | [diff] [blame] | 47 | ti,buffer-size = <128>; |
| 48 | ti,hwmods = "mcbsp2"; |
| 49 | }; |
| 50 | |
| 51 | mcbsp3: mcbsp@4808c000 { |
| 52 | compatible = "ti,omap2430-mcbsp"; |
| 53 | reg = <0x4808c000 0xff>; |
| 54 | reg-names = "mpu"; |
| 55 | interrupts = <17>, /* OCP compliant interrupt */ |
| 56 | <89>, /* TX interrupt */ |
| 57 | <90>; /* RX interrupt */ |
| 58 | interrupt-names = "common", "tx", "rx"; |
| Peter Ujfalusi | 3f187f8 | 2012-07-26 17:01:32 +0300 | [diff] [blame] | 59 | ti,buffer-size = <128>; |
| 60 | ti,hwmods = "mcbsp3"; |
| 61 | }; |
| 62 | |
| 63 | mcbsp4: mcbsp@4808e000 { |
| 64 | compatible = "ti,omap2430-mcbsp"; |
| 65 | reg = <0x4808e000 0xff>; |
| 66 | reg-names = "mpu"; |
| 67 | interrupts = <18>, /* OCP compliant interrupt */ |
| 68 | <54>, /* TX interrupt */ |
| 69 | <55>; /* RX interrupt */ |
| 70 | interrupt-names = "common", "tx", "rx"; |
| Peter Ujfalusi | 3f187f8 | 2012-07-26 17:01:32 +0300 | [diff] [blame] | 71 | ti,buffer-size = <128>; |
| 72 | ti,hwmods = "mcbsp4"; |
| 73 | }; |
| 74 | |
| 75 | mcbsp5: mcbsp@48096000 { |
| 76 | compatible = "ti,omap2430-mcbsp"; |
| 77 | reg = <0x48096000 0xff>; |
| 78 | reg-names = "mpu"; |
| 79 | interrupts = <19>, /* OCP compliant interrupt */ |
| 80 | <81>, /* TX interrupt */ |
| 81 | <82>; /* RX interrupt */ |
| 82 | interrupt-names = "common", "tx", "rx"; |
| Peter Ujfalusi | 3f187f8 | 2012-07-26 17:01:32 +0300 | [diff] [blame] | 83 | ti,buffer-size = <128>; |
| 84 | ti,hwmods = "mcbsp5"; |
| 85 | }; |
| Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame^] | 86 | |
| 87 | timer1: timer@49018000 { |
| 88 | compatible = "ti,omap2-timer"; |
| 89 | reg = <0x49018000 0x400>; |
| 90 | interrupts = <37>; |
| 91 | ti,hwmods = "timer1"; |
| 92 | ti,timer-alwon; |
| 93 | }; |
| Peter Ujfalusi | 3f187f8 | 2012-07-26 17:01:32 +0300 | [diff] [blame] | 94 | }; |
| 95 | }; |