blob: 58fe40416709b5315d4cd03680504d9bb5463cdc [file] [log] [blame]
Mark Brownf701a2e2011-03-09 19:31:01 +00001/*
2 * wm8958-dsp2.c -- WM8958 DSP2 support
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/i2c.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21#include <sound/soc.h>
22#include <sound/initval.h>
23#include <sound/tlv.h>
24#include <trace/events/asoc.h>
25
26#include <linux/mfd/wm8994/core.h>
27#include <linux/mfd/wm8994/registers.h>
28#include <linux/mfd/wm8994/pdata.h>
29#include <linux/mfd/wm8994/gpio.h>
30
31#include "wm8994.h"
32
Mark Brownfbbf5922011-03-11 18:09:04 +000033#define WM_FW_BLOCK_INFO 0xff
34#define WM_FW_BLOCK_PM 0x00
35#define WM_FW_BLOCK_X 0x01
36#define WM_FW_BLOCK_Y 0x02
37#define WM_FW_BLOCK_Z 0x03
38#define WM_FW_BLOCK_I 0x06
39#define WM_FW_BLOCK_A 0x08
40#define WM_FW_BLOCK_C 0x0c
41
42static int wm8958_dsp2_fw(struct snd_soc_codec *codec, const char *name,
43 const struct firmware *fw, bool check)
44{
45 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
46 u64 data64;
47 u32 data32;
48 const u8 *data;
49 char *str;
50 size_t block_len, len;
51 int ret = 0;
52
53 /* Suppress unneeded downloads */
54 if (wm8994->cur_fw == fw)
55 return 0;
56
57 if (fw->size < 32) {
58 dev_err(codec->dev, "%s: firmware too short\n", name);
59 goto err;
60 }
61
62 if (memcmp(fw->data, "WMFW", 4) != 0) {
63 dev_err(codec->dev, "%s: firmware has bad file magic %08x\n",
64 name, data32);
65 goto err;
66 }
67
68 memcpy(&data32, fw->data + 4, sizeof(data32));
69 len = be32_to_cpu(data32);
70
71 memcpy(&data32, fw->data + 8, sizeof(data32));
72 data32 = be32_to_cpu(data32);
73 if ((data32 >> 24) & 0xff) {
74 dev_err(codec->dev, "%s: unsupported firmware version %d\n",
75 name, (data32 >> 24) & 0xff);
76 goto err;
77 }
78 if ((data32 & 0xffff) != 8958) {
79 dev_err(codec->dev, "%s: unsupported target device %d\n",
80 name, data32 & 0xffff);
81 goto err;
82 }
83 if (((data32 >> 16) & 0xff) != 0xc) {
84 dev_err(codec->dev, "%s: unsupported target core %d\n",
85 name, (data32 >> 16) & 0xff);
86 goto err;
87 }
88
89 if (check) {
90 memcpy(&data64, fw->data + 24, sizeof(u64));
91 dev_info(codec->dev, "%s timestamp %llx\n",
92 name, be64_to_cpu(data64));
93 } else {
94 snd_soc_write(codec, 0x102, 0x2);
95 snd_soc_write(codec, 0x900, 0x2);
96 }
97
98 data = fw->data + len;
99 len = fw->size - len;
100 while (len) {
101 if (len < 12) {
102 dev_err(codec->dev, "%s short data block of %d\n",
103 name, len);
104 goto err;
105 }
106
107 memcpy(&data32, data + 4, sizeof(data32));
108 block_len = be32_to_cpu(data32);
109 if (block_len + 8 > len) {
110 dev_err(codec->dev, "%d byte block longer than file\n",
111 block_len);
112 goto err;
113 }
114 if (block_len == 0) {
115 dev_err(codec->dev, "Zero length block\n");
116 goto err;
117 }
118
119 memcpy(&data32, data, sizeof(data32));
120 data32 = be32_to_cpu(data32);
121
122 switch ((data32 >> 24) & 0xff) {
123 case WM_FW_BLOCK_INFO:
124 /* Informational text */
125 if (!check)
126 break;
127
128 str = kzalloc(block_len + 1, GFP_KERNEL);
129 if (str) {
130 memcpy(str, data + 8, block_len);
131 dev_info(codec->dev, "%s: %s\n", name, str);
132 kfree(str);
133 } else {
134 dev_err(codec->dev, "Out of memory\n");
135 }
136 break;
137 case WM_FW_BLOCK_PM:
138 case WM_FW_BLOCK_X:
139 case WM_FW_BLOCK_Y:
140 case WM_FW_BLOCK_Z:
141 case WM_FW_BLOCK_I:
142 case WM_FW_BLOCK_A:
143 case WM_FW_BLOCK_C:
144 dev_dbg(codec->dev, "%s: %d bytes of %x@%x\n", name,
145 block_len, (data32 >> 24) & 0xff,
146 data32 & 0xffffff);
147
148 if (check)
149 break;
150
151 data32 &= 0xffffff;
152
153 wm8994_bulk_write(codec->control_data,
154 data32 & 0xffffff,
155 block_len / 2,
156 (void *)(data + 8));
157
158 break;
159 default:
160 dev_warn(codec->dev, "%s: unknown block type %d\n",
161 name, (data32 >> 24) & 0xff);
162 break;
163 }
164
165 /* Round up to the next 32 bit word */
166 block_len += block_len % 4;
167
168 data += block_len + 8;
169 len -= block_len + 8;
170 }
171
172 if (!check) {
173 dev_dbg(codec->dev, "%s: download done\n", name);
174 wm8994->cur_fw = fw;
175 } else {
176 dev_info(codec->dev, "%s: got firmware\n", name);
177 }
178
179 goto ok;
180
181err:
182 ret = -EINVAL;
183ok:
184 if (!check) {
185 snd_soc_write(codec, 0x900, 0x0);
186 snd_soc_write(codec, 0x102, 0x0);
187 }
188
189 return ret;
190}
191
Mark Brownf701a2e2011-03-09 19:31:01 +0000192static void wm8958_mbc_apply(struct snd_soc_codec *codec, int mbc, int start)
193{
194 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
195 struct wm8994_pdata *pdata = wm8994->pdata;
Mark Brownfbbf5922011-03-11 18:09:04 +0000196 int i;
197
198 /* If the DSP is already running then noop */
199 if (snd_soc_read(codec, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
200 return;
201
202 /* If we have MBC firmware download it */
203 if (wm8994->mbc)
204 wm8958_dsp2_fw(codec, "MBC", wm8994->mbc, false);
205
206 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
207 WM8958_DSP2_ENA, WM8958_DSP2_ENA);
208
209 /* If we've got user supplied MBC settings use them */
210 if (pdata && pdata->num_mbc_cfgs) {
211 struct wm8958_mbc_cfg *cfg
212 = &pdata->mbc_cfgs[wm8994->mbc_cfg];
213
214 for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
215 snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
216 cfg->coeff_regs[i]);
217
218 for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
219 snd_soc_write(codec,
220 i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
221 cfg->cutoff_regs[i]);
222 }
223
224 /* Run the DSP */
225 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
226 WM8958_DSP2_RUNR);
227
228 /* And we're off! */
229 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
230 WM8958_MBC_ENA |
231 WM8958_MBC_SEL_MASK,
232 path << WM8958_MBC_SEL_SHIFT |
233 WM8958_MBC_ENA);
234}
235
236static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
237{
238 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
Mark Brownf701a2e2011-03-09 19:31:01 +0000239 int pwr_reg = snd_soc_read(codec, WM8994_POWER_MANAGEMENT_5);
240 int ena, reg, aif, i;
241
242 switch (mbc) {
243 case 0:
244 pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA);
245 aif = 0;
246 break;
247 case 1:
248 pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA);
249 aif = 0;
250 break;
251 case 2:
252 pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA);
253 aif = 1;
254 break;
255 default:
256 BUG();
257 return;
258 }
259
260 /* We can only enable the MBC if the AIF is enabled and we
261 * want it to be enabled. */
262 ena = pwr_reg && wm8994->mbc_ena[mbc];
263
264 reg = snd_soc_read(codec, WM8958_DSP2_PROGRAM);
265
266 dev_dbg(codec->dev, "MBC %d startup: %d, power: %x, DSP: %x\n",
267 mbc, start, pwr_reg, reg);
268
269 if (start && ena) {
270 /* If the DSP is already running then noop */
271 if (reg & WM8958_DSP2_ENA)
272 return;
273
Mark Brownc6b7b572011-03-11 18:13:12 +0000274 /* If neither AIFnCLK is not yet enabled postpone */
275 if (!(snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
276 & WM8994_AIF1CLK_ENA_MASK) &&
277 !(snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
278 & WM8994_AIF2CLK_ENA_MASK))
279 return;
280
Mark Brownfbbf5922011-03-11 18:09:04 +0000281 /* If we have MBC firmware download it */
282 if (wm8994->mbc && wm8994->mbc_ena[mbc])
283 wm8958_dsp2_fw(codec, "MBC", wm8994->mbc, false);
284
Mark Brownf701a2e2011-03-09 19:31:01 +0000285 /* Switch the clock over to the appropriate AIF */
286 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
287 WM8958_DSP2CLK_SRC | WM8958_DSP2CLK_ENA,
288 aif << WM8958_DSP2CLK_SRC_SHIFT |
289 WM8958_DSP2CLK_ENA);
290
291 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
292 WM8958_DSP2_ENA, WM8958_DSP2_ENA);
293
294 /* If we've got user supplied MBC settings use them */
295 if (pdata && pdata->num_mbc_cfgs) {
296 struct wm8958_mbc_cfg *cfg
297 = &pdata->mbc_cfgs[wm8994->mbc_cfg];
298
299 for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
300 snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
301 cfg->coeff_regs[i]);
302
303 for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
304 snd_soc_write(codec,
305 i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
306 cfg->cutoff_regs[i]);
307 }
308
309 /* Run the DSP */
310 snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
311 WM8958_DSP2_RUNR);
312
313 /* And we're off! */
314 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
315 WM8958_MBC_ENA | WM8958_MBC_SEL_MASK,
316 mbc << WM8958_MBC_SEL_SHIFT |
317 WM8958_MBC_ENA);
318 } else {
319 /* If the DSP is already stopped then noop */
320 if (!(reg & WM8958_DSP2_ENA))
321 return;
322
323 snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
324 WM8958_MBC_ENA, 0);
325 snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
326 WM8958_DSP2_ENA, 0);
327 snd_soc_update_bits(codec, WM8994_CLOCKING_1,
328 WM8958_DSP2CLK_ENA, 0);
329 }
330}
331
332int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
333 struct snd_kcontrol *kcontrol, int event)
334{
335 struct snd_soc_codec *codec = w->codec;
Mark Brownc6b7b572011-03-11 18:13:12 +0000336 int i;
Mark Brownf701a2e2011-03-09 19:31:01 +0000337
338 switch (event) {
339 case SND_SOC_DAPM_POST_PMU:
Mark Brownc6b7b572011-03-11 18:13:12 +0000340 case SND_SOC_DAPM_PRE_PMU:
341 for (i = 0; i < 3; i++)
342 wm8958_mbc_apply(codec, i, 1);
Mark Brownf701a2e2011-03-09 19:31:01 +0000343 break;
344 case SND_SOC_DAPM_POST_PMD:
Mark Brownc6b7b572011-03-11 18:13:12 +0000345 case SND_SOC_DAPM_PRE_PMD:
346 for (i = 0; i < 3; i++)
347 wm8958_mbc_apply(codec, i, 0);
Mark Brownf701a2e2011-03-09 19:31:01 +0000348 break;
349 }
350
351 return 0;
352}
353
354static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
355 struct snd_ctl_elem_value *ucontrol)
356{
357 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
358 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
359 struct wm8994_pdata *pdata = wm8994->pdata;
360 int value = ucontrol->value.integer.value[0];
361 int reg;
362
363 /* Don't allow on the fly reconfiguration */
364 reg = snd_soc_read(codec, WM8994_CLOCKING_1);
365 if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
366 return -EBUSY;
367
368 if (value >= pdata->num_mbc_cfgs)
369 return -EINVAL;
370
371 wm8994->mbc_cfg = value;
372
373 return 0;
374}
375
376static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol,
377 struct snd_ctl_elem_value *ucontrol)
378{
379 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
380 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
381
382 ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg;
383
384 return 0;
385}
386
387static int wm8958_mbc_info(struct snd_kcontrol *kcontrol,
388 struct snd_ctl_elem_info *uinfo)
389{
390 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
391 uinfo->count = 1;
392 uinfo->value.integer.min = 0;
393 uinfo->value.integer.max = 1;
394 return 0;
395}
396
397static int wm8958_mbc_get(struct snd_kcontrol *kcontrol,
398 struct snd_ctl_elem_value *ucontrol)
399{
400 int mbc = kcontrol->private_value;
401 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
402 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
403
404 ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc];
405
406 return 0;
407}
408
409static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
410 struct snd_ctl_elem_value *ucontrol)
411{
412 int mbc = kcontrol->private_value;
413 int i;
414 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
415 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
416
417 if (ucontrol->value.integer.value[0] > 1)
418 return -EINVAL;
419
420 for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
421 if (mbc != i && wm8994->mbc_ena[i]) {
422 dev_dbg(codec->dev, "MBC %d active already\n", mbc);
423 return -EBUSY;
424 }
425 }
426
427 wm8994->mbc_ena[mbc] = ucontrol->value.integer.value[0];
428
429 wm8958_mbc_apply(codec, mbc, wm8994->mbc_ena[mbc]);
430
431 return 0;
432}
433
434#define WM8958_MBC_SWITCH(xname, xval) {\
435 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
436 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
437 .info = wm8958_mbc_info, \
438 .get = wm8958_mbc_get, .put = wm8958_mbc_put, \
439 .private_value = xval }
440
441static const struct snd_kcontrol_new wm8958_mbc_snd_controls[] = {
442WM8958_MBC_SWITCH("AIF1DAC1 MBC Switch", 0),
443WM8958_MBC_SWITCH("AIF1DAC2 MBC Switch", 1),
444WM8958_MBC_SWITCH("AIF2DAC MBC Switch", 2),
445};
446
Mark Brownfbbf5922011-03-11 18:09:04 +0000447static void wm8958_mbc_loaded(const struct firmware *fw, void *context)
448{
449 struct snd_soc_codec *codec = context;
450 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
451
452 if (fw && wm8958_dsp2_fw(codec, "MBC", fw, true) != 0) {
453 mutex_lock(&codec->mutex);
454 wm8994->mbc = fw;
455 mutex_unlock(&codec->mutex);
456 }
457}
458
Mark Brownf701a2e2011-03-09 19:31:01 +0000459void wm8958_dsp2_init(struct snd_soc_codec *codec)
460{
461 struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
462 struct wm8994_pdata *pdata = wm8994->pdata;
463 int ret, i;
464
465 snd_soc_add_controls(codec, wm8958_mbc_snd_controls,
466 ARRAY_SIZE(wm8958_mbc_snd_controls));
467
Mark Brownfbbf5922011-03-11 18:09:04 +0000468 /* We don't require firmware and don't want to delay boot */
469 request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
470 "wm8958_mbc.wfw", codec->dev, GFP_KERNEL,
471 codec, wm8958_mbc_loaded);
472
Mark Brownf701a2e2011-03-09 19:31:01 +0000473 if (!pdata)
474 return;
475
476 if (pdata->num_mbc_cfgs) {
477 struct snd_kcontrol_new control[] = {
478 SOC_ENUM_EXT("MBC Mode", wm8994->mbc_enum,
479 wm8958_get_mbc_enum, wm8958_put_mbc_enum),
480 };
481
482 /* We need an array of texts for the enum API */
483 wm8994->mbc_texts = kmalloc(sizeof(char *)
484 * pdata->num_mbc_cfgs, GFP_KERNEL);
485 if (!wm8994->mbc_texts) {
486 dev_err(wm8994->codec->dev,
487 "Failed to allocate %d MBC config texts\n",
488 pdata->num_mbc_cfgs);
489 return;
490 }
491
492 for (i = 0; i < pdata->num_mbc_cfgs; i++)
493 wm8994->mbc_texts[i] = pdata->mbc_cfgs[i].name;
494
495 wm8994->mbc_enum.max = pdata->num_mbc_cfgs;
496 wm8994->mbc_enum.texts = wm8994->mbc_texts;
497
498 ret = snd_soc_add_controls(wm8994->codec, control, 1);
499 if (ret != 0)
500 dev_err(wm8994->codec->dev,
501 "Failed to add MBC mode controls: %d\n", ret);
502 }
503
504
505}