Josh Boyer | fd0ed74 | 2008-03-06 21:15:07 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * Device Tree Source for AMCC Yosemite |
| 3 | * |
| 4 | * Copyright 2008 IBM Corp. |
| 5 | * Josh Boyer <jwboyer@linux.vnet.ibm.com> |
| 6 | * |
| 7 | * This file is licensed under the terms of the GNU General Public |
| 8 | * License version 2. This program is licensed "as is" without |
| 9 | * any warranty of any kind, whether express or implied. |
| 10 | */ |
| 11 | |
| 12 | / { |
| 13 | #address-cells = <2>; |
| 14 | #size-cells = <1>; |
| 15 | model = "amcc,yosemite"; |
| 16 | compatible = "amcc,yosemite","amcc,bamboo"; |
| 17 | dcr-parent = <&/cpus/cpu@0>; |
| 18 | |
| 19 | aliases { |
| 20 | ethernet0 = &EMAC0; |
| 21 | ethernet1 = &EMAC1; |
| 22 | serial0 = &UART0; |
| 23 | serial1 = &UART1; |
| 24 | serial2 = &UART2; |
| 25 | serial3 = &UART3; |
| 26 | }; |
| 27 | |
| 28 | cpus { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <0>; |
| 31 | |
| 32 | cpu@0 { |
| 33 | device_type = "cpu"; |
| 34 | model = "PowerPC,440EP"; |
| 35 | reg = <0>; |
| 36 | clock-frequency = <0>; /* Filled in by zImage */ |
| 37 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 38 | i-cache-line-size = <20>; |
| 39 | d-cache-line-size = <20>; |
| 40 | i-cache-size = <8000>; |
| 41 | d-cache-size = <8000>; |
| 42 | dcr-controller; |
| 43 | dcr-access-method = "native"; |
| 44 | }; |
| 45 | }; |
| 46 | |
| 47 | memory { |
| 48 | device_type = "memory"; |
| 49 | reg = <0 0 0>; /* Filled in by zImage */ |
| 50 | }; |
| 51 | |
| 52 | UIC0: interrupt-controller0 { |
| 53 | compatible = "ibm,uic-440ep","ibm,uic"; |
| 54 | interrupt-controller; |
| 55 | cell-index = <0>; |
| 56 | dcr-reg = <0c0 009>; |
| 57 | #address-cells = <0>; |
| 58 | #size-cells = <0>; |
| 59 | #interrupt-cells = <2>; |
| 60 | }; |
| 61 | |
| 62 | UIC1: interrupt-controller1 { |
| 63 | compatible = "ibm,uic-440ep","ibm,uic"; |
| 64 | interrupt-controller; |
| 65 | cell-index = <1>; |
| 66 | dcr-reg = <0d0 009>; |
| 67 | #address-cells = <0>; |
| 68 | #size-cells = <0>; |
| 69 | #interrupt-cells = <2>; |
| 70 | interrupts = <1e 4 1f 4>; /* cascade */ |
| 71 | interrupt-parent = <&UIC0>; |
| 72 | }; |
| 73 | |
| 74 | SDR0: sdr { |
| 75 | compatible = "ibm,sdr-440ep"; |
| 76 | dcr-reg = <00e 002>; |
| 77 | }; |
| 78 | |
| 79 | CPR0: cpr { |
| 80 | compatible = "ibm,cpr-440ep"; |
| 81 | dcr-reg = <00c 002>; |
| 82 | }; |
| 83 | |
| 84 | plb { |
| 85 | compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; |
| 86 | #address-cells = <2>; |
| 87 | #size-cells = <1>; |
| 88 | ranges; |
| 89 | clock-frequency = <0>; /* Filled in by zImage */ |
| 90 | |
| 91 | SDRAM0: sdram { |
| 92 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
| 93 | dcr-reg = <010 2>; |
| 94 | }; |
| 95 | |
| 96 | DMA0: dma { |
| 97 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
| 98 | dcr-reg = <100 027>; |
| 99 | }; |
| 100 | |
| 101 | MAL0: mcmal { |
| 102 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
| 103 | dcr-reg = <180 62>; |
| 104 | num-tx-chans = <4>; |
| 105 | num-rx-chans = <2>; |
| 106 | interrupt-parent = <&MAL0>; |
| 107 | interrupts = <0 1 2 3 4>; |
| 108 | #interrupt-cells = <1>; |
| 109 | #address-cells = <0>; |
| 110 | #size-cells = <0>; |
| 111 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 |
| 112 | /*RXEOB*/ 1 &UIC0 b 4 |
| 113 | /*SERR*/ 2 &UIC1 0 4 |
| 114 | /*TXDE*/ 3 &UIC1 1 4 |
| 115 | /*RXDE*/ 4 &UIC1 2 4>; |
| 116 | }; |
| 117 | |
| 118 | POB0: opb { |
| 119 | compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; |
| 120 | #address-cells = <1>; |
| 121 | #size-cells = <1>; |
| 122 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN |
| 123 | * bits. |
| 124 | */ |
| 125 | ranges = <00000000 0 00000000 80000000 |
| 126 | 80000000 0 80000000 80000000>; |
| 127 | interrupt-parent = <&UIC1>; |
| 128 | interrupts = <7 4>; |
| 129 | clock-frequency = <0>; /* Filled in by zImage */ |
| 130 | |
| 131 | EBC0: ebc { |
| 132 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
| 133 | dcr-reg = <012 2>; |
| 134 | #address-cells = <2>; |
| 135 | #size-cells = <1>; |
| 136 | clock-frequency = <0>; /* Filled in by zImage */ |
| 137 | interrupts = <5 1>; |
| 138 | interrupt-parent = <&UIC1>; |
| 139 | }; |
| 140 | |
| 141 | UART0: serial@ef600300 { |
| 142 | device_type = "serial"; |
| 143 | compatible = "ns16550"; |
| 144 | reg = <ef600300 8>; |
| 145 | virtual-reg = <ef600300>; |
| 146 | clock-frequency = <0>; /* Filled in by zImage */ |
| 147 | current-speed = <1c200>; |
| 148 | interrupt-parent = <&UIC0>; |
| 149 | interrupts = <0 4>; |
| 150 | }; |
| 151 | |
| 152 | UART1: serial@ef600400 { |
| 153 | device_type = "serial"; |
| 154 | compatible = "ns16550"; |
| 155 | reg = <ef600400 8>; |
| 156 | virtual-reg = <ef600400>; |
| 157 | clock-frequency = <0>; |
| 158 | current-speed = <0>; |
| 159 | interrupt-parent = <&UIC0>; |
| 160 | interrupts = <1 4>; |
| 161 | }; |
| 162 | |
| 163 | UART2: serial@ef600500 { |
| 164 | device_type = "serial"; |
| 165 | compatible = "ns16550"; |
| 166 | reg = <ef600500 8>; |
| 167 | virtual-reg = <ef600500>; |
| 168 | clock-frequency = <0>; |
| 169 | current-speed = <0>; |
| 170 | interrupt-parent = <&UIC0>; |
| 171 | interrupts = <3 4>; |
| 172 | status = "disabled"; |
| 173 | }; |
| 174 | |
| 175 | UART3: serial@ef600600 { |
| 176 | device_type = "serial"; |
| 177 | compatible = "ns16550"; |
| 178 | reg = <ef600600 8>; |
| 179 | virtual-reg = <ef600600>; |
| 180 | clock-frequency = <0>; |
| 181 | current-speed = <0>; |
| 182 | interrupt-parent = <&UIC0>; |
| 183 | interrupts = <4 4>; |
| 184 | status = "disabled"; |
| 185 | }; |
| 186 | |
| 187 | IIC0: i2c@ef600700 { |
| 188 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
| 189 | reg = <ef600700 14>; |
| 190 | interrupt-parent = <&UIC0>; |
| 191 | interrupts = <2 4>; |
| 192 | }; |
| 193 | |
| 194 | IIC1: i2c@ef600800 { |
| 195 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
| 196 | reg = <ef600800 14>; |
| 197 | interrupt-parent = <&UIC0>; |
| 198 | interrupts = <7 4>; |
| 199 | }; |
| 200 | |
| 201 | spi@ef600900 { |
| 202 | compatible = "amcc,spi-440ep"; |
| 203 | reg = <ef600900 6>; |
| 204 | interrupts = <8 4>; |
| 205 | interrupt-parent = <&UIC0>; |
| 206 | }; |
| 207 | |
| 208 | ZMII0: emac-zmii@ef600d00 { |
| 209 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
| 210 | reg = <ef600d00 c>; |
| 211 | }; |
| 212 | |
| 213 | EMAC0: ethernet@ef600e00 { |
| 214 | device_type = "network"; |
| 215 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
| 216 | interrupt-parent = <&UIC1>; |
| 217 | interrupts = <1c 4 1d 4>; |
| 218 | reg = <ef600e00 70>; |
| 219 | local-mac-address = [000000000000]; |
| 220 | mal-device = <&MAL0>; |
| 221 | mal-tx-channel = <0 1>; |
| 222 | mal-rx-channel = <0>; |
| 223 | cell-index = <0>; |
| 224 | max-frame-size = <5dc>; |
| 225 | rx-fifo-size = <1000>; |
| 226 | tx-fifo-size = <800>; |
| 227 | phy-mode = "rmii"; |
| 228 | phy-map = <00000000>; |
| 229 | zmii-device = <&ZMII0>; |
| 230 | zmii-channel = <0>; |
| 231 | }; |
| 232 | |
| 233 | EMAC1: ethernet@ef600f00 { |
| 234 | device_type = "network"; |
| 235 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
| 236 | interrupt-parent = <&UIC1>; |
| 237 | interrupts = <1e 4 1f 4>; |
| 238 | reg = <ef600f00 70>; |
| 239 | local-mac-address = [000000000000]; |
| 240 | mal-device = <&MAL0>; |
| 241 | mal-tx-channel = <2 3>; |
| 242 | mal-rx-channel = <1>; |
| 243 | cell-index = <1>; |
| 244 | max-frame-size = <5dc>; |
| 245 | rx-fifo-size = <1000>; |
| 246 | tx-fifo-size = <800>; |
| 247 | phy-mode = "rmii"; |
| 248 | phy-map = <00000000>; |
| 249 | zmii-device = <&ZMII0>; |
| 250 | zmii-channel = <1>; |
| 251 | }; |
| 252 | |
| 253 | usb@ef601000 { |
| 254 | compatible = "ohci-be"; |
| 255 | reg = <ef601000 80>; |
| 256 | interrupts = <8 4 9 4>; |
| 257 | interrupt-parent = < &UIC1 >; |
| 258 | }; |
| 259 | }; |
| 260 | |
| 261 | PCI0: pci@ec000000 { |
| 262 | device_type = "pci"; |
| 263 | #interrupt-cells = <1>; |
| 264 | #size-cells = <2>; |
| 265 | #address-cells = <3>; |
| 266 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; |
| 267 | primary; |
| 268 | reg = <0 eec00000 8 /* Config space access */ |
| 269 | 0 eed00000 4 /* IACK */ |
| 270 | 0 eed00000 4 /* Special cycle */ |
| 271 | 0 ef400000 40>; /* Internal registers */ |
| 272 | |
| 273 | /* Outbound ranges, one memory and one IO, |
| 274 | * later cannot be changed. Chip supports a second |
| 275 | * IO range but we don't use it for now |
| 276 | */ |
| 277 | ranges = <02000000 0 a0000000 0 a0000000 0 20000000 |
| 278 | 01000000 0 00000000 0 e8000000 0 00010000>; |
| 279 | |
| 280 | /* Inbound 2GB range starting at 0 */ |
| 281 | dma-ranges = <42000000 0 0 0 0 0 80000000>; |
| 282 | |
| 283 | /* Bamboo has all 4 IRQ pins tied together per slot */ |
| 284 | interrupt-map-mask = <f800 0 0 0>; |
| 285 | interrupt-map = < |
| 286 | /* IDSEL 1 */ |
| 287 | 0800 0 0 0 &UIC0 1c 8 |
| 288 | |
| 289 | /* IDSEL 2 */ |
| 290 | 1000 0 0 0 &UIC0 1b 8 |
| 291 | |
| 292 | /* IDSEL 3 */ |
| 293 | 1800 0 0 0 &UIC0 1a 8 |
| 294 | |
| 295 | /* IDSEL 4 */ |
| 296 | 2000 0 0 0 &UIC0 19 8 |
| 297 | >; |
| 298 | }; |
| 299 | }; |
| 300 | |
| 301 | chosen { |
| 302 | linux,stdout-path = "/plb/opb/serial@ef600300"; |
| 303 | }; |
| 304 | }; |