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review.evervolv.com / android_kernel_oneplus_msm8996 / ff266c0c91942cf56b03675ac5fc820b1ac600e1 / . / arch / arm / mach-s3c64xx / mach-real6410.c
blob: 1a0485ad4da6dd77e8a528d3da7b60fb9346611a [file] [log] [blame]
Darius Auguliseab5cfa2010-07-28 23:03:43 +0300[diff] [blame]1/* linux/arch/arm/mach-s3c64xx/mach-real6410.c
2 *
3 * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/list.h>
19#include <linux/init.h>
Darius Augulisff266c02010-08-01 23:38:43 +0300[diff] [blame^]20#include <linux/dm9000.h>
Darius Auguliseab5cfa2010-07-28 23:03:43 +0300[diff] [blame]21#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <mach/map.h>
27#include <mach/s3c6410.h>
Darius Augulisff266c02010-08-01 23:38:43 +0300[diff] [blame^]28#include <mach/regs-srom.h>
Darius Auguliseab5cfa2010-07-28 23:03:43 +0300[diff] [blame]29#include <plat/cpu.h>
30#include <plat/regs-serial.h>
31
32#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
33#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
34#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
35
36static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
37 [0] = {
38 .hwport = 0,
39 .flags = 0,
40 .ucon = UCON,
41 .ulcon = ULCON,
42 .ufcon = UFCON,
43 },
44 [1] = {
45 .hwport = 1,
46 .flags = 0,
47 .ucon = UCON,
48 .ulcon = ULCON,
49 .ufcon = UFCON,
50 },
51 [2] = {
52 .hwport = 2,
53 .flags = 0,
54 .ucon = UCON,
55 .ulcon = ULCON,
56 .ufcon = UFCON,
57 },
58 [3] = {
59 .hwport = 3,
60 .flags = 0,
61 .ucon = UCON,
62 .ulcon = ULCON,
63 .ufcon = UFCON,
64 },
65};
66
Darius Augulisff266c02010-08-01 23:38:43 +0300[diff] [blame^]67/* DM9000AEP 10/100 ethernet controller */
68
69static struct resource real6410_dm9k_resource[] = {
70 [0] = {
71 .start = S3C64XX_PA_XM0CSN1,
72 .end = S3C64XX_PA_XM0CSN1 + 1,
73 .flags = IORESOURCE_MEM
74 },
75 [1] = {
76 .start = S3C64XX_PA_XM0CSN1 + 4,
77 .end = S3C64XX_PA_XM0CSN1 + 5,
78 .flags = IORESOURCE_MEM
79 },
80 [2] = {
81 .start = S3C_EINT(7),
82 .end = S3C_EINT(7),
83 .flags = IORESOURCE_IRQ,
84 }
85};
86
87static struct dm9000_plat_data real6410_dm9k_pdata = {
88 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
89};
90
91static struct platform_device real6410_device_eth = {
92 .name = "dm9000",
93 .id = -1,
94 .num_resources = ARRAY_SIZE(real6410_dm9k_resource),
95 .resource = real6410_dm9k_resource,
96 .dev = {
97 .platform_data = &real6410_dm9k_pdata,
98 },
99};
100
101static struct platform_device *real6410_devices[] __initdata = {
102 &real6410_device_eth,
103};
104
Darius Auguliseab5cfa2010-07-28 23:03:43 +0300[diff] [blame]105static void __init real6410_map_io(void)
106{
107 s3c64xx_init_io(NULL, 0);
108 s3c24xx_init_clocks(12000000);
109 s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
110}
111
112static void __init real6410_machine_init(void)
113{
Darius Augulisff266c02010-08-01 23:38:43 +0300[diff] [blame^]114 u32 cs1;
115
116 /* configure nCS1 width to 16 bits */
117
118 cs1 = __raw_readl(S3C64XX_SROM_BW) &
119 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
120 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
121 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
122 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
123 S3C64XX_SROM_BW__NCS1__SHIFT;
124 __raw_writel(cs1, S3C64XX_SROM_BW);
125
126 /* set timing for nCS1 suitable for ethernet chip */
127
128 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
129 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
130 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
131 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
132 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
133 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
134 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
135
136 platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
Darius Auguliseab5cfa2010-07-28 23:03:43 +0300[diff] [blame]137}
138
139MACHINE_START(REAL6410, "REAL6410")
140 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
141 .phys_io = S3C_PA_UART & 0xfff00000,
142 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
143 .boot_params = S3C64XX_PA_SDRAM + 0x100,
144
145 .init_irq = s3c6410_init_irq,
146 .map_io = real6410_map_io,
147 .init_machine = real6410_machine_init,
148 .timer = &s3c24xx_timer,
149MACHINE_END