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review.evervolv.com / android_kernel_oneplus_msm8996 / ff5e4b51a397568c6a2901903c35a4bfaaf752a4 / . / arch / arm / kernel / head-nommu.S
blob: e5dfc2895e242b107799029f9fead9ffded41f80 [file] [log] [blame]
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]1/*
2 * linux/arch/arm/kernel/head-nommu.S
3 *
4 * Copyright (C) 1994-2002 Russell King
5 * Copyright (C) 2003-2006 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Common kernel startup code (non-paged MM)
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]12 *
13 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]14#include <linux/linkage.h>
15#include <linux/init.h>
16
17#include <asm/assembler.h>
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]18#include <asm/ptrace.h>
Uwe Zeisberger2eb9d312006-05-05 15:11:14 +0100[diff] [blame]19#include <asm/asm-offsets.h>
Hyok S. Choi3b920ce2006-04-24 09:45:35 +0100[diff] [blame]20#include <asm/thread_info.h>
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]21#include <asm/system.h>
22
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]23/*
24 * Kernel startup entry point.
25 * ---------------------------
26 *
27 * This is normally called from the decompressor code. The requirements
28 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
29 * r1 = machine nr.
30 *
31 * See linux/arch/arm/tools/mach-types for the complete list of machine
32 * numbers for r1.
33 *
34 */
Russell King08fdffd2007-05-08 15:15:45 +0100[diff] [blame]35 .section ".text.head", "ax"
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]36ENTRY(stext)
Catalin Marinasb86040a2009-07-24 12:32:54 +0100[diff] [blame]37 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]38 @ and irqs disabled
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]39#ifndef CONFIG_CPU_CP15
40 ldr r9, =CONFIG_PROCESSOR_ID
41#else
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]42 mrc p15, 0, r9, c0, c0 @ get processor id
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]43#endif
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]44 bl __lookup_processor_type @ r5=procinfo r9=cpuid
45 movs r10, r5 @ invalid processor (r5=0)?
46 beq __error_p @ yes, error 'p'
47 bl __lookup_machine_type @ r5=machinfo
48 movs r8, r5 @ invalid machine (r5=0)?
49 beq __error_a @ yes, error 'a'
50
51 ldr r13, __switch_data @ address to jump to after
52 @ the initialization is done
Catalin Marinasb86040a2009-07-24 12:32:54 +0100[diff] [blame]53 adr lr, BSYM(__after_proc_init) @ return (PIC) address
54 ARM( add pc, r10, #PROCINFO_INITFUNC )
55 THUMB( add r12, r10, #PROCINFO_INITFUNC )
56 THUMB( mov pc, r12 )
Catalin Marinas93ed3972008-08-28 11:22:32 +0100[diff] [blame]57ENDPROC(stext)
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]58
59/*
60 * Set the Control Register and Read the process ID.
61 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]62__after_proc_init:
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]63#ifdef CONFIG_CPU_CP15
Catalin Marinas05efde92009-07-24 12:34:59 +0100[diff] [blame]64 /*
65 * CP15 system control register value returned in r0 from
66 * the CPU init function.
67 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]68#ifdef CONFIG_ALIGNMENT_TRAP
69 orr r0, r0, #CR_A
70#else
71 bic r0, r0, #CR_A
72#endif
73#ifdef CONFIG_CPU_DCACHE_DISABLE
74 bic r0, r0, #CR_C
75#endif
76#ifdef CONFIG_CPU_BPREDICT_DISABLE
77 bic r0, r0, #CR_Z
78#endif
79#ifdef CONFIG_CPU_ICACHE_DISABLE
80 bic r0, r0, #CR_I
81#endif
Hyok S. Choi6afd6fa2006-09-28 21:46:34 +0900[diff] [blame]82#ifdef CONFIG_CPU_HIGH_VECTOR
83 orr r0, r0, #CR_V
84#else
85 bic r0, r0, #CR_V
86#endif
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]87 mcr p15, 0, r0, c1, c0, 0 @ write control reg
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]88#endif /* CONFIG_CPU_CP15 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]89
Catalin Marinasb86040a2009-07-24 12:32:54 +0100[diff] [blame]90 mov r3, r13
91 mov pc, r3 @ clear the BSS and jump
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]92 @ to start_kernel
Catalin Marinas93ed3972008-08-28 11:22:32 +0100[diff] [blame]93ENDPROC(__after_proc_init)
Hyok S. Choi3b920ce2006-04-24 09:45:35 +0100[diff] [blame]94 .ltorg
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]95
96#include "head-common.S"