Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 3 | * redistributing this file, you may do so under either license. |
| 4 | * |
| 5 | * GPL LICENSE SUMMARY |
| 6 | * |
| 7 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of version 2 of the GNU General Public License as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 21 | * The full GNU General Public License is included in this distribution |
| 22 | * in the file called LICENSE.GPL. |
| 23 | * |
| 24 | * BSD LICENSE |
| 25 | * |
| 26 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
| 27 | * All rights reserved. |
| 28 | * |
| 29 | * Redistribution and use in source and binary forms, with or without |
| 30 | * modification, are permitted provided that the following conditions |
| 31 | * are met: |
| 32 | * |
| 33 | * * Redistributions of source code must retain the above copyright |
| 34 | * notice, this list of conditions and the following disclaimer. |
| 35 | * * Redistributions in binary form must reproduce the above copyright |
| 36 | * notice, this list of conditions and the following disclaimer in |
| 37 | * the documentation and/or other materials provided with the |
| 38 | * distribution. |
| 39 | * * Neither the name of Intel Corporation nor the names of its |
| 40 | * contributors may be used to endorse or promote products derived |
| 41 | * from this software without specific prior written permission. |
| 42 | * |
| 43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 44 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 45 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 46 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 47 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 48 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 49 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 50 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 51 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 52 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 53 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 54 | */ |
| 55 | |
| 56 | #include "isci.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 57 | #include "task.h" |
| 58 | #include "request.h" |
| 59 | #include "sata.h" |
| 60 | #include "scu_completion_codes.h" |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 61 | #include "scu_event_codes.h" |
Dave Jiang | 2ec53eb | 2011-05-04 18:01:22 -0700 | [diff] [blame] | 62 | #include "sas.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 63 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 64 | static struct scu_sgl_element_pair *to_sgl_element_pair(struct isci_request *ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 65 | int idx) |
| 66 | { |
| 67 | if (idx == 0) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 68 | return &ireq->tc->sgl_pair_ab; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 69 | else if (idx == 1) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 70 | return &ireq->tc->sgl_pair_cd; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 71 | else if (idx < 0) |
| 72 | return NULL; |
| 73 | else |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 74 | return &ireq->sg_table[idx - 2]; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 75 | } |
| 76 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 77 | static dma_addr_t to_sgl_element_pair_dma(struct scic_sds_controller *scic, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 78 | struct isci_request *ireq, u32 idx) |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 79 | { |
| 80 | u32 offset; |
| 81 | |
| 82 | if (idx == 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 83 | offset = (void *) &ireq->tc->sgl_pair_ab - |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 84 | (void *) &scic->task_context_table[0]; |
| 85 | return scic->task_context_dma + offset; |
| 86 | } else if (idx == 1) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 87 | offset = (void *) &ireq->tc->sgl_pair_cd - |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 88 | (void *) &scic->task_context_table[0]; |
| 89 | return scic->task_context_dma + offset; |
| 90 | } |
| 91 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 92 | return scic_io_request_get_dma_addr(ireq, &ireq->sg_table[idx - 2]); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 93 | } |
| 94 | |
| 95 | static void init_sgl_element(struct scu_sgl_element *e, struct scatterlist *sg) |
| 96 | { |
| 97 | e->length = sg_dma_len(sg); |
| 98 | e->address_upper = upper_32_bits(sg_dma_address(sg)); |
| 99 | e->address_lower = lower_32_bits(sg_dma_address(sg)); |
| 100 | e->address_modifier = 0; |
| 101 | } |
| 102 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 103 | static void scic_sds_request_build_sgl(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 104 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 105 | struct isci_host *isci_host = ireq->isci_host; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 106 | struct scic_sds_controller *scic = &isci_host->sci; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 107 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 108 | struct scatterlist *sg = NULL; |
| 109 | dma_addr_t dma_addr; |
| 110 | u32 sg_idx = 0; |
| 111 | struct scu_sgl_element_pair *scu_sg = NULL; |
| 112 | struct scu_sgl_element_pair *prev_sg = NULL; |
| 113 | |
| 114 | if (task->num_scatter > 0) { |
| 115 | sg = task->scatter; |
| 116 | |
| 117 | while (sg) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 118 | scu_sg = to_sgl_element_pair(ireq, sg_idx); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 119 | init_sgl_element(&scu_sg->A, sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 120 | sg = sg_next(sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 121 | if (sg) { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 122 | init_sgl_element(&scu_sg->B, sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 123 | sg = sg_next(sg); |
| 124 | } else |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 125 | memset(&scu_sg->B, 0, sizeof(scu_sg->B)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 126 | |
| 127 | if (prev_sg) { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 128 | dma_addr = to_sgl_element_pair_dma(scic, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 129 | ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 130 | sg_idx); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 131 | |
| 132 | prev_sg->next_pair_upper = |
| 133 | upper_32_bits(dma_addr); |
| 134 | prev_sg->next_pair_lower = |
| 135 | lower_32_bits(dma_addr); |
| 136 | } |
| 137 | |
| 138 | prev_sg = scu_sg; |
| 139 | sg_idx++; |
| 140 | } |
| 141 | } else { /* handle when no sg */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 142 | scu_sg = to_sgl_element_pair(ireq, sg_idx); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 143 | |
| 144 | dma_addr = dma_map_single(&isci_host->pdev->dev, |
| 145 | task->scatter, |
| 146 | task->total_xfer_len, |
| 147 | task->data_dir); |
| 148 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 149 | ireq->zero_scatter_daddr = dma_addr; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 150 | |
| 151 | scu_sg->A.length = task->total_xfer_len; |
| 152 | scu_sg->A.address_upper = upper_32_bits(dma_addr); |
| 153 | scu_sg->A.address_lower = lower_32_bits(dma_addr); |
| 154 | } |
| 155 | |
| 156 | if (scu_sg) { |
| 157 | scu_sg->next_pair_upper = 0; |
| 158 | scu_sg->next_pair_lower = 0; |
| 159 | } |
| 160 | } |
| 161 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 162 | static void scic_sds_io_request_build_ssp_command_iu(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 163 | { |
| 164 | struct ssp_cmd_iu *cmd_iu; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 165 | struct sas_task *task = isci_request_access_task(ireq); |
| 166 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 167 | cmd_iu = &ireq->ssp.cmd; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 168 | |
| 169 | memcpy(cmd_iu->LUN, task->ssp_task.LUN, 8); |
| 170 | cmd_iu->add_cdb_len = 0; |
| 171 | cmd_iu->_r_a = 0; |
| 172 | cmd_iu->_r_b = 0; |
| 173 | cmd_iu->en_fburst = 0; /* unsupported */ |
| 174 | cmd_iu->task_prio = task->ssp_task.task_prio; |
| 175 | cmd_iu->task_attr = task->ssp_task.task_attr; |
| 176 | cmd_iu->_r_c = 0; |
| 177 | |
| 178 | sci_swab32_cpy(&cmd_iu->cdb, task->ssp_task.cdb, |
| 179 | sizeof(task->ssp_task.cdb) / sizeof(u32)); |
| 180 | } |
| 181 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 182 | static void scic_sds_task_request_build_ssp_task_iu(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 183 | { |
| 184 | struct ssp_task_iu *task_iu; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 185 | struct sas_task *task = isci_request_access_task(ireq); |
| 186 | struct isci_tmf *isci_tmf = isci_request_access_tmf(ireq); |
| 187 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 188 | task_iu = &ireq->ssp.tmf; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 189 | |
| 190 | memset(task_iu, 0, sizeof(struct ssp_task_iu)); |
| 191 | |
| 192 | memcpy(task_iu->LUN, task->ssp_task.LUN, 8); |
| 193 | |
| 194 | task_iu->task_func = isci_tmf->tmf_code; |
| 195 | task_iu->task_tag = |
| 196 | (ireq->ttype == tmf_task) ? |
| 197 | isci_tmf->io_tag : |
| 198 | SCI_CONTROLLER_INVALID_IO_TAG; |
| 199 | } |
| 200 | |
| 201 | /** |
| 202 | * This method is will fill in the SCU Task Context for any type of SSP request. |
| 203 | * @sci_req: |
| 204 | * @task_context: |
| 205 | * |
| 206 | */ |
| 207 | static void scu_ssp_reqeust_construct_task_context( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 208 | struct isci_request *ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 209 | struct scu_task_context *task_context) |
| 210 | { |
| 211 | dma_addr_t dma_addr; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 212 | struct scic_sds_remote_device *target_device; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 213 | struct isci_port *iport; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 214 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 215 | target_device = scic_sds_request_get_device(ireq); |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 216 | iport = scic_sds_request_get_port(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 217 | |
| 218 | /* Fill in the TC with the its required data */ |
| 219 | task_context->abort = 0; |
| 220 | task_context->priority = 0; |
| 221 | task_context->initiator_request = 1; |
| 222 | task_context->connection_rate = target_device->connection_rate; |
| 223 | task_context->protocol_engine_index = |
| 224 | scic_sds_controller_get_protocol_engine_group(controller); |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 225 | task_context->logical_port_index = scic_sds_port_get_index(iport); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 226 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP; |
| 227 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 228 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 229 | |
| 230 | task_context->remote_node_index = |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 231 | scic_sds_remote_device_get_index(ireq->target_device); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 232 | task_context->command_code = 0; |
| 233 | |
| 234 | task_context->link_layer_control = 0; |
| 235 | task_context->do_not_dma_ssp_good_response = 1; |
| 236 | task_context->strict_ordering = 0; |
| 237 | task_context->control_frame = 0; |
| 238 | task_context->timeout_enable = 0; |
| 239 | task_context->block_guard_enable = 0; |
| 240 | |
| 241 | task_context->address_modifier = 0; |
| 242 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 243 | /* task_context->type.ssp.tag = ireq->io_tag; */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 244 | task_context->task_phase = 0x01; |
| 245 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 246 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 247 | (scic_sds_controller_get_protocol_engine_group(controller) << |
| 248 | SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
| 249 | (scic_sds_port_get_index(iport) << |
| 250 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
| 251 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 252 | |
| 253 | /* |
| 254 | * Copy the physical address for the command buffer to the |
| 255 | * SCU Task Context |
| 256 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 257 | dma_addr = scic_io_request_get_dma_addr(ireq, &ireq->ssp.cmd); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 258 | |
| 259 | task_context->command_iu_upper = upper_32_bits(dma_addr); |
| 260 | task_context->command_iu_lower = lower_32_bits(dma_addr); |
| 261 | |
| 262 | /* |
| 263 | * Copy the physical address for the response buffer to the |
| 264 | * SCU Task Context |
| 265 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 266 | dma_addr = scic_io_request_get_dma_addr(ireq, &ireq->ssp.rsp); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 267 | |
| 268 | task_context->response_iu_upper = upper_32_bits(dma_addr); |
| 269 | task_context->response_iu_lower = lower_32_bits(dma_addr); |
| 270 | } |
| 271 | |
| 272 | /** |
| 273 | * This method is will fill in the SCU Task Context for a SSP IO request. |
| 274 | * @sci_req: |
| 275 | * |
| 276 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 277 | static void scu_ssp_io_request_construct_task_context(struct isci_request *ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 278 | enum dma_data_direction dir, |
| 279 | u32 len) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 280 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 281 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 282 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 283 | scu_ssp_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 284 | |
| 285 | task_context->ssp_command_iu_length = |
| 286 | sizeof(struct ssp_cmd_iu) / sizeof(u32); |
| 287 | task_context->type.ssp.frame_type = SSP_COMMAND; |
| 288 | |
| 289 | switch (dir) { |
| 290 | case DMA_FROM_DEVICE: |
| 291 | case DMA_NONE: |
| 292 | default: |
| 293 | task_context->task_type = SCU_TASK_TYPE_IOREAD; |
| 294 | break; |
| 295 | case DMA_TO_DEVICE: |
| 296 | task_context->task_type = SCU_TASK_TYPE_IOWRITE; |
| 297 | break; |
| 298 | } |
| 299 | |
| 300 | task_context->transfer_length_bytes = len; |
| 301 | |
| 302 | if (task_context->transfer_length_bytes > 0) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 303 | scic_sds_request_build_sgl(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 304 | } |
| 305 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 306 | /** |
| 307 | * This method will fill in the SCU Task Context for a SSP Task request. The |
| 308 | * following important settings are utilized: -# priority == |
| 309 | * SCU_TASK_PRIORITY_HIGH. This ensures that the task request is issued |
| 310 | * ahead of other task destined for the same Remote Node. -# task_type == |
| 311 | * SCU_TASK_TYPE_IOREAD. This simply indicates that a normal request type |
| 312 | * (i.e. non-raw frame) is being utilized to perform task management. -# |
| 313 | * control_frame == 1. This ensures that the proper endianess is set so |
| 314 | * that the bytes are transmitted in the right order for a task frame. |
| 315 | * @sci_req: This parameter specifies the task request object being |
| 316 | * constructed. |
| 317 | * |
| 318 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 319 | static void scu_ssp_task_request_construct_task_context(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 320 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 321 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 322 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 323 | scu_ssp_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 324 | |
| 325 | task_context->control_frame = 1; |
| 326 | task_context->priority = SCU_TASK_PRIORITY_HIGH; |
| 327 | task_context->task_type = SCU_TASK_TYPE_RAW_FRAME; |
| 328 | task_context->transfer_length_bytes = 0; |
| 329 | task_context->type.ssp.frame_type = SSP_TASK; |
| 330 | task_context->ssp_command_iu_length = |
| 331 | sizeof(struct ssp_task_iu) / sizeof(u32); |
| 332 | } |
| 333 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 334 | /** |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 335 | * This method is will fill in the SCU Task Context for any type of SATA |
| 336 | * request. This is called from the various SATA constructors. |
| 337 | * @sci_req: The general IO request object which is to be used in |
| 338 | * constructing the SCU task context. |
| 339 | * @task_context: The buffer pointer for the SCU task context which is being |
| 340 | * constructed. |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 341 | * |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 342 | * The general io request construction is complete. The buffer assignment for |
| 343 | * the command buffer is complete. none Revisit task context construction to |
| 344 | * determine what is common for SSP/SMP/STP task context structures. |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 345 | */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 346 | static void scu_sata_reqeust_construct_task_context( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 347 | struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 348 | struct scu_task_context *task_context) |
| 349 | { |
| 350 | dma_addr_t dma_addr; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 351 | struct scic_sds_remote_device *target_device; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 352 | struct isci_port *iport; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 353 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 354 | target_device = scic_sds_request_get_device(ireq); |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 355 | iport = scic_sds_request_get_port(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 356 | |
| 357 | /* Fill in the TC with the its required data */ |
| 358 | task_context->abort = 0; |
| 359 | task_context->priority = SCU_TASK_PRIORITY_NORMAL; |
| 360 | task_context->initiator_request = 1; |
| 361 | task_context->connection_rate = target_device->connection_rate; |
| 362 | task_context->protocol_engine_index = |
| 363 | scic_sds_controller_get_protocol_engine_group(controller); |
| 364 | task_context->logical_port_index = |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 365 | scic_sds_port_get_index(iport); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 366 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_STP; |
| 367 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 368 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 369 | |
| 370 | task_context->remote_node_index = |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 371 | scic_sds_remote_device_get_index(ireq->target_device); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 372 | task_context->command_code = 0; |
| 373 | |
| 374 | task_context->link_layer_control = 0; |
| 375 | task_context->do_not_dma_ssp_good_response = 1; |
| 376 | task_context->strict_ordering = 0; |
| 377 | task_context->control_frame = 0; |
| 378 | task_context->timeout_enable = 0; |
| 379 | task_context->block_guard_enable = 0; |
| 380 | |
| 381 | task_context->address_modifier = 0; |
| 382 | task_context->task_phase = 0x01; |
| 383 | |
| 384 | task_context->ssp_command_iu_length = |
| 385 | (sizeof(struct host_to_dev_fis) - sizeof(u32)) / sizeof(u32); |
| 386 | |
| 387 | /* Set the first word of the H2D REG FIS */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 388 | task_context->type.words[0] = *(u32 *)&ireq->stp.cmd; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 389 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 390 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 391 | (scic_sds_controller_get_protocol_engine_group(controller) << |
| 392 | SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 393 | (scic_sds_port_get_index(iport) << |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 394 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 395 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 396 | /* |
| 397 | * Copy the physical address for the command buffer to the SCU Task |
| 398 | * Context. We must offset the command buffer by 4 bytes because the |
| 399 | * first 4 bytes are transfered in the body of the TC. |
| 400 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 401 | dma_addr = scic_io_request_get_dma_addr(ireq, |
| 402 | ((char *) &ireq->stp.cmd) + |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 403 | sizeof(u32)); |
| 404 | |
| 405 | task_context->command_iu_upper = upper_32_bits(dma_addr); |
| 406 | task_context->command_iu_lower = lower_32_bits(dma_addr); |
| 407 | |
| 408 | /* SATA Requests do not have a response buffer */ |
| 409 | task_context->response_iu_upper = 0; |
| 410 | task_context->response_iu_lower = 0; |
| 411 | } |
| 412 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 413 | static void scu_stp_raw_request_construct_task_context(struct isci_request *ireq) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 414 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 415 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 416 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 417 | scu_sata_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 418 | |
| 419 | task_context->control_frame = 0; |
| 420 | task_context->priority = SCU_TASK_PRIORITY_NORMAL; |
| 421 | task_context->task_type = SCU_TASK_TYPE_SATA_RAW_FRAME; |
| 422 | task_context->type.stp.fis_type = FIS_REGH2D; |
| 423 | task_context->transfer_length_bytes = sizeof(struct host_to_dev_fis) - sizeof(u32); |
| 424 | } |
| 425 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 426 | static enum sci_status scic_sds_stp_pio_request_construct(struct isci_request *ireq, |
| 427 | bool copy_rx_frame) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 428 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 429 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 430 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 431 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 432 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 433 | stp_req->status = 0; |
| 434 | stp_req->sgl.offset = 0; |
| 435 | stp_req->sgl.set = SCU_SGL_ELEMENT_PAIR_A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 436 | |
| 437 | if (copy_rx_frame) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 438 | scic_sds_request_build_sgl(ireq); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 439 | stp_req->sgl.index = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 440 | } else { |
| 441 | /* The user does not want the data copied to the SGL buffer location */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 442 | stp_req->sgl.index = -1; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 443 | } |
| 444 | |
| 445 | return SCI_SUCCESS; |
| 446 | } |
| 447 | |
| 448 | /** |
| 449 | * |
| 450 | * @sci_req: This parameter specifies the request to be constructed as an |
| 451 | * optimized request. |
| 452 | * @optimized_task_type: This parameter specifies whether the request is to be |
| 453 | * an UDMA request or a NCQ request. - A value of 0 indicates UDMA. - A |
| 454 | * value of 1 indicates NCQ. |
| 455 | * |
| 456 | * This method will perform request construction common to all types of STP |
| 457 | * requests that are optimized by the silicon (i.e. UDMA, NCQ). This method |
| 458 | * returns an indication as to whether the construction was successful. |
| 459 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 460 | static void scic_sds_stp_optimized_request_construct(struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 461 | u8 optimized_task_type, |
| 462 | u32 len, |
| 463 | enum dma_data_direction dir) |
| 464 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 465 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 466 | |
| 467 | /* Build the STP task context structure */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 468 | scu_sata_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 469 | |
| 470 | /* Copy over the SGL elements */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 471 | scic_sds_request_build_sgl(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 472 | |
| 473 | /* Copy over the number of bytes to be transfered */ |
| 474 | task_context->transfer_length_bytes = len; |
| 475 | |
| 476 | if (dir == DMA_TO_DEVICE) { |
| 477 | /* |
| 478 | * The difference between the DMA IN and DMA OUT request task type |
| 479 | * values are consistent with the difference between FPDMA READ |
| 480 | * and FPDMA WRITE values. Add the supplied task type parameter |
| 481 | * to this difference to set the task type properly for this |
| 482 | * DATA OUT (WRITE) case. */ |
| 483 | task_context->task_type = optimized_task_type + (SCU_TASK_TYPE_DMA_OUT |
| 484 | - SCU_TASK_TYPE_DMA_IN); |
| 485 | } else { |
| 486 | /* |
| 487 | * For the DATA IN (READ) case, simply save the supplied |
| 488 | * optimized task type. */ |
| 489 | task_context->task_type = optimized_task_type; |
| 490 | } |
| 491 | } |
| 492 | |
| 493 | |
| 494 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 495 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 496 | scic_io_request_construct_sata(struct isci_request *ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 497 | u32 len, |
| 498 | enum dma_data_direction dir, |
| 499 | bool copy) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 500 | { |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 501 | enum sci_status status = SCI_SUCCESS; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 502 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 503 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 504 | /* check for management protocols */ |
| 505 | if (ireq->ttype == tmf_task) { |
| 506 | struct isci_tmf *tmf = isci_request_access_tmf(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 507 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 508 | if (tmf->tmf_code == isci_tmf_sata_srst_high || |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 509 | tmf->tmf_code == isci_tmf_sata_srst_low) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 510 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 511 | return SCI_SUCCESS; |
| 512 | } else { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 513 | dev_err(scic_to_dev(ireq->owning_controller), |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 514 | "%s: Request 0x%p received un-handled SAT " |
| 515 | "management protocol 0x%x.\n", |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 516 | __func__, ireq, tmf->tmf_code); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 517 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 518 | return SCI_FAILURE; |
| 519 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 520 | } |
| 521 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 522 | if (!sas_protocol_ata(task->task_proto)) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 523 | dev_err(scic_to_dev(ireq->owning_controller), |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 524 | "%s: Non-ATA protocol in SATA path: 0x%x\n", |
| 525 | __func__, |
| 526 | task->task_proto); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 527 | return SCI_FAILURE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 528 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 529 | } |
| 530 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 531 | /* non data */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 532 | if (task->data_dir == DMA_NONE) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 533 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 534 | return SCI_SUCCESS; |
| 535 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 536 | |
| 537 | /* NCQ */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 538 | if (task->ata_task.use_ncq) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 539 | scic_sds_stp_optimized_request_construct(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 540 | SCU_TASK_TYPE_FPDMAQ_READ, |
| 541 | len, dir); |
| 542 | return SCI_SUCCESS; |
| 543 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 544 | |
| 545 | /* DMA */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 546 | if (task->ata_task.dma_xfer) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 547 | scic_sds_stp_optimized_request_construct(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 548 | SCU_TASK_TYPE_DMA_IN, |
| 549 | len, dir); |
| 550 | return SCI_SUCCESS; |
| 551 | } else /* PIO */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 552 | return scic_sds_stp_pio_request_construct(ireq, copy); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 553 | |
| 554 | return status; |
| 555 | } |
| 556 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 557 | static enum sci_status scic_io_request_construct_basic_ssp(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 558 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 559 | struct sas_task *task = isci_request_access_task(ireq); |
| 560 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 561 | ireq->protocol = SCIC_SSP_PROTOCOL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 562 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 563 | scu_ssp_io_request_construct_task_context(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 564 | task->data_dir, |
| 565 | task->total_xfer_len); |
| 566 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 567 | scic_sds_io_request_build_ssp_command_iu(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 568 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 569 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 570 | |
| 571 | return SCI_SUCCESS; |
| 572 | } |
| 573 | |
| 574 | enum sci_status scic_task_request_construct_ssp( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 575 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 576 | { |
| 577 | /* Construct the SSP Task SCU Task Context */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 578 | scu_ssp_task_request_construct_task_context(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 579 | |
| 580 | /* Fill in the SSP Task IU */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 581 | scic_sds_task_request_build_ssp_task_iu(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 582 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 583 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 584 | |
| 585 | return SCI_SUCCESS; |
| 586 | } |
| 587 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 588 | static enum sci_status scic_io_request_construct_basic_sata(struct isci_request *ireq) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 589 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 590 | enum sci_status status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 591 | bool copy = false; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 592 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 593 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 594 | ireq->protocol = SCIC_STP_PROTOCOL; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 595 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 596 | copy = (task->data_dir == DMA_NONE) ? false : true; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 597 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 598 | status = scic_io_request_construct_sata(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 599 | task->total_xfer_len, |
| 600 | task->data_dir, |
| 601 | copy); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 602 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 603 | if (status == SCI_SUCCESS) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 604 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 605 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 606 | return status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 607 | } |
| 608 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 609 | enum sci_status scic_task_request_construct_sata(struct isci_request *ireq) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 610 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 611 | enum sci_status status = SCI_SUCCESS; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 612 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 613 | /* check for management protocols */ |
| 614 | if (ireq->ttype == tmf_task) { |
| 615 | struct isci_tmf *tmf = isci_request_access_tmf(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 616 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 617 | if (tmf->tmf_code == isci_tmf_sata_srst_high || |
| 618 | tmf->tmf_code == isci_tmf_sata_srst_low) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 619 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 620 | } else { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 621 | dev_err(scic_to_dev(ireq->owning_controller), |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 622 | "%s: Request 0x%p received un-handled SAT " |
| 623 | "Protocol 0x%x.\n", |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 624 | __func__, ireq, tmf->tmf_code); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 625 | |
| 626 | return SCI_FAILURE; |
| 627 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 628 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 629 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 630 | if (status != SCI_SUCCESS) |
| 631 | return status; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 632 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 633 | |
| 634 | return status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 635 | } |
| 636 | |
| 637 | /** |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 638 | * sci_req_tx_bytes - bytes transferred when reply underruns request |
| 639 | * @sci_req: request that was terminated early |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 640 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 641 | #define SCU_TASK_CONTEXT_SRAM 0x200000 |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 642 | static u32 sci_req_tx_bytes(struct isci_request *ireq) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 643 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 644 | struct scic_sds_controller *scic = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 645 | u32 ret_val = 0; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 646 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 647 | if (readl(&scic->smu_registers->address_modifier) == 0) { |
| 648 | void __iomem *scu_reg_base = scic->scu_registers; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 649 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 650 | /* get the bytes of data from the Address == BAR1 + 20002Ch + (256*TCi) where |
| 651 | * BAR1 is the scu_registers |
| 652 | * 0x20002C = 0x200000 + 0x2c |
| 653 | * = start of task context SRAM + offset of (type.ssp.data_offset) |
| 654 | * TCi is the io_tag of struct scic_sds_request |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 655 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 656 | ret_val = readl(scu_reg_base + |
| 657 | (SCU_TASK_CONTEXT_SRAM + offsetof(struct scu_task_context, type.ssp.data_offset)) + |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 658 | ((sizeof(struct scu_task_context)) * ISCI_TAG_TCI(ireq->io_tag))); |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 659 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 660 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 661 | return ret_val; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 662 | } |
| 663 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 664 | enum sci_status scic_sds_request_start(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 665 | { |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 666 | enum sci_base_request_states state; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 667 | struct scu_task_context *tc = ireq->tc; |
| 668 | struct scic_sds_controller *scic = ireq->owning_controller; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 669 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 670 | state = ireq->sm.current_state_id; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 671 | if (state != SCI_REQ_CONSTRUCTED) { |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 672 | dev_warn(scic_to_dev(scic), |
| 673 | "%s: SCIC IO Request requested to start while in wrong " |
| 674 | "state %d\n", __func__, state); |
| 675 | return SCI_FAILURE_INVALID_STATE; |
| 676 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 677 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 678 | tc->task_index = ISCI_TAG_TCI(ireq->io_tag); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 679 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 680 | switch (tc->protocol_type) { |
| 681 | case SCU_TASK_CONTEXT_PROTOCOL_SMP: |
| 682 | case SCU_TASK_CONTEXT_PROTOCOL_SSP: |
| 683 | /* SSP/SMP Frame */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 684 | tc->type.ssp.tag = ireq->io_tag; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 685 | tc->type.ssp.target_port_transfer_tag = 0xFFFF; |
| 686 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 687 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 688 | case SCU_TASK_CONTEXT_PROTOCOL_STP: |
| 689 | /* STP/SATA Frame |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 690 | * tc->type.stp.ncq_tag = ireq->ncq_tag; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 691 | */ |
| 692 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 693 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 694 | case SCU_TASK_CONTEXT_PROTOCOL_NONE: |
| 695 | /* / @todo When do we set no protocol type? */ |
| 696 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 697 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 698 | default: |
| 699 | /* This should never happen since we build the IO |
| 700 | * requests */ |
| 701 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 702 | } |
| 703 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 704 | /* Add to the post_context the io tag value */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 705 | ireq->post_context |= ISCI_TAG_TCI(ireq->io_tag); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 706 | |
| 707 | /* Everything is good go ahead and change state */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 708 | sci_change_state(&ireq->sm, SCI_REQ_STARTED); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 709 | |
| 710 | return SCI_SUCCESS; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 711 | } |
| 712 | |
| 713 | enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 714 | scic_sds_io_request_terminate(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 715 | { |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 716 | enum sci_base_request_states state; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 717 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 718 | state = ireq->sm.current_state_id; |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 719 | |
| 720 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 721 | case SCI_REQ_CONSTRUCTED: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 722 | scic_sds_request_set_status(ireq, |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 723 | SCU_TASK_DONE_TASK_ABORT, |
| 724 | SCI_FAILURE_IO_TERMINATED); |
| 725 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 726 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 727 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 728 | case SCI_REQ_STARTED: |
| 729 | case SCI_REQ_TASK_WAIT_TC_COMP: |
| 730 | case SCI_REQ_SMP_WAIT_RESP: |
| 731 | case SCI_REQ_SMP_WAIT_TC_COMP: |
| 732 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
| 733 | case SCI_REQ_STP_UDMA_WAIT_D2H: |
| 734 | case SCI_REQ_STP_NON_DATA_WAIT_H2D: |
| 735 | case SCI_REQ_STP_NON_DATA_WAIT_D2H: |
| 736 | case SCI_REQ_STP_PIO_WAIT_H2D: |
| 737 | case SCI_REQ_STP_PIO_WAIT_FRAME: |
| 738 | case SCI_REQ_STP_PIO_DATA_IN: |
| 739 | case SCI_REQ_STP_PIO_DATA_OUT: |
| 740 | case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED: |
| 741 | case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG: |
| 742 | case SCI_REQ_STP_SOFT_RESET_WAIT_D2H: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 743 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 744 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 745 | case SCI_REQ_TASK_WAIT_TC_RESP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 746 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); |
| 747 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 748 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 749 | case SCI_REQ_ABORTING: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 750 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 751 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 752 | case SCI_REQ_COMPLETED: |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 753 | default: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 754 | dev_warn(scic_to_dev(ireq->owning_controller), |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 755 | "%s: SCIC IO Request requested to abort while in wrong " |
| 756 | "state %d\n", |
| 757 | __func__, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 758 | ireq->sm.current_state_id); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 759 | break; |
| 760 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 761 | |
| 762 | return SCI_FAILURE_INVALID_STATE; |
| 763 | } |
| 764 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 765 | enum sci_status scic_sds_request_complete(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 766 | { |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 767 | enum sci_base_request_states state; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 768 | struct scic_sds_controller *scic = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 769 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 770 | state = ireq->sm.current_state_id; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 771 | if (WARN_ONCE(state != SCI_REQ_COMPLETED, |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 772 | "isci: request completion from wrong state (%d)\n", state)) |
| 773 | return SCI_FAILURE_INVALID_STATE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 774 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 775 | if (ireq->saved_rx_frame_index != SCU_INVALID_FRAME_INDEX) |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 776 | scic_sds_controller_release_frame(scic, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 777 | ireq->saved_rx_frame_index); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 778 | |
| 779 | /* XXX can we just stop the machine and remove the 'final' state? */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 780 | sci_change_state(&ireq->sm, SCI_REQ_FINAL); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 781 | return SCI_SUCCESS; |
| 782 | } |
| 783 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 784 | enum sci_status scic_sds_io_request_event_handler(struct isci_request *ireq, |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 785 | u32 event_code) |
| 786 | { |
| 787 | enum sci_base_request_states state; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 788 | struct scic_sds_controller *scic = ireq->owning_controller; |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 789 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 790 | state = ireq->sm.current_state_id; |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 791 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 792 | if (state != SCI_REQ_STP_PIO_DATA_IN) { |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 793 | dev_warn(scic_to_dev(scic), "%s: (%x) in wrong state %d\n", |
| 794 | __func__, event_code, state); |
| 795 | |
| 796 | return SCI_FAILURE_INVALID_STATE; |
| 797 | } |
| 798 | |
| 799 | switch (scu_get_event_specifier(event_code)) { |
| 800 | case SCU_TASK_DONE_CRC_ERR << SCU_EVENT_SPECIFIC_CODE_SHIFT: |
| 801 | /* We are waiting for data and the SCU has R_ERR the data frame. |
| 802 | * Go back to waiting for the D2H Register FIS |
| 803 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 804 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 805 | return SCI_SUCCESS; |
| 806 | default: |
| 807 | dev_err(scic_to_dev(scic), |
| 808 | "%s: pio request unexpected event %#x\n", |
| 809 | __func__, event_code); |
| 810 | |
| 811 | /* TODO Should we fail the PIO request when we get an |
| 812 | * unexpected event? |
| 813 | */ |
| 814 | return SCI_FAILURE; |
| 815 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 816 | } |
| 817 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 818 | /* |
| 819 | * This function copies response data for requests returning response data |
| 820 | * instead of sense data. |
| 821 | * @sci_req: This parameter specifies the request object for which to copy |
| 822 | * the response data. |
| 823 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 824 | static void scic_sds_io_request_copy_response(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 825 | { |
| 826 | void *resp_buf; |
| 827 | u32 len; |
| 828 | struct ssp_response_iu *ssp_response; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 829 | struct isci_tmf *isci_tmf = isci_request_access_tmf(ireq); |
| 830 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 831 | ssp_response = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 832 | |
| 833 | resp_buf = &isci_tmf->resp.resp_iu; |
| 834 | |
| 835 | len = min_t(u32, |
| 836 | SSP_RESP_IU_MAX_SIZE, |
| 837 | be32_to_cpu(ssp_response->response_data_len)); |
| 838 | |
| 839 | memcpy(resp_buf, ssp_response->resp_data, len); |
| 840 | } |
| 841 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 842 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 843 | request_started_state_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 844 | u32 completion_code) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 845 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 846 | struct ssp_response_iu *resp_iu; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 847 | u8 datapres; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 848 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 849 | /* TODO: Any SDMA return code of other than 0 is bad decode 0x003C0000 |
| 850 | * to determine SDMA status |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 851 | */ |
| 852 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 853 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 854 | scic_sds_request_set_status(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 855 | SCU_TASK_DONE_GOOD, |
| 856 | SCI_SUCCESS); |
| 857 | break; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 858 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_EARLY_RESP): { |
| 859 | /* There are times when the SCU hardware will return an early |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 860 | * response because the io request specified more data than is |
| 861 | * returned by the target device (mode pages, inquiry data, |
| 862 | * etc.). We must check the response stats to see if this is |
| 863 | * truly a failed request or a good request that just got |
| 864 | * completed early. |
| 865 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 866 | struct ssp_response_iu *resp = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 867 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 868 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 869 | sci_swab32_cpy(&ireq->ssp.rsp, |
| 870 | &ireq->ssp.rsp, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 871 | word_cnt); |
| 872 | |
| 873 | if (resp->status == 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 874 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 875 | SCU_TASK_DONE_GOOD, |
| 876 | SCI_SUCCESS_IO_DONE_EARLY); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 877 | } else { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 878 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 879 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 880 | SCI_FAILURE_IO_RESPONSE_VALID); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 881 | } |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 882 | break; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 883 | } |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 884 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CHECK_RESPONSE): { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 885 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 886 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 887 | sci_swab32_cpy(&ireq->ssp.rsp, |
| 888 | &ireq->ssp.rsp, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 889 | word_cnt); |
| 890 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 891 | scic_sds_request_set_status(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 892 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 893 | SCI_FAILURE_IO_RESPONSE_VALID); |
| 894 | break; |
| 895 | } |
| 896 | |
| 897 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_RESP_LEN_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 898 | /* TODO With TASK_DONE_RESP_LEN_ERR is the response frame |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 899 | * guaranteed to be received before this completion status is |
| 900 | * posted? |
| 901 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 902 | resp_iu = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 903 | datapres = resp_iu->datapres; |
| 904 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 905 | if (datapres == 1 || datapres == 2) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 906 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 907 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 908 | SCI_FAILURE_IO_RESPONSE_VALID); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 909 | } else |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 910 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 911 | SCU_TASK_DONE_GOOD, |
| 912 | SCI_SUCCESS); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 913 | break; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 914 | /* only stp device gets suspended. */ |
| 915 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_ACK_NAK_TO): |
| 916 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_PERR): |
| 917 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_NAK_ERR): |
| 918 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_DATA_LEN_ERR): |
| 919 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_ABORT_ERR): |
| 920 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_XR_WD_LEN): |
| 921 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR): |
| 922 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_RESP): |
| 923 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_SDBFIS): |
| 924 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR): |
| 925 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDB_ERR): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 926 | if (ireq->protocol == SCIC_STP_PROTOCOL) { |
| 927 | scic_sds_request_set_status(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 928 | SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 929 | SCU_COMPLETION_TL_STATUS_SHIFT, |
| 930 | SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED); |
| 931 | } else { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 932 | scic_sds_request_set_status(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 933 | SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 934 | SCU_COMPLETION_TL_STATUS_SHIFT, |
| 935 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
| 936 | } |
| 937 | break; |
| 938 | |
| 939 | /* both stp/ssp device gets suspended */ |
| 940 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LF_ERR): |
| 941 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_WRONG_DESTINATION): |
| 942 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1): |
| 943 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2): |
| 944 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3): |
| 945 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_BAD_DESTINATION): |
| 946 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_ZONE_VIOLATION): |
| 947 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY): |
| 948 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED): |
| 949 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 950 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 951 | SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 952 | SCU_COMPLETION_TL_STATUS_SHIFT, |
| 953 | SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 954 | break; |
| 955 | |
| 956 | /* neither ssp nor stp gets suspended. */ |
| 957 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_NAK_CMD_ERR): |
| 958 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_XR): |
| 959 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_XR_IU_LEN_ERR): |
| 960 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDMA_ERR): |
| 961 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_OFFSET_ERR): |
| 962 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_EXCESS_DATA): |
| 963 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_RESP_TO_ERR): |
| 964 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_UFI_ERR): |
| 965 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_FRM_TYPE_ERR): |
| 966 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_LL_RX_ERR): |
| 967 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_DATA): |
| 968 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_OPEN_FAIL): |
| 969 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_VIIT_ENTRY_NV): |
| 970 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_IIT_ENTRY_NV): |
| 971 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_RNCNV_OUTBOUND): |
| 972 | default: |
| 973 | scic_sds_request_set_status( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 974 | ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 975 | SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 976 | SCU_COMPLETION_TL_STATUS_SHIFT, |
| 977 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
| 978 | break; |
| 979 | } |
| 980 | |
| 981 | /* |
| 982 | * TODO: This is probably wrong for ACK/NAK timeout conditions |
| 983 | */ |
| 984 | |
| 985 | /* In all cases we will treat this as the completion of the IO req. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 986 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 987 | return SCI_SUCCESS; |
| 988 | } |
| 989 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 990 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 991 | request_aborting_state_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 992 | u32 completion_code) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 993 | { |
| 994 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 995 | case (SCU_TASK_DONE_GOOD << SCU_COMPLETION_TL_STATUS_SHIFT): |
| 996 | case (SCU_TASK_DONE_TASK_ABORT << SCU_COMPLETION_TL_STATUS_SHIFT): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 997 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_TASK_ABORT, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 998 | SCI_FAILURE_IO_TERMINATED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 999 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1000 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1001 | break; |
| 1002 | |
| 1003 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1004 | /* Unless we get some strange error wait for the task abort to complete |
| 1005 | * TODO: Should there be a state change for this completion? |
| 1006 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1007 | break; |
| 1008 | } |
| 1009 | |
| 1010 | return SCI_SUCCESS; |
| 1011 | } |
| 1012 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1013 | static enum sci_status ssp_task_request_await_tc_event(struct isci_request *ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1014 | u32 completion_code) |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1015 | { |
| 1016 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1017 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1018 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_GOOD, |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1019 | SCI_SUCCESS); |
| 1020 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1021 | sci_change_state(&ireq->sm, SCI_REQ_TASK_WAIT_TC_RESP); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1022 | break; |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1023 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_ACK_NAK_TO): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1024 | /* Currently, the decision is to simply allow the task request |
| 1025 | * to timeout if the task IU wasn't received successfully. |
| 1026 | * There is a potential for receiving multiple task responses if |
| 1027 | * we decide to send the task IU again. |
| 1028 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1029 | dev_warn(scic_to_dev(ireq->owning_controller), |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1030 | "%s: TaskRequest:0x%p CompletionCode:%x - " |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1031 | "ACK/NAK timeout\n", __func__, ireq, |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1032 | completion_code); |
| 1033 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1034 | sci_change_state(&ireq->sm, SCI_REQ_TASK_WAIT_TC_RESP); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1035 | break; |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1036 | default: |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1037 | /* |
| 1038 | * All other completion status cause the IO to be complete. |
| 1039 | * If a NAK was received, then it is up to the user to retry |
| 1040 | * the request. |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1041 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1042 | scic_sds_request_set_status(ireq, |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1043 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1044 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1045 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1046 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1047 | break; |
| 1048 | } |
| 1049 | |
| 1050 | return SCI_SUCCESS; |
| 1051 | } |
| 1052 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1053 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1054 | smp_request_await_response_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1055 | u32 completion_code) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1056 | { |
| 1057 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1058 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1059 | /* In the AWAIT RESPONSE state, any TC completion is |
| 1060 | * unexpected. but if the TC has success status, we |
| 1061 | * complete the IO anyway. |
| 1062 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1063 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_GOOD, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1064 | SCI_SUCCESS); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1065 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1066 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1067 | break; |
| 1068 | |
| 1069 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_RESP_TO_ERR): |
| 1070 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_UFI_ERR): |
| 1071 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_FRM_TYPE_ERR): |
| 1072 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_LL_RX_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1073 | /* These status has been seen in a specific LSI |
| 1074 | * expander, which sometimes is not able to send smp |
| 1075 | * response within 2 ms. This causes our hardware break |
| 1076 | * the connection and set TC completion with one of |
| 1077 | * these SMP_XXX_XX_ERR status. For these type of error, |
| 1078 | * we ask scic user to retry the request. |
| 1079 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1080 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_SMP_RESP_TO_ERR, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1081 | SCI_FAILURE_RETRY_REQUIRED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1082 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1083 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1084 | break; |
| 1085 | |
| 1086 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1087 | /* All other completion status cause the IO to be complete. If a NAK |
| 1088 | * was received, then it is up to the user to retry the request |
| 1089 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1090 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1091 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
| 1092 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1093 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1094 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1095 | break; |
| 1096 | } |
| 1097 | |
| 1098 | return SCI_SUCCESS; |
| 1099 | } |
| 1100 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1101 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1102 | smp_request_await_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1103 | u32 completion_code) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1104 | { |
| 1105 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1106 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1107 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_GOOD, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1108 | SCI_SUCCESS); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1109 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1110 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1111 | break; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1112 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1113 | /* All other completion status cause the IO to be |
| 1114 | * complete. If a NAK was received, then it is up to |
| 1115 | * the user to retry the request. |
| 1116 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1117 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1118 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
| 1119 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1120 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1121 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1122 | break; |
| 1123 | } |
| 1124 | |
| 1125 | return SCI_SUCCESS; |
| 1126 | } |
| 1127 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1128 | void scic_stp_io_request_set_ncq_tag(struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1129 | u16 ncq_tag) |
| 1130 | { |
| 1131 | /** |
| 1132 | * @note This could be made to return an error to the user if the user |
| 1133 | * attempts to set the NCQ tag in the wrong state. |
| 1134 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1135 | ireq->tc->type.stp.ncq_tag = ncq_tag; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1136 | } |
| 1137 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1138 | static struct scu_sgl_element *pio_sgl_next(struct isci_stp_request *stp_req) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1139 | { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1140 | struct scu_sgl_element *sgl; |
| 1141 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1142 | struct isci_request *ireq = to_ireq(stp_req); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1143 | struct isci_stp_pio_sgl *pio_sgl = &stp_req->sgl; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1144 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1145 | sgl_pair = to_sgl_element_pair(ireq, pio_sgl->index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1146 | if (!sgl_pair) |
| 1147 | sgl = NULL; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1148 | else if (pio_sgl->set == SCU_SGL_ELEMENT_PAIR_A) { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1149 | if (sgl_pair->B.address_lower == 0 && |
| 1150 | sgl_pair->B.address_upper == 0) { |
| 1151 | sgl = NULL; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1152 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1153 | pio_sgl->set = SCU_SGL_ELEMENT_PAIR_B; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1154 | sgl = &sgl_pair->B; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1155 | } |
| 1156 | } else { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1157 | if (sgl_pair->next_pair_lower == 0 && |
| 1158 | sgl_pair->next_pair_upper == 0) { |
| 1159 | sgl = NULL; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1160 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1161 | pio_sgl->index++; |
| 1162 | pio_sgl->set = SCU_SGL_ELEMENT_PAIR_A; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1163 | sgl_pair = to_sgl_element_pair(ireq, pio_sgl->index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1164 | sgl = &sgl_pair->A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1165 | } |
| 1166 | } |
| 1167 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1168 | return sgl; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1169 | } |
| 1170 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1171 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1172 | stp_request_non_data_await_h2d_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1173 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1174 | { |
| 1175 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1176 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1177 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_GOOD, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1178 | SCI_SUCCESS); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1179 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1180 | sci_change_state(&ireq->sm, SCI_REQ_STP_NON_DATA_WAIT_D2H); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1181 | break; |
| 1182 | |
| 1183 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1184 | /* All other completion status cause the IO to be |
| 1185 | * complete. If a NAK was received, then it is up to |
| 1186 | * the user to retry the request. |
| 1187 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1188 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1189 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
| 1190 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1191 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1192 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1193 | break; |
| 1194 | } |
| 1195 | |
| 1196 | return SCI_SUCCESS; |
| 1197 | } |
| 1198 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1199 | #define SCU_MAX_FRAME_BUFFER_SIZE 0x400 /* 1K is the maximum SCU frame data payload */ |
| 1200 | |
| 1201 | /* transmit DATA_FIS from (current sgl + offset) for input |
| 1202 | * parameter length. current sgl and offset is alreay stored in the IO request |
| 1203 | */ |
| 1204 | static enum sci_status scic_sds_stp_request_pio_data_out_trasmit_data_frame( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1205 | struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1206 | u32 length) |
| 1207 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1208 | struct isci_stp_request *stp_req = &ireq->stp.req; |
| 1209 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1210 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1211 | struct scu_sgl_element *current_sgl; |
| 1212 | |
| 1213 | /* Recycle the TC and reconstruct it for sending out DATA FIS containing |
| 1214 | * for the data from current_sgl+offset for the input length |
| 1215 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1216 | sgl_pair = to_sgl_element_pair(ireq, stp_req->sgl.index); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1217 | if (stp_req->sgl.set == SCU_SGL_ELEMENT_PAIR_A) |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1218 | current_sgl = &sgl_pair->A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1219 | else |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1220 | current_sgl = &sgl_pair->B; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1221 | |
| 1222 | /* update the TC */ |
| 1223 | task_context->command_iu_upper = current_sgl->address_upper; |
| 1224 | task_context->command_iu_lower = current_sgl->address_lower; |
| 1225 | task_context->transfer_length_bytes = length; |
| 1226 | task_context->type.stp.fis_type = FIS_DATA; |
| 1227 | |
| 1228 | /* send the new TC out. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1229 | return scic_controller_continue_io(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1230 | } |
| 1231 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1232 | static enum sci_status scic_sds_stp_request_pio_data_out_transmit_data(struct isci_request *ireq) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1233 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1234 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1235 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1236 | struct scu_sgl_element *sgl; |
| 1237 | enum sci_status status; |
| 1238 | u32 offset; |
| 1239 | u32 len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1240 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1241 | offset = stp_req->sgl.offset; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1242 | sgl_pair = to_sgl_element_pair(ireq, stp_req->sgl.index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1243 | if (WARN_ONCE(!sgl_pair, "%s: null sgl element", __func__)) |
| 1244 | return SCI_FAILURE; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1245 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1246 | if (stp_req->sgl.set == SCU_SGL_ELEMENT_PAIR_A) { |
| 1247 | sgl = &sgl_pair->A; |
| 1248 | len = sgl_pair->A.length - offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1249 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1250 | sgl = &sgl_pair->B; |
| 1251 | len = sgl_pair->B.length - offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1252 | } |
| 1253 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1254 | if (stp_req->pio_len == 0) |
| 1255 | return SCI_SUCCESS; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1256 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1257 | if (stp_req->pio_len >= len) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1258 | status = scic_sds_stp_request_pio_data_out_trasmit_data_frame(ireq, len); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1259 | if (status != SCI_SUCCESS) |
| 1260 | return status; |
| 1261 | stp_req->pio_len -= len; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1262 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1263 | /* update the current sgl, offset and save for future */ |
| 1264 | sgl = pio_sgl_next(stp_req); |
| 1265 | offset = 0; |
| 1266 | } else if (stp_req->pio_len < len) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1267 | scic_sds_stp_request_pio_data_out_trasmit_data_frame(ireq, stp_req->pio_len); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1268 | |
| 1269 | /* Sgl offset will be adjusted and saved for future */ |
| 1270 | offset += stp_req->pio_len; |
| 1271 | sgl->address_lower += stp_req->pio_len; |
| 1272 | stp_req->pio_len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1273 | } |
| 1274 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1275 | stp_req->sgl.offset = offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1276 | |
| 1277 | return status; |
| 1278 | } |
| 1279 | |
| 1280 | /** |
| 1281 | * |
| 1282 | * @stp_request: The request that is used for the SGL processing. |
| 1283 | * @data_buffer: The buffer of data to be copied. |
| 1284 | * @length: The length of the data transfer. |
| 1285 | * |
| 1286 | * Copy the data from the buffer for the length specified to the IO reqeust SGL |
| 1287 | * specified data region. enum sci_status |
| 1288 | */ |
| 1289 | static enum sci_status |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1290 | scic_sds_stp_request_pio_data_in_copy_data_buffer(struct isci_stp_request *stp_req, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1291 | u8 *data_buf, u32 len) |
| 1292 | { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1293 | struct isci_request *ireq; |
| 1294 | u8 *src_addr; |
| 1295 | int copy_len; |
| 1296 | struct sas_task *task; |
| 1297 | struct scatterlist *sg; |
| 1298 | void *kaddr; |
| 1299 | int total_len = len; |
| 1300 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1301 | ireq = to_ireq(stp_req); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1302 | task = isci_request_access_task(ireq); |
| 1303 | src_addr = data_buf; |
| 1304 | |
| 1305 | if (task->num_scatter > 0) { |
| 1306 | sg = task->scatter; |
| 1307 | |
| 1308 | while (total_len > 0) { |
| 1309 | struct page *page = sg_page(sg); |
| 1310 | |
| 1311 | copy_len = min_t(int, total_len, sg_dma_len(sg)); |
| 1312 | kaddr = kmap_atomic(page, KM_IRQ0); |
| 1313 | memcpy(kaddr + sg->offset, src_addr, copy_len); |
| 1314 | kunmap_atomic(kaddr, KM_IRQ0); |
| 1315 | total_len -= copy_len; |
| 1316 | src_addr += copy_len; |
| 1317 | sg = sg_next(sg); |
| 1318 | } |
| 1319 | } else { |
| 1320 | BUG_ON(task->total_xfer_len < total_len); |
| 1321 | memcpy(task->scatter, src_addr, total_len); |
| 1322 | } |
| 1323 | |
| 1324 | return SCI_SUCCESS; |
| 1325 | } |
| 1326 | |
| 1327 | /** |
| 1328 | * |
| 1329 | * @sci_req: The PIO DATA IN request that is to receive the data. |
| 1330 | * @data_buffer: The buffer to copy from. |
| 1331 | * |
| 1332 | * Copy the data buffer to the io request data region. enum sci_status |
| 1333 | */ |
| 1334 | static enum sci_status scic_sds_stp_request_pio_data_in_copy_data( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1335 | struct isci_stp_request *stp_req, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1336 | u8 *data_buffer) |
| 1337 | { |
| 1338 | enum sci_status status; |
| 1339 | |
| 1340 | /* |
| 1341 | * If there is less than 1K remaining in the transfer request |
| 1342 | * copy just the data for the transfer */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1343 | if (stp_req->pio_len < SCU_MAX_FRAME_BUFFER_SIZE) { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1344 | status = scic_sds_stp_request_pio_data_in_copy_data_buffer( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1345 | stp_req, data_buffer, stp_req->pio_len); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1346 | |
| 1347 | if (status == SCI_SUCCESS) |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1348 | stp_req->pio_len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1349 | } else { |
| 1350 | /* We are transfering the whole frame so copy */ |
| 1351 | status = scic_sds_stp_request_pio_data_in_copy_data_buffer( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1352 | stp_req, data_buffer, SCU_MAX_FRAME_BUFFER_SIZE); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1353 | |
| 1354 | if (status == SCI_SUCCESS) |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1355 | stp_req->pio_len -= SCU_MAX_FRAME_BUFFER_SIZE; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1356 | } |
| 1357 | |
| 1358 | return status; |
| 1359 | } |
| 1360 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1361 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1362 | stp_request_pio_await_h2d_completion_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1363 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1364 | { |
| 1365 | enum sci_status status = SCI_SUCCESS; |
| 1366 | |
| 1367 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1368 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1369 | scic_sds_request_set_status(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1370 | SCU_TASK_DONE_GOOD, |
| 1371 | SCI_SUCCESS); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1372 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1373 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1374 | break; |
| 1375 | |
| 1376 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1377 | /* All other completion status cause the IO to be |
| 1378 | * complete. If a NAK was received, then it is up to |
| 1379 | * the user to retry the request. |
| 1380 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1381 | scic_sds_request_set_status(ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1382 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
| 1383 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1384 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1385 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1386 | break; |
| 1387 | } |
| 1388 | |
| 1389 | return status; |
| 1390 | } |
| 1391 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1392 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1393 | pio_data_out_tx_done_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1394 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1395 | { |
| 1396 | enum sci_status status = SCI_SUCCESS; |
| 1397 | bool all_frames_transferred = false; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1398 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1399 | |
| 1400 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1401 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
| 1402 | /* Transmit data */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1403 | if (stp_req->pio_len != 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1404 | status = scic_sds_stp_request_pio_data_out_transmit_data(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1405 | if (status == SCI_SUCCESS) { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1406 | if (stp_req->pio_len == 0) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1407 | all_frames_transferred = true; |
| 1408 | } |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1409 | } else if (stp_req->pio_len == 0) { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1410 | /* |
| 1411 | * this will happen if the all data is written at the |
| 1412 | * first time after the pio setup fis is received |
| 1413 | */ |
| 1414 | all_frames_transferred = true; |
| 1415 | } |
| 1416 | |
| 1417 | /* all data transferred. */ |
| 1418 | if (all_frames_transferred) { |
| 1419 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1420 | * Change the state to SCI_REQ_STP_PIO_DATA_IN |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1421 | * and wait for PIO_SETUP fis / or D2H REg fis. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1422 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1423 | } |
| 1424 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1425 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1426 | default: |
| 1427 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1428 | * All other completion status cause the IO to be complete. |
| 1429 | * If a NAK was received, then it is up to the user to retry |
| 1430 | * the request. |
| 1431 | */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1432 | scic_sds_request_set_status( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1433 | ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1434 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1435 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1436 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1437 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1438 | break; |
| 1439 | } |
| 1440 | |
| 1441 | return status; |
| 1442 | } |
| 1443 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1444 | static void scic_sds_stp_request_udma_complete_request( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1445 | struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1446 | u32 scu_status, |
| 1447 | enum sci_status sci_status) |
| 1448 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1449 | scic_sds_request_set_status(ireq, scu_status, sci_status); |
| 1450 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1451 | } |
| 1452 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1453 | static enum sci_status scic_sds_stp_request_udma_general_frame_handler(struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1454 | u32 frame_index) |
| 1455 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1456 | struct scic_sds_controller *scic = ireq->owning_controller; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1457 | struct dev_to_host_fis *frame_header; |
| 1458 | enum sci_status status; |
| 1459 | u32 *frame_buffer; |
| 1460 | |
| 1461 | status = scic_sds_unsolicited_frame_control_get_header(&scic->uf_control, |
| 1462 | frame_index, |
| 1463 | (void **)&frame_header); |
| 1464 | |
| 1465 | if ((status == SCI_SUCCESS) && |
| 1466 | (frame_header->fis_type == FIS_REGD2H)) { |
| 1467 | scic_sds_unsolicited_frame_control_get_buffer(&scic->uf_control, |
| 1468 | frame_index, |
| 1469 | (void **)&frame_buffer); |
| 1470 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1471 | scic_sds_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1472 | frame_header, |
| 1473 | frame_buffer); |
| 1474 | } |
| 1475 | |
| 1476 | scic_sds_controller_release_frame(scic, frame_index); |
| 1477 | |
| 1478 | return status; |
| 1479 | } |
| 1480 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1481 | enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1482 | scic_sds_io_request_frame_handler(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1483 | u32 frame_index) |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1484 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1485 | struct scic_sds_controller *scic = ireq->owning_controller; |
| 1486 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1487 | enum sci_base_request_states state; |
| 1488 | enum sci_status status; |
| 1489 | ssize_t word_cnt; |
| 1490 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1491 | state = ireq->sm.current_state_id; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1492 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1493 | case SCI_REQ_STARTED: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1494 | struct ssp_frame_hdr ssp_hdr; |
| 1495 | void *frame_header; |
| 1496 | |
| 1497 | scic_sds_unsolicited_frame_control_get_header(&scic->uf_control, |
| 1498 | frame_index, |
| 1499 | &frame_header); |
| 1500 | |
| 1501 | word_cnt = sizeof(struct ssp_frame_hdr) / sizeof(u32); |
| 1502 | sci_swab32_cpy(&ssp_hdr, frame_header, word_cnt); |
| 1503 | |
| 1504 | if (ssp_hdr.frame_type == SSP_RESPONSE) { |
| 1505 | struct ssp_response_iu *resp_iu; |
| 1506 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 1507 | |
| 1508 | scic_sds_unsolicited_frame_control_get_buffer(&scic->uf_control, |
| 1509 | frame_index, |
| 1510 | (void **)&resp_iu); |
| 1511 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1512 | sci_swab32_cpy(&ireq->ssp.rsp, resp_iu, word_cnt); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1513 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1514 | resp_iu = &ireq->ssp.rsp; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1515 | |
| 1516 | if (resp_iu->datapres == 0x01 || |
| 1517 | resp_iu->datapres == 0x02) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1518 | scic_sds_request_set_status(ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1519 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 1520 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
| 1521 | } else |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1522 | scic_sds_request_set_status(ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1523 | SCU_TASK_DONE_GOOD, |
| 1524 | SCI_SUCCESS); |
| 1525 | } else { |
| 1526 | /* not a response frame, why did it get forwarded? */ |
| 1527 | dev_err(scic_to_dev(scic), |
| 1528 | "%s: SCIC IO Request 0x%p received unexpected " |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1529 | "frame %d type 0x%02x\n", __func__, ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1530 | frame_index, ssp_hdr.frame_type); |
| 1531 | } |
| 1532 | |
| 1533 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1534 | * In any case we are done with this frame buffer return it to |
| 1535 | * the controller |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1536 | */ |
| 1537 | scic_sds_controller_release_frame(scic, frame_index); |
| 1538 | |
| 1539 | return SCI_SUCCESS; |
| 1540 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1541 | |
| 1542 | case SCI_REQ_TASK_WAIT_TC_RESP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1543 | scic_sds_io_request_copy_response(ireq); |
| 1544 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1545 | scic_sds_controller_release_frame(scic,frame_index); |
| 1546 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1547 | |
| 1548 | case SCI_REQ_SMP_WAIT_RESP: { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1549 | struct smp_resp *rsp_hdr = &ireq->smp.rsp; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1550 | void *frame_header; |
| 1551 | |
| 1552 | scic_sds_unsolicited_frame_control_get_header(&scic->uf_control, |
| 1553 | frame_index, |
| 1554 | &frame_header); |
| 1555 | |
| 1556 | /* byte swap the header. */ |
| 1557 | word_cnt = SMP_RESP_HDR_SZ / sizeof(u32); |
| 1558 | sci_swab32_cpy(rsp_hdr, frame_header, word_cnt); |
| 1559 | |
| 1560 | if (rsp_hdr->frame_type == SMP_RESPONSE) { |
| 1561 | void *smp_resp; |
| 1562 | |
| 1563 | scic_sds_unsolicited_frame_control_get_buffer(&scic->uf_control, |
| 1564 | frame_index, |
| 1565 | &smp_resp); |
| 1566 | |
Dan Williams | 5edc334 | 2011-06-16 17:20:35 -0700 | [diff] [blame] | 1567 | word_cnt = (sizeof(struct smp_resp) - SMP_RESP_HDR_SZ) / |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1568 | sizeof(u32); |
| 1569 | |
| 1570 | sci_swab32_cpy(((u8 *) rsp_hdr) + SMP_RESP_HDR_SZ, |
| 1571 | smp_resp, word_cnt); |
| 1572 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1573 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_GOOD, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1574 | SCI_SUCCESS); |
| 1575 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1576 | sci_change_state(&ireq->sm, SCI_REQ_SMP_WAIT_TC_COMP); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1577 | } else { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1578 | /* |
| 1579 | * This was not a response frame why did it get |
| 1580 | * forwarded? |
| 1581 | */ |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1582 | dev_err(scic_to_dev(scic), |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1583 | "%s: SCIC SMP Request 0x%p received unexpected " |
| 1584 | "frame %d type 0x%02x\n", |
| 1585 | __func__, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1586 | ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1587 | frame_index, |
| 1588 | rsp_hdr->frame_type); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1589 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1590 | scic_sds_request_set_status(ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1591 | SCU_TASK_DONE_SMP_FRM_TYPE_ERR, |
| 1592 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
| 1593 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1594 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1595 | } |
| 1596 | |
| 1597 | scic_sds_controller_release_frame(scic, frame_index); |
| 1598 | |
| 1599 | return SCI_SUCCESS; |
| 1600 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1601 | |
| 1602 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1603 | return scic_sds_stp_request_udma_general_frame_handler(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1604 | frame_index); |
| 1605 | |
| 1606 | case SCI_REQ_STP_UDMA_WAIT_D2H: |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1607 | /* Use the general frame handler to copy the resposne data */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1608 | status = scic_sds_stp_request_udma_general_frame_handler(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1609 | frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1610 | |
| 1611 | if (status != SCI_SUCCESS) |
| 1612 | return status; |
| 1613 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1614 | scic_sds_stp_request_udma_complete_request(ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1615 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 1616 | SCI_FAILURE_IO_RESPONSE_VALID); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1617 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1618 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1619 | |
| 1620 | case SCI_REQ_STP_NON_DATA_WAIT_D2H: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1621 | struct dev_to_host_fis *frame_header; |
| 1622 | u32 *frame_buffer; |
| 1623 | |
| 1624 | status = scic_sds_unsolicited_frame_control_get_header(&scic->uf_control, |
| 1625 | frame_index, |
| 1626 | (void **)&frame_header); |
| 1627 | |
| 1628 | if (status != SCI_SUCCESS) { |
| 1629 | dev_err(scic_to_dev(scic), |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1630 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1631 | "header for frame index %d, status %x\n", |
| 1632 | __func__, |
| 1633 | stp_req, |
| 1634 | frame_index, |
| 1635 | status); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1636 | |
| 1637 | return status; |
| 1638 | } |
| 1639 | |
| 1640 | switch (frame_header->fis_type) { |
| 1641 | case FIS_REGD2H: |
| 1642 | scic_sds_unsolicited_frame_control_get_buffer(&scic->uf_control, |
| 1643 | frame_index, |
| 1644 | (void **)&frame_buffer); |
| 1645 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1646 | scic_sds_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1647 | frame_header, |
| 1648 | frame_buffer); |
| 1649 | |
| 1650 | /* The command has completed with error */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1651 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_CHECK_RESPONSE, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1652 | SCI_FAILURE_IO_RESPONSE_VALID); |
| 1653 | break; |
| 1654 | |
| 1655 | default: |
| 1656 | dev_warn(scic_to_dev(scic), |
| 1657 | "%s: IO Request:0x%p Frame Id:%d protocol " |
| 1658 | "violation occurred\n", __func__, stp_req, |
| 1659 | frame_index); |
| 1660 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1661 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_UNEXP_FIS, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1662 | SCI_FAILURE_PROTOCOL_VIOLATION); |
| 1663 | break; |
| 1664 | } |
| 1665 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1666 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1667 | |
| 1668 | /* Frame has been decoded return it to the controller */ |
| 1669 | scic_sds_controller_release_frame(scic, frame_index); |
| 1670 | |
| 1671 | return status; |
| 1672 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1673 | |
| 1674 | case SCI_REQ_STP_PIO_WAIT_FRAME: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1675 | struct sas_task *task = isci_request_access_task(ireq); |
| 1676 | struct dev_to_host_fis *frame_header; |
| 1677 | u32 *frame_buffer; |
| 1678 | |
| 1679 | status = scic_sds_unsolicited_frame_control_get_header(&scic->uf_control, |
| 1680 | frame_index, |
| 1681 | (void **)&frame_header); |
| 1682 | |
| 1683 | if (status != SCI_SUCCESS) { |
| 1684 | dev_err(scic_to_dev(scic), |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1685 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1686 | "header for frame index %d, status %x\n", |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1687 | __func__, stp_req, frame_index, status); |
| 1688 | return status; |
| 1689 | } |
| 1690 | |
| 1691 | switch (frame_header->fis_type) { |
| 1692 | case FIS_PIO_SETUP: |
| 1693 | /* Get from the frame buffer the PIO Setup Data */ |
| 1694 | scic_sds_unsolicited_frame_control_get_buffer(&scic->uf_control, |
| 1695 | frame_index, |
| 1696 | (void **)&frame_buffer); |
| 1697 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1698 | /* Get the data from the PIO Setup The SCU Hardware |
| 1699 | * returns first word in the frame_header and the rest |
| 1700 | * of the data is in the frame buffer so we need to |
| 1701 | * back up one dword |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1702 | */ |
| 1703 | |
| 1704 | /* transfer_count: first 16bits in the 4th dword */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1705 | stp_req->pio_len = frame_buffer[3] & 0xffff; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1706 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1707 | /* status: 4th byte in the 3rd dword */ |
| 1708 | stp_req->status = (frame_buffer[2] >> 24) & 0xff; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1709 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1710 | scic_sds_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1711 | frame_header, |
| 1712 | frame_buffer); |
| 1713 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1714 | ireq->stp.rsp.status = stp_req->status; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1715 | |
| 1716 | /* The next state is dependent on whether the |
| 1717 | * request was PIO Data-in or Data out |
| 1718 | */ |
| 1719 | if (task->data_dir == DMA_FROM_DEVICE) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1720 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_DATA_IN); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1721 | } else if (task->data_dir == DMA_TO_DEVICE) { |
| 1722 | /* Transmit data */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1723 | status = scic_sds_stp_request_pio_data_out_transmit_data(ireq); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1724 | if (status != SCI_SUCCESS) |
| 1725 | break; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1726 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_DATA_OUT); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1727 | } |
| 1728 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1729 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1730 | case FIS_SETDEVBITS: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1731 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1732 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1733 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1734 | case FIS_REGD2H: |
| 1735 | if (frame_header->status & ATA_BUSY) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1736 | /* |
| 1737 | * Now why is the drive sending a D2H Register |
| 1738 | * FIS when it is still busy? Do nothing since |
| 1739 | * we are still in the right state. |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1740 | */ |
| 1741 | dev_dbg(scic_to_dev(scic), |
| 1742 | "%s: SCIC PIO Request 0x%p received " |
| 1743 | "D2H Register FIS with BSY status " |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1744 | "0x%x\n", |
| 1745 | __func__, |
| 1746 | stp_req, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1747 | frame_header->status); |
| 1748 | break; |
| 1749 | } |
| 1750 | |
| 1751 | scic_sds_unsolicited_frame_control_get_buffer(&scic->uf_control, |
| 1752 | frame_index, |
| 1753 | (void **)&frame_buffer); |
| 1754 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1755 | scic_sds_controller_copy_sata_response(&ireq->stp.req, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1756 | frame_header, |
| 1757 | frame_buffer); |
| 1758 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1759 | scic_sds_request_set_status(ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1760 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 1761 | SCI_FAILURE_IO_RESPONSE_VALID); |
| 1762 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1763 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1764 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1765 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1766 | default: |
| 1767 | /* FIXME: what do we do here? */ |
| 1768 | break; |
| 1769 | } |
| 1770 | |
| 1771 | /* Frame is decoded return it to the controller */ |
| 1772 | scic_sds_controller_release_frame(scic, frame_index); |
| 1773 | |
| 1774 | return status; |
| 1775 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1776 | |
| 1777 | case SCI_REQ_STP_PIO_DATA_IN: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1778 | struct dev_to_host_fis *frame_header; |
| 1779 | struct sata_fis_data *frame_buffer; |
| 1780 | |
| 1781 | status = scic_sds_unsolicited_frame_control_get_header(&scic->uf_control, |
| 1782 | frame_index, |
| 1783 | (void **)&frame_header); |
| 1784 | |
| 1785 | if (status != SCI_SUCCESS) { |
| 1786 | dev_err(scic_to_dev(scic), |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1787 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1788 | "header for frame index %d, status %x\n", |
| 1789 | __func__, |
| 1790 | stp_req, |
| 1791 | frame_index, |
| 1792 | status); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1793 | return status; |
| 1794 | } |
| 1795 | |
| 1796 | if (frame_header->fis_type != FIS_DATA) { |
| 1797 | dev_err(scic_to_dev(scic), |
| 1798 | "%s: SCIC PIO Request 0x%p received frame %d " |
| 1799 | "with fis type 0x%02x when expecting a data " |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1800 | "fis.\n", |
| 1801 | __func__, |
| 1802 | stp_req, |
| 1803 | frame_index, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1804 | frame_header->fis_type); |
| 1805 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1806 | scic_sds_request_set_status(ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1807 | SCU_TASK_DONE_GOOD, |
| 1808 | SCI_FAILURE_IO_REQUIRES_SCSI_ABORT); |
| 1809 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1810 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1811 | |
| 1812 | /* Frame is decoded return it to the controller */ |
| 1813 | scic_sds_controller_release_frame(scic, frame_index); |
| 1814 | return status; |
| 1815 | } |
| 1816 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1817 | if (stp_req->sgl.index < 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1818 | ireq->saved_rx_frame_index = frame_index; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1819 | stp_req->pio_len = 0; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1820 | } else { |
| 1821 | scic_sds_unsolicited_frame_control_get_buffer(&scic->uf_control, |
| 1822 | frame_index, |
| 1823 | (void **)&frame_buffer); |
| 1824 | |
| 1825 | status = scic_sds_stp_request_pio_data_in_copy_data(stp_req, |
| 1826 | (u8 *)frame_buffer); |
| 1827 | |
| 1828 | /* Frame is decoded return it to the controller */ |
| 1829 | scic_sds_controller_release_frame(scic, frame_index); |
| 1830 | } |
| 1831 | |
| 1832 | /* Check for the end of the transfer, are there more |
| 1833 | * bytes remaining for this data transfer |
| 1834 | */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1835 | if (status != SCI_SUCCESS || stp_req->pio_len != 0) |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1836 | return status; |
| 1837 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1838 | if ((stp_req->status & ATA_BUSY) == 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1839 | scic_sds_request_set_status(ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1840 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 1841 | SCI_FAILURE_IO_RESPONSE_VALID); |
| 1842 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1843 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1844 | } else { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1845 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1846 | } |
| 1847 | return status; |
| 1848 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1849 | |
| 1850 | case SCI_REQ_STP_SOFT_RESET_WAIT_D2H: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1851 | struct dev_to_host_fis *frame_header; |
| 1852 | u32 *frame_buffer; |
| 1853 | |
| 1854 | status = scic_sds_unsolicited_frame_control_get_header(&scic->uf_control, |
| 1855 | frame_index, |
| 1856 | (void **)&frame_header); |
| 1857 | if (status != SCI_SUCCESS) { |
| 1858 | dev_err(scic_to_dev(scic), |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1859 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1860 | "header for frame index %d, status %x\n", |
| 1861 | __func__, |
| 1862 | stp_req, |
| 1863 | frame_index, |
| 1864 | status); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1865 | return status; |
| 1866 | } |
| 1867 | |
| 1868 | switch (frame_header->fis_type) { |
| 1869 | case FIS_REGD2H: |
| 1870 | scic_sds_unsolicited_frame_control_get_buffer(&scic->uf_control, |
| 1871 | frame_index, |
| 1872 | (void **)&frame_buffer); |
| 1873 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1874 | scic_sds_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1875 | frame_header, |
| 1876 | frame_buffer); |
| 1877 | |
| 1878 | /* The command has completed with error */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1879 | scic_sds_request_set_status(ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1880 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 1881 | SCI_FAILURE_IO_RESPONSE_VALID); |
| 1882 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1883 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1884 | default: |
| 1885 | dev_warn(scic_to_dev(scic), |
| 1886 | "%s: IO Request:0x%p Frame Id:%d protocol " |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1887 | "violation occurred\n", |
| 1888 | __func__, |
| 1889 | stp_req, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1890 | frame_index); |
| 1891 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1892 | scic_sds_request_set_status(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1893 | SCU_TASK_DONE_UNEXP_FIS, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1894 | SCI_FAILURE_PROTOCOL_VIOLATION); |
| 1895 | break; |
| 1896 | } |
| 1897 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1898 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1899 | |
| 1900 | /* Frame has been decoded return it to the controller */ |
| 1901 | scic_sds_controller_release_frame(scic, frame_index); |
| 1902 | |
| 1903 | return status; |
| 1904 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1905 | case SCI_REQ_ABORTING: |
| 1906 | /* |
| 1907 | * TODO: Is it even possible to get an unsolicited frame in the |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1908 | * aborting state? |
| 1909 | */ |
| 1910 | scic_sds_controller_release_frame(scic, frame_index); |
| 1911 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1912 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1913 | default: |
| 1914 | dev_warn(scic_to_dev(scic), |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1915 | "%s: SCIC IO Request given unexpected frame %x while " |
| 1916 | "in state %d\n", |
| 1917 | __func__, |
| 1918 | frame_index, |
| 1919 | state); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1920 | |
| 1921 | scic_sds_controller_release_frame(scic, frame_index); |
| 1922 | return SCI_FAILURE_INVALID_STATE; |
| 1923 | } |
| 1924 | } |
| 1925 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1926 | static enum sci_status stp_request_udma_await_tc_event(struct isci_request *ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1927 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1928 | { |
| 1929 | enum sci_status status = SCI_SUCCESS; |
| 1930 | |
| 1931 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1932 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1933 | scic_sds_stp_request_udma_complete_request(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1934 | SCU_TASK_DONE_GOOD, |
| 1935 | SCI_SUCCESS); |
| 1936 | break; |
| 1937 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_FIS): |
| 1938 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1939 | /* We must check ther response buffer to see if the D2H |
| 1940 | * Register FIS was received before we got the TC |
| 1941 | * completion. |
| 1942 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1943 | if (ireq->stp.rsp.fis_type == FIS_REGD2H) { |
| 1944 | scic_sds_remote_device_suspend(ireq->target_device, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1945 | SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code))); |
| 1946 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1947 | scic_sds_stp_request_udma_complete_request(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1948 | SCU_TASK_DONE_CHECK_RESPONSE, |
| 1949 | SCI_FAILURE_IO_RESPONSE_VALID); |
| 1950 | } else { |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1951 | /* If we have an error completion status for the |
| 1952 | * TC then we can expect a D2H register FIS from |
| 1953 | * the device so we must change state to wait |
| 1954 | * for it |
| 1955 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1956 | sci_change_state(&ireq->sm, SCI_REQ_STP_UDMA_WAIT_D2H); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1957 | } |
| 1958 | break; |
| 1959 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1960 | /* TODO Check to see if any of these completion status need to |
| 1961 | * wait for the device to host register fis. |
| 1962 | */ |
| 1963 | /* TODO We can retry the command for SCU_TASK_DONE_CMD_LL_R_ERR |
| 1964 | * - this comes only for B0 |
| 1965 | */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1966 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_INV_FIS_LEN): |
| 1967 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR): |
| 1968 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_R_ERR): |
| 1969 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CMD_LL_R_ERR): |
| 1970 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CRC_ERR): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1971 | scic_sds_remote_device_suspend(ireq->target_device, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1972 | SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code))); |
| 1973 | /* Fall through to the default case */ |
| 1974 | default: |
| 1975 | /* All other completion status cause the IO to be complete. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1976 | scic_sds_stp_request_udma_complete_request(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1977 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
| 1978 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
| 1979 | break; |
| 1980 | } |
| 1981 | |
| 1982 | return status; |
| 1983 | } |
| 1984 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1985 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1986 | stp_request_soft_reset_await_h2d_asserted_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1987 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1988 | { |
| 1989 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1990 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1991 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_GOOD, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1992 | SCI_SUCCESS); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1993 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1994 | sci_change_state(&ireq->sm, SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1995 | break; |
| 1996 | |
| 1997 | default: |
| 1998 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1999 | * All other completion status cause the IO to be complete. |
| 2000 | * If a NAK was received, then it is up to the user to retry |
| 2001 | * the request. |
| 2002 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2003 | scic_sds_request_set_status(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2004 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
| 2005 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2006 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2007 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2008 | break; |
| 2009 | } |
| 2010 | |
| 2011 | return SCI_SUCCESS; |
| 2012 | } |
| 2013 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2014 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2015 | stp_request_soft_reset_await_h2d_diagnostic_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2016 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2017 | { |
| 2018 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 2019 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2020 | scic_sds_request_set_status(ireq, SCU_TASK_DONE_GOOD, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2021 | SCI_SUCCESS); |
| 2022 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2023 | sci_change_state(&ireq->sm, SCI_REQ_STP_SOFT_RESET_WAIT_D2H); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2024 | break; |
| 2025 | |
| 2026 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2027 | /* All other completion status cause the IO to be complete. If |
| 2028 | * a NAK was received, then it is up to the user to retry the |
| 2029 | * request. |
| 2030 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2031 | scic_sds_request_set_status(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2032 | SCU_NORMALIZE_COMPLETION_STATUS(completion_code), |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2033 | SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2034 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2035 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2036 | break; |
| 2037 | } |
| 2038 | |
| 2039 | return SCI_SUCCESS; |
| 2040 | } |
| 2041 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2042 | enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2043 | scic_sds_io_request_tc_completion(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2044 | u32 completion_code) |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2045 | { |
| 2046 | enum sci_base_request_states state; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2047 | struct scic_sds_controller *scic = ireq->owning_controller; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2048 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2049 | state = ireq->sm.current_state_id; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2050 | |
| 2051 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2052 | case SCI_REQ_STARTED: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2053 | return request_started_state_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2054 | |
| 2055 | case SCI_REQ_TASK_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2056 | return ssp_task_request_await_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2057 | completion_code); |
| 2058 | |
| 2059 | case SCI_REQ_SMP_WAIT_RESP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2060 | return smp_request_await_response_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2061 | completion_code); |
| 2062 | |
| 2063 | case SCI_REQ_SMP_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2064 | return smp_request_await_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2065 | |
| 2066 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2067 | return stp_request_udma_await_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2068 | completion_code); |
| 2069 | |
| 2070 | case SCI_REQ_STP_NON_DATA_WAIT_H2D: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2071 | return stp_request_non_data_await_h2d_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2072 | completion_code); |
| 2073 | |
| 2074 | case SCI_REQ_STP_PIO_WAIT_H2D: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2075 | return stp_request_pio_await_h2d_completion_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2076 | completion_code); |
| 2077 | |
| 2078 | case SCI_REQ_STP_PIO_DATA_OUT: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2079 | return pio_data_out_tx_done_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2080 | |
| 2081 | case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2082 | return stp_request_soft_reset_await_h2d_asserted_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2083 | completion_code); |
| 2084 | |
| 2085 | case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2086 | return stp_request_soft_reset_await_h2d_diagnostic_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2087 | completion_code); |
| 2088 | |
| 2089 | case SCI_REQ_ABORTING: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2090 | return request_aborting_state_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2091 | completion_code); |
| 2092 | |
| 2093 | default: |
| 2094 | dev_warn(scic_to_dev(scic), |
| 2095 | "%s: SCIC IO Request given task completion " |
| 2096 | "notification %x while in wrong state %d\n", |
| 2097 | __func__, |
| 2098 | completion_code, |
| 2099 | state); |
| 2100 | return SCI_FAILURE_INVALID_STATE; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2101 | } |
| 2102 | } |
| 2103 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2104 | /** |
| 2105 | * isci_request_process_response_iu() - This function sets the status and |
| 2106 | * response iu, in the task struct, from the request object for the upper |
| 2107 | * layer driver. |
| 2108 | * @sas_task: This parameter is the task struct from the upper layer driver. |
| 2109 | * @resp_iu: This parameter points to the response iu of the completed request. |
| 2110 | * @dev: This parameter specifies the linux device struct. |
| 2111 | * |
| 2112 | * none. |
| 2113 | */ |
| 2114 | static void isci_request_process_response_iu( |
| 2115 | struct sas_task *task, |
| 2116 | struct ssp_response_iu *resp_iu, |
| 2117 | struct device *dev) |
| 2118 | { |
| 2119 | dev_dbg(dev, |
| 2120 | "%s: resp_iu = %p " |
| 2121 | "resp_iu->status = 0x%x,\nresp_iu->datapres = %d " |
| 2122 | "resp_iu->response_data_len = %x, " |
| 2123 | "resp_iu->sense_data_len = %x\nrepsonse data: ", |
| 2124 | __func__, |
| 2125 | resp_iu, |
| 2126 | resp_iu->status, |
| 2127 | resp_iu->datapres, |
| 2128 | resp_iu->response_data_len, |
| 2129 | resp_iu->sense_data_len); |
| 2130 | |
| 2131 | task->task_status.stat = resp_iu->status; |
| 2132 | |
| 2133 | /* libsas updates the task status fields based on the response iu. */ |
| 2134 | sas_ssp_task_response(dev, task, resp_iu); |
| 2135 | } |
| 2136 | |
| 2137 | /** |
| 2138 | * isci_request_set_open_reject_status() - This function prepares the I/O |
| 2139 | * completion for OPEN_REJECT conditions. |
| 2140 | * @request: This parameter is the completed isci_request object. |
| 2141 | * @response_ptr: This parameter specifies the service response for the I/O. |
| 2142 | * @status_ptr: This parameter specifies the exec status for the I/O. |
| 2143 | * @complete_to_host_ptr: This parameter specifies the action to be taken by |
| 2144 | * the LLDD with respect to completing this request or forcing an abort |
| 2145 | * condition on the I/O. |
| 2146 | * @open_rej_reason: This parameter specifies the encoded reason for the |
| 2147 | * abandon-class reject. |
| 2148 | * |
| 2149 | * none. |
| 2150 | */ |
| 2151 | static void isci_request_set_open_reject_status( |
| 2152 | struct isci_request *request, |
| 2153 | struct sas_task *task, |
| 2154 | enum service_response *response_ptr, |
| 2155 | enum exec_status *status_ptr, |
| 2156 | enum isci_completion_selection *complete_to_host_ptr, |
| 2157 | enum sas_open_rej_reason open_rej_reason) |
| 2158 | { |
| 2159 | /* Task in the target is done. */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2160 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2161 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2162 | *status_ptr = SAS_OPEN_REJECT; |
| 2163 | *complete_to_host_ptr = isci_perform_normal_io_completion; |
| 2164 | task->task_status.open_rej_reason = open_rej_reason; |
| 2165 | } |
| 2166 | |
| 2167 | /** |
| 2168 | * isci_request_handle_controller_specific_errors() - This function decodes |
| 2169 | * controller-specific I/O completion error conditions. |
| 2170 | * @request: This parameter is the completed isci_request object. |
| 2171 | * @response_ptr: This parameter specifies the service response for the I/O. |
| 2172 | * @status_ptr: This parameter specifies the exec status for the I/O. |
| 2173 | * @complete_to_host_ptr: This parameter specifies the action to be taken by |
| 2174 | * the LLDD with respect to completing this request or forcing an abort |
| 2175 | * condition on the I/O. |
| 2176 | * |
| 2177 | * none. |
| 2178 | */ |
| 2179 | static void isci_request_handle_controller_specific_errors( |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2180 | struct isci_remote_device *idev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2181 | struct isci_request *request, |
| 2182 | struct sas_task *task, |
| 2183 | enum service_response *response_ptr, |
| 2184 | enum exec_status *status_ptr, |
| 2185 | enum isci_completion_selection *complete_to_host_ptr) |
| 2186 | { |
| 2187 | unsigned int cstatus; |
| 2188 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2189 | cstatus = request->scu_status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2190 | |
| 2191 | dev_dbg(&request->isci_host->pdev->dev, |
| 2192 | "%s: %p SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR " |
| 2193 | "- controller status = 0x%x\n", |
| 2194 | __func__, request, cstatus); |
| 2195 | |
| 2196 | /* Decode the controller-specific errors; most |
| 2197 | * important is to recognize those conditions in which |
| 2198 | * the target may still have a task outstanding that |
| 2199 | * must be aborted. |
| 2200 | * |
| 2201 | * Note that there are SCU completion codes being |
| 2202 | * named in the decode below for which SCIC has already |
| 2203 | * done work to handle them in a way other than as |
| 2204 | * a controller-specific completion code; these are left |
| 2205 | * in the decode below for completeness sake. |
| 2206 | */ |
| 2207 | switch (cstatus) { |
| 2208 | case SCU_TASK_DONE_DMASETUP_DIRERR: |
| 2209 | /* Also SCU_TASK_DONE_SMP_FRM_TYPE_ERR: */ |
| 2210 | case SCU_TASK_DONE_XFERCNT_ERR: |
| 2211 | /* Also SCU_TASK_DONE_SMP_UFI_ERR: */ |
| 2212 | if (task->task_proto == SAS_PROTOCOL_SMP) { |
| 2213 | /* SCU_TASK_DONE_SMP_UFI_ERR == Task Done. */ |
| 2214 | *response_ptr = SAS_TASK_COMPLETE; |
| 2215 | |
| 2216 | /* See if the device has been/is being stopped. Note |
| 2217 | * that we ignore the quiesce state, since we are |
| 2218 | * concerned about the actual device state. |
| 2219 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2220 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2221 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2222 | else |
| 2223 | *status_ptr = SAS_ABORTED_TASK; |
| 2224 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2225 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2226 | |
| 2227 | *complete_to_host_ptr = |
| 2228 | isci_perform_normal_io_completion; |
| 2229 | } else { |
| 2230 | /* Task in the target is not done. */ |
| 2231 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2232 | |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2233 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2234 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2235 | else |
| 2236 | *status_ptr = SAM_STAT_TASK_ABORTED; |
| 2237 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2238 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2239 | |
| 2240 | *complete_to_host_ptr = |
| 2241 | isci_perform_error_io_completion; |
| 2242 | } |
| 2243 | |
| 2244 | break; |
| 2245 | |
| 2246 | case SCU_TASK_DONE_CRC_ERR: |
| 2247 | case SCU_TASK_DONE_NAK_CMD_ERR: |
| 2248 | case SCU_TASK_DONE_EXCESS_DATA: |
| 2249 | case SCU_TASK_DONE_UNEXP_FIS: |
| 2250 | /* Also SCU_TASK_DONE_UNEXP_RESP: */ |
| 2251 | case SCU_TASK_DONE_VIIT_ENTRY_NV: /* TODO - conditions? */ |
| 2252 | case SCU_TASK_DONE_IIT_ENTRY_NV: /* TODO - conditions? */ |
| 2253 | case SCU_TASK_DONE_RNCNV_OUTBOUND: /* TODO - conditions? */ |
| 2254 | /* These are conditions in which the target |
| 2255 | * has completed the task, so that no cleanup |
| 2256 | * is necessary. |
| 2257 | */ |
| 2258 | *response_ptr = SAS_TASK_COMPLETE; |
| 2259 | |
| 2260 | /* See if the device has been/is being stopped. Note |
| 2261 | * that we ignore the quiesce state, since we are |
| 2262 | * concerned about the actual device state. |
| 2263 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2264 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2265 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2266 | else |
| 2267 | *status_ptr = SAS_ABORTED_TASK; |
| 2268 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2269 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2270 | |
| 2271 | *complete_to_host_ptr = isci_perform_normal_io_completion; |
| 2272 | break; |
| 2273 | |
| 2274 | |
| 2275 | /* Note that the only open reject completion codes seen here will be |
| 2276 | * abandon-class codes; all others are automatically retried in the SCU. |
| 2277 | */ |
| 2278 | case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION: |
| 2279 | |
| 2280 | isci_request_set_open_reject_status( |
| 2281 | request, task, response_ptr, status_ptr, |
| 2282 | complete_to_host_ptr, SAS_OREJ_WRONG_DEST); |
| 2283 | break; |
| 2284 | |
| 2285 | case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION: |
| 2286 | |
| 2287 | /* Note - the return of AB0 will change when |
| 2288 | * libsas implements detection of zone violations. |
| 2289 | */ |
| 2290 | isci_request_set_open_reject_status( |
| 2291 | request, task, response_ptr, status_ptr, |
| 2292 | complete_to_host_ptr, SAS_OREJ_RESV_AB0); |
| 2293 | break; |
| 2294 | |
| 2295 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1: |
| 2296 | |
| 2297 | isci_request_set_open_reject_status( |
| 2298 | request, task, response_ptr, status_ptr, |
| 2299 | complete_to_host_ptr, SAS_OREJ_RESV_AB1); |
| 2300 | break; |
| 2301 | |
| 2302 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2: |
| 2303 | |
| 2304 | isci_request_set_open_reject_status( |
| 2305 | request, task, response_ptr, status_ptr, |
| 2306 | complete_to_host_ptr, SAS_OREJ_RESV_AB2); |
| 2307 | break; |
| 2308 | |
| 2309 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3: |
| 2310 | |
| 2311 | isci_request_set_open_reject_status( |
| 2312 | request, task, response_ptr, status_ptr, |
| 2313 | complete_to_host_ptr, SAS_OREJ_RESV_AB3); |
| 2314 | break; |
| 2315 | |
| 2316 | case SCU_TASK_OPEN_REJECT_BAD_DESTINATION: |
| 2317 | |
| 2318 | isci_request_set_open_reject_status( |
| 2319 | request, task, response_ptr, status_ptr, |
| 2320 | complete_to_host_ptr, SAS_OREJ_BAD_DEST); |
| 2321 | break; |
| 2322 | |
| 2323 | case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY: |
| 2324 | |
| 2325 | isci_request_set_open_reject_status( |
| 2326 | request, task, response_ptr, status_ptr, |
| 2327 | complete_to_host_ptr, SAS_OREJ_STP_NORES); |
| 2328 | break; |
| 2329 | |
| 2330 | case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED: |
| 2331 | |
| 2332 | isci_request_set_open_reject_status( |
| 2333 | request, task, response_ptr, status_ptr, |
| 2334 | complete_to_host_ptr, SAS_OREJ_EPROTO); |
| 2335 | break; |
| 2336 | |
| 2337 | case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED: |
| 2338 | |
| 2339 | isci_request_set_open_reject_status( |
| 2340 | request, task, response_ptr, status_ptr, |
| 2341 | complete_to_host_ptr, SAS_OREJ_CONN_RATE); |
| 2342 | break; |
| 2343 | |
| 2344 | case SCU_TASK_DONE_LL_R_ERR: |
| 2345 | /* Also SCU_TASK_DONE_ACK_NAK_TO: */ |
| 2346 | case SCU_TASK_DONE_LL_PERR: |
| 2347 | case SCU_TASK_DONE_LL_SY_TERM: |
| 2348 | /* Also SCU_TASK_DONE_NAK_ERR:*/ |
| 2349 | case SCU_TASK_DONE_LL_LF_TERM: |
| 2350 | /* Also SCU_TASK_DONE_DATA_LEN_ERR: */ |
| 2351 | case SCU_TASK_DONE_LL_ABORT_ERR: |
| 2352 | case SCU_TASK_DONE_SEQ_INV_TYPE: |
| 2353 | /* Also SCU_TASK_DONE_UNEXP_XR: */ |
| 2354 | case SCU_TASK_DONE_XR_IU_LEN_ERR: |
| 2355 | case SCU_TASK_DONE_INV_FIS_LEN: |
| 2356 | /* Also SCU_TASK_DONE_XR_WD_LEN: */ |
| 2357 | case SCU_TASK_DONE_SDMA_ERR: |
| 2358 | case SCU_TASK_DONE_OFFSET_ERR: |
| 2359 | case SCU_TASK_DONE_MAX_PLD_ERR: |
| 2360 | case SCU_TASK_DONE_LF_ERR: |
| 2361 | case SCU_TASK_DONE_SMP_RESP_TO_ERR: /* Escalate to dev reset? */ |
| 2362 | case SCU_TASK_DONE_SMP_LL_RX_ERR: |
| 2363 | case SCU_TASK_DONE_UNEXP_DATA: |
| 2364 | case SCU_TASK_DONE_UNEXP_SDBFIS: |
| 2365 | case SCU_TASK_DONE_REG_ERR: |
| 2366 | case SCU_TASK_DONE_SDB_ERR: |
| 2367 | case SCU_TASK_DONE_TASK_ABORT: |
| 2368 | default: |
| 2369 | /* Task in the target is not done. */ |
| 2370 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2371 | *status_ptr = SAM_STAT_TASK_ABORTED; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2372 | |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2373 | if (task->task_proto == SAS_PROTOCOL_SMP) { |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2374 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2375 | |
| 2376 | *complete_to_host_ptr = isci_perform_normal_io_completion; |
| 2377 | } else { |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2378 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2379 | |
| 2380 | *complete_to_host_ptr = isci_perform_error_io_completion; |
| 2381 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2382 | break; |
| 2383 | } |
| 2384 | } |
| 2385 | |
| 2386 | /** |
| 2387 | * isci_task_save_for_upper_layer_completion() - This function saves the |
| 2388 | * request for later completion to the upper layer driver. |
| 2389 | * @host: This parameter is a pointer to the host on which the the request |
| 2390 | * should be queued (either as an error or success). |
| 2391 | * @request: This parameter is the completed request. |
| 2392 | * @response: This parameter is the response code for the completed task. |
| 2393 | * @status: This parameter is the status code for the completed task. |
| 2394 | * |
| 2395 | * none. |
| 2396 | */ |
| 2397 | static void isci_task_save_for_upper_layer_completion( |
| 2398 | struct isci_host *host, |
| 2399 | struct isci_request *request, |
| 2400 | enum service_response response, |
| 2401 | enum exec_status status, |
| 2402 | enum isci_completion_selection task_notification_selection) |
| 2403 | { |
| 2404 | struct sas_task *task = isci_request_access_task(request); |
| 2405 | |
Jeff Skirvin | ec6c963 | 2011-03-04 14:06:44 -0800 | [diff] [blame] | 2406 | task_notification_selection |
| 2407 | = isci_task_set_completion_status(task, response, status, |
| 2408 | task_notification_selection); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2409 | |
| 2410 | /* Tasks aborted specifically by a call to the lldd_abort_task |
| 2411 | * function should not be completed to the host in the regular path. |
| 2412 | */ |
| 2413 | switch (task_notification_selection) { |
| 2414 | |
| 2415 | case isci_perform_normal_io_completion: |
| 2416 | |
| 2417 | /* Normal notification (task_done) */ |
| 2418 | dev_dbg(&host->pdev->dev, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2419 | "%s: Normal - task = %p, response=%d (%d), status=%d (%d)\n", |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2420 | __func__, |
| 2421 | task, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2422 | task->task_status.resp, response, |
| 2423 | task->task_status.stat, status); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2424 | /* Add to the completed list. */ |
| 2425 | list_add(&request->completed_node, |
| 2426 | &host->requests_to_complete); |
Jeff Skirvin | ec6c963 | 2011-03-04 14:06:44 -0800 | [diff] [blame] | 2427 | |
| 2428 | /* Take the request off the device's pending request list. */ |
| 2429 | list_del_init(&request->dev_node); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2430 | break; |
| 2431 | |
| 2432 | case isci_perform_aborted_io_completion: |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2433 | /* No notification to libsas because this request is |
| 2434 | * already in the abort path. |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2435 | */ |
| 2436 | dev_warn(&host->pdev->dev, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2437 | "%s: Aborted - task = %p, response=%d (%d), status=%d (%d)\n", |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2438 | __func__, |
| 2439 | task, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2440 | task->task_status.resp, response, |
| 2441 | task->task_status.stat, status); |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2442 | |
| 2443 | /* Wake up whatever process was waiting for this |
| 2444 | * request to complete. |
| 2445 | */ |
| 2446 | WARN_ON(request->io_request_completion == NULL); |
| 2447 | |
| 2448 | if (request->io_request_completion != NULL) { |
| 2449 | |
| 2450 | /* Signal whoever is waiting that this |
| 2451 | * request is complete. |
| 2452 | */ |
| 2453 | complete(request->io_request_completion); |
| 2454 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2455 | break; |
| 2456 | |
| 2457 | case isci_perform_error_io_completion: |
| 2458 | /* Use sas_task_abort */ |
| 2459 | dev_warn(&host->pdev->dev, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2460 | "%s: Error - task = %p, response=%d (%d), status=%d (%d)\n", |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2461 | __func__, |
| 2462 | task, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2463 | task->task_status.resp, response, |
| 2464 | task->task_status.stat, status); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2465 | /* Add to the aborted list. */ |
| 2466 | list_add(&request->completed_node, |
Jeff Skirvin | 11b00c1 | 2011-03-04 14:06:40 -0800 | [diff] [blame] | 2467 | &host->requests_to_errorback); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2468 | break; |
| 2469 | |
| 2470 | default: |
| 2471 | dev_warn(&host->pdev->dev, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2472 | "%s: Unknown - task = %p, response=%d (%d), status=%d (%d)\n", |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2473 | __func__, |
| 2474 | task, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2475 | task->task_status.resp, response, |
| 2476 | task->task_status.stat, status); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2477 | |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2478 | /* Add to the error to libsas list. */ |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2479 | list_add(&request->completed_node, |
Jeff Skirvin | 11b00c1 | 2011-03-04 14:06:40 -0800 | [diff] [blame] | 2480 | &host->requests_to_errorback); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2481 | break; |
| 2482 | } |
| 2483 | } |
| 2484 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2485 | static void isci_request_io_request_complete(struct isci_host *isci_host, |
| 2486 | struct isci_request *request, |
| 2487 | enum sci_io_status completion_status) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2488 | { |
| 2489 | struct sas_task *task = isci_request_access_task(request); |
| 2490 | struct ssp_response_iu *resp_iu; |
| 2491 | void *resp_buf; |
| 2492 | unsigned long task_flags; |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2493 | struct isci_remote_device *idev = isci_lookup_device(task->dev); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2494 | enum service_response response = SAS_TASK_UNDELIVERED; |
| 2495 | enum exec_status status = SAS_ABORTED_TASK; |
| 2496 | enum isci_request_status request_status; |
| 2497 | enum isci_completion_selection complete_to_host |
| 2498 | = isci_perform_normal_io_completion; |
| 2499 | |
| 2500 | dev_dbg(&isci_host->pdev->dev, |
| 2501 | "%s: request = %p, task = %p,\n" |
| 2502 | "task->data_dir = %d completion_status = 0x%x\n", |
| 2503 | __func__, |
| 2504 | request, |
| 2505 | task, |
| 2506 | task->data_dir, |
| 2507 | completion_status); |
| 2508 | |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2509 | spin_lock(&request->state_lock); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2510 | request_status = isci_request_get_state(request); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2511 | |
| 2512 | /* Decode the request status. Note that if the request has been |
| 2513 | * aborted by a task management function, we don't care |
| 2514 | * what the status is. |
| 2515 | */ |
| 2516 | switch (request_status) { |
| 2517 | |
| 2518 | case aborted: |
| 2519 | /* "aborted" indicates that the request was aborted by a task |
| 2520 | * management function, since once a task management request is |
| 2521 | * perfomed by the device, the request only completes because |
| 2522 | * of the subsequent driver terminate. |
| 2523 | * |
| 2524 | * Aborted also means an external thread is explicitly managing |
| 2525 | * this request, so that we do not complete it up the stack. |
| 2526 | * |
| 2527 | * The target is still there (since the TMF was successful). |
| 2528 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2529 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2530 | response = SAS_TASK_COMPLETE; |
| 2531 | |
| 2532 | /* See if the device has been/is being stopped. Note |
| 2533 | * that we ignore the quiesce state, since we are |
| 2534 | * concerned about the actual device state. |
| 2535 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2536 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2537 | status = SAS_DEVICE_UNKNOWN; |
| 2538 | else |
| 2539 | status = SAS_ABORTED_TASK; |
| 2540 | |
| 2541 | complete_to_host = isci_perform_aborted_io_completion; |
| 2542 | /* This was an aborted request. */ |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2543 | |
| 2544 | spin_unlock(&request->state_lock); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2545 | break; |
| 2546 | |
| 2547 | case aborting: |
| 2548 | /* aborting means that the task management function tried and |
| 2549 | * failed to abort the request. We need to note the request |
| 2550 | * as SAS_TASK_UNDELIVERED, so that the scsi mid layer marks the |
| 2551 | * target as down. |
| 2552 | * |
| 2553 | * Aborting also means an external thread is explicitly managing |
| 2554 | * this request, so that we do not complete it up the stack. |
| 2555 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2556 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2557 | response = SAS_TASK_UNDELIVERED; |
| 2558 | |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2559 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2560 | /* The device has been /is being stopped. Note that |
| 2561 | * we ignore the quiesce state, since we are |
| 2562 | * concerned about the actual device state. |
| 2563 | */ |
| 2564 | status = SAS_DEVICE_UNKNOWN; |
| 2565 | else |
| 2566 | status = SAS_PHY_DOWN; |
| 2567 | |
| 2568 | complete_to_host = isci_perform_aborted_io_completion; |
| 2569 | |
| 2570 | /* This was an aborted request. */ |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2571 | |
| 2572 | spin_unlock(&request->state_lock); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2573 | break; |
| 2574 | |
| 2575 | case terminating: |
| 2576 | |
| 2577 | /* This was an terminated request. This happens when |
| 2578 | * the I/O is being terminated because of an action on |
| 2579 | * the device (reset, tear down, etc.), and the I/O needs |
| 2580 | * to be completed up the stack. |
| 2581 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2582 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2583 | response = SAS_TASK_UNDELIVERED; |
| 2584 | |
| 2585 | /* See if the device has been/is being stopped. Note |
| 2586 | * that we ignore the quiesce state, since we are |
| 2587 | * concerned about the actual device state. |
| 2588 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2589 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2590 | status = SAS_DEVICE_UNKNOWN; |
| 2591 | else |
| 2592 | status = SAS_ABORTED_TASK; |
| 2593 | |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2594 | complete_to_host = isci_perform_aborted_io_completion; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2595 | |
| 2596 | /* This was a terminated request. */ |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2597 | |
| 2598 | spin_unlock(&request->state_lock); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2599 | break; |
| 2600 | |
Jeff Skirvin | 77c852f | 2011-06-20 14:09:16 -0700 | [diff] [blame] | 2601 | case dead: |
| 2602 | /* This was a terminated request that timed-out during the |
| 2603 | * termination process. There is no task to complete to |
| 2604 | * libsas. |
| 2605 | */ |
| 2606 | complete_to_host = isci_perform_normal_io_completion; |
| 2607 | spin_unlock(&request->state_lock); |
| 2608 | break; |
| 2609 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2610 | default: |
| 2611 | |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2612 | /* The request is done from an SCU HW perspective. */ |
| 2613 | request->status = completed; |
| 2614 | |
| 2615 | spin_unlock(&request->state_lock); |
| 2616 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2617 | /* This is an active request being completed from the core. */ |
| 2618 | switch (completion_status) { |
| 2619 | |
| 2620 | case SCI_IO_FAILURE_RESPONSE_VALID: |
| 2621 | dev_dbg(&isci_host->pdev->dev, |
| 2622 | "%s: SCI_IO_FAILURE_RESPONSE_VALID (%p/%p)\n", |
| 2623 | __func__, |
| 2624 | request, |
| 2625 | task); |
| 2626 | |
| 2627 | if (sas_protocol_ata(task->task_proto)) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2628 | resp_buf = &request->stp.rsp; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2629 | isci_request_process_stp_response(task, |
Dan Williams | b764581 | 2011-05-08 02:35:32 -0700 | [diff] [blame] | 2630 | resp_buf); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2631 | } else if (SAS_PROTOCOL_SSP == task->task_proto) { |
| 2632 | |
| 2633 | /* crack the iu response buffer. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2634 | resp_iu = &request->ssp.rsp; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2635 | isci_request_process_response_iu(task, resp_iu, |
Dan Williams | b764581 | 2011-05-08 02:35:32 -0700 | [diff] [blame] | 2636 | &isci_host->pdev->dev); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2637 | |
| 2638 | } else if (SAS_PROTOCOL_SMP == task->task_proto) { |
| 2639 | |
| 2640 | dev_err(&isci_host->pdev->dev, |
| 2641 | "%s: SCI_IO_FAILURE_RESPONSE_VALID: " |
| 2642 | "SAS_PROTOCOL_SMP protocol\n", |
| 2643 | __func__); |
| 2644 | |
| 2645 | } else |
| 2646 | dev_err(&isci_host->pdev->dev, |
| 2647 | "%s: unknown protocol\n", __func__); |
| 2648 | |
| 2649 | /* use the task status set in the task struct by the |
| 2650 | * isci_request_process_response_iu call. |
| 2651 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2652 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2653 | response = task->task_status.resp; |
| 2654 | status = task->task_status.stat; |
| 2655 | break; |
| 2656 | |
| 2657 | case SCI_IO_SUCCESS: |
| 2658 | case SCI_IO_SUCCESS_IO_DONE_EARLY: |
| 2659 | |
| 2660 | response = SAS_TASK_COMPLETE; |
| 2661 | status = SAM_STAT_GOOD; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2662 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2663 | |
| 2664 | if (task->task_proto == SAS_PROTOCOL_SMP) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2665 | void *rsp = &request->smp.rsp; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2666 | |
| 2667 | dev_dbg(&isci_host->pdev->dev, |
| 2668 | "%s: SMP protocol completion\n", |
| 2669 | __func__); |
| 2670 | |
| 2671 | sg_copy_from_buffer( |
| 2672 | &task->smp_task.smp_resp, 1, |
Dan Williams | b764581 | 2011-05-08 02:35:32 -0700 | [diff] [blame] | 2673 | rsp, sizeof(struct smp_resp)); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2674 | } else if (completion_status |
| 2675 | == SCI_IO_SUCCESS_IO_DONE_EARLY) { |
| 2676 | |
| 2677 | /* This was an SSP / STP / SATA transfer. |
| 2678 | * There is a possibility that less data than |
| 2679 | * the maximum was transferred. |
| 2680 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2681 | u32 transferred_length = sci_req_tx_bytes(request); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2682 | |
| 2683 | task->task_status.residual |
| 2684 | = task->total_xfer_len - transferred_length; |
| 2685 | |
| 2686 | /* If there were residual bytes, call this an |
| 2687 | * underrun. |
| 2688 | */ |
| 2689 | if (task->task_status.residual != 0) |
| 2690 | status = SAS_DATA_UNDERRUN; |
| 2691 | |
| 2692 | dev_dbg(&isci_host->pdev->dev, |
| 2693 | "%s: SCI_IO_SUCCESS_IO_DONE_EARLY %d\n", |
| 2694 | __func__, |
| 2695 | status); |
| 2696 | |
| 2697 | } else |
| 2698 | dev_dbg(&isci_host->pdev->dev, |
| 2699 | "%s: SCI_IO_SUCCESS\n", |
| 2700 | __func__); |
| 2701 | |
| 2702 | break; |
| 2703 | |
| 2704 | case SCI_IO_FAILURE_TERMINATED: |
| 2705 | dev_dbg(&isci_host->pdev->dev, |
| 2706 | "%s: SCI_IO_FAILURE_TERMINATED (%p/%p)\n", |
| 2707 | __func__, |
| 2708 | request, |
| 2709 | task); |
| 2710 | |
| 2711 | /* The request was terminated explicitly. No handling |
| 2712 | * is needed in the SCSI error handler path. |
| 2713 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2714 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2715 | response = SAS_TASK_UNDELIVERED; |
| 2716 | |
| 2717 | /* See if the device has been/is being stopped. Note |
| 2718 | * that we ignore the quiesce state, since we are |
| 2719 | * concerned about the actual device state. |
| 2720 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2721 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2722 | status = SAS_DEVICE_UNKNOWN; |
| 2723 | else |
| 2724 | status = SAS_ABORTED_TASK; |
| 2725 | |
| 2726 | complete_to_host = isci_perform_normal_io_completion; |
| 2727 | break; |
| 2728 | |
| 2729 | case SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR: |
| 2730 | |
| 2731 | isci_request_handle_controller_specific_errors( |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2732 | idev, request, task, &response, &status, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2733 | &complete_to_host); |
| 2734 | |
| 2735 | break; |
| 2736 | |
| 2737 | case SCI_IO_FAILURE_REMOTE_DEVICE_RESET_REQUIRED: |
| 2738 | /* This is a special case, in that the I/O completion |
| 2739 | * is telling us that the device needs a reset. |
| 2740 | * In order for the device reset condition to be |
| 2741 | * noticed, the I/O has to be handled in the error |
| 2742 | * handler. Set the reset flag and cause the |
| 2743 | * SCSI error thread to be scheduled. |
| 2744 | */ |
| 2745 | spin_lock_irqsave(&task->task_state_lock, task_flags); |
| 2746 | task->task_state_flags |= SAS_TASK_NEED_DEV_RESET; |
| 2747 | spin_unlock_irqrestore(&task->task_state_lock, task_flags); |
| 2748 | |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2749 | /* Fail the I/O. */ |
| 2750 | response = SAS_TASK_UNDELIVERED; |
| 2751 | status = SAM_STAT_TASK_ABORTED; |
| 2752 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2753 | complete_to_host = isci_perform_error_io_completion; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2754 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2755 | break; |
| 2756 | |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2757 | case SCI_FAILURE_RETRY_REQUIRED: |
| 2758 | |
| 2759 | /* Fail the I/O so it can be retried. */ |
| 2760 | response = SAS_TASK_UNDELIVERED; |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2761 | if (!idev) |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2762 | status = SAS_DEVICE_UNKNOWN; |
| 2763 | else |
| 2764 | status = SAS_ABORTED_TASK; |
| 2765 | |
| 2766 | complete_to_host = isci_perform_normal_io_completion; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2767 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2768 | break; |
| 2769 | |
| 2770 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2771 | default: |
| 2772 | /* Catch any otherwise unhandled error codes here. */ |
| 2773 | dev_warn(&isci_host->pdev->dev, |
| 2774 | "%s: invalid completion code: 0x%x - " |
| 2775 | "isci_request = %p\n", |
| 2776 | __func__, completion_status, request); |
| 2777 | |
| 2778 | response = SAS_TASK_UNDELIVERED; |
| 2779 | |
| 2780 | /* See if the device has been/is being stopped. Note |
| 2781 | * that we ignore the quiesce state, since we are |
| 2782 | * concerned about the actual device state. |
| 2783 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2784 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2785 | status = SAS_DEVICE_UNKNOWN; |
| 2786 | else |
| 2787 | status = SAS_ABORTED_TASK; |
| 2788 | |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2789 | if (SAS_PROTOCOL_SMP == task->task_proto) { |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2790 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2791 | complete_to_host = isci_perform_normal_io_completion; |
| 2792 | } else { |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2793 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2794 | complete_to_host = isci_perform_error_io_completion; |
| 2795 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2796 | break; |
| 2797 | } |
| 2798 | break; |
| 2799 | } |
| 2800 | |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2801 | switch (task->task_proto) { |
| 2802 | case SAS_PROTOCOL_SSP: |
| 2803 | if (task->data_dir == DMA_NONE) |
| 2804 | break; |
| 2805 | if (task->num_scatter == 0) |
| 2806 | /* 0 indicates a single dma address */ |
| 2807 | dma_unmap_single(&isci_host->pdev->dev, |
| 2808 | request->zero_scatter_daddr, |
| 2809 | task->total_xfer_len, task->data_dir); |
| 2810 | else /* unmap the sgl dma addresses */ |
| 2811 | dma_unmap_sg(&isci_host->pdev->dev, task->scatter, |
| 2812 | request->num_sg_entries, task->data_dir); |
| 2813 | break; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 2814 | case SAS_PROTOCOL_SMP: { |
| 2815 | struct scatterlist *sg = &task->smp_task.smp_req; |
| 2816 | struct smp_req *smp_req; |
| 2817 | void *kaddr; |
| 2818 | |
| 2819 | dma_unmap_sg(&isci_host->pdev->dev, sg, 1, DMA_TO_DEVICE); |
| 2820 | |
| 2821 | /* need to swab it back in case the command buffer is re-used */ |
| 2822 | kaddr = kmap_atomic(sg_page(sg), KM_IRQ0); |
| 2823 | smp_req = kaddr + sg->offset; |
| 2824 | sci_swab32_cpy(smp_req, smp_req, sg->length / sizeof(u32)); |
| 2825 | kunmap_atomic(kaddr, KM_IRQ0); |
| 2826 | break; |
| 2827 | } |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2828 | default: |
| 2829 | break; |
| 2830 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2831 | |
| 2832 | /* Put the completed request on the correct list */ |
| 2833 | isci_task_save_for_upper_layer_completion(isci_host, request, response, |
| 2834 | status, complete_to_host |
| 2835 | ); |
| 2836 | |
| 2837 | /* complete the io request to the core. */ |
Artur Wojcik | cc3dbd0 | 2011-05-04 07:58:16 +0000 | [diff] [blame] | 2838 | scic_controller_complete_io(&isci_host->sci, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2839 | request->target_device, |
| 2840 | request); |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2841 | isci_put_device(idev); |
| 2842 | |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 2843 | /* set terminated handle so it cannot be completed or |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2844 | * terminated again, and to cause any calls into abort |
| 2845 | * task to recognize the already completed case. |
| 2846 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2847 | set_bit(IREQ_TERMINATED, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2848 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2849 | |
Dan Williams | 9269e0e | 2011-05-12 07:42:17 -0700 | [diff] [blame] | 2850 | static void scic_sds_request_started_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2851 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2852 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
| 2853 | struct domain_device *dev = sci_dev_to_domain(ireq->target_device); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2854 | struct sas_task *task; |
| 2855 | |
| 2856 | /* XXX as hch said always creating an internal sas_task for tmf |
| 2857 | * requests would simplify the driver |
| 2858 | */ |
| 2859 | task = ireq->ttype == io_task ? isci_request_access_task(ireq) : NULL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2860 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2861 | /* all unaccelerated request types (non ssp or ncq) handled with |
| 2862 | * substates |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 2863 | */ |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2864 | if (!task && dev->dev_type == SAS_END_DEV) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2865 | sci_change_state(sm, SCI_REQ_TASK_WAIT_TC_COMP); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2866 | } else if (!task && |
| 2867 | (isci_request_access_tmf(ireq)->tmf_code == isci_tmf_sata_srst_high || |
| 2868 | isci_request_access_tmf(ireq)->tmf_code == isci_tmf_sata_srst_low)) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2869 | sci_change_state(sm, SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2870 | } else if (task && task->task_proto == SAS_PROTOCOL_SMP) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2871 | sci_change_state(sm, SCI_REQ_SMP_WAIT_RESP); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2872 | } else if (task && sas_protocol_ata(task->task_proto) && |
| 2873 | !task->ata_task.use_ncq) { |
| 2874 | u32 state; |
| 2875 | |
| 2876 | if (task->data_dir == DMA_NONE) |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2877 | state = SCI_REQ_STP_NON_DATA_WAIT_H2D; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2878 | else if (task->ata_task.dma_xfer) |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2879 | state = SCI_REQ_STP_UDMA_WAIT_TC_COMP; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2880 | else /* PIO */ |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2881 | state = SCI_REQ_STP_PIO_WAIT_H2D; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2882 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2883 | sci_change_state(sm, state); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2884 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2885 | } |
| 2886 | |
Dan Williams | 9269e0e | 2011-05-12 07:42:17 -0700 | [diff] [blame] | 2887 | static void scic_sds_request_completed_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2888 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2889 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
| 2890 | struct scic_sds_controller *scic = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2891 | struct isci_host *ihost = scic_to_ihost(scic); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2892 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2893 | /* Tell the SCI_USER that the IO request is complete */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2894 | if (!test_bit(IREQ_TMF, &ireq->flags)) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2895 | isci_request_io_request_complete(ihost, ireq, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2896 | ireq->sci_status); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2897 | else |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2898 | isci_task_request_complete(ihost, ireq, ireq->sci_status); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2899 | } |
| 2900 | |
Dan Williams | 9269e0e | 2011-05-12 07:42:17 -0700 | [diff] [blame] | 2901 | static void scic_sds_request_aborting_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2902 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2903 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2904 | |
| 2905 | /* Setting the abort bit in the Task Context is required by the silicon. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2906 | ireq->tc->abort = 1; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2907 | } |
| 2908 | |
Dan Williams | 9269e0e | 2011-05-12 07:42:17 -0700 | [diff] [blame] | 2909 | static void scic_sds_stp_request_started_non_data_await_h2d_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2910 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2911 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2912 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2913 | scic_sds_remote_device_set_working_request(ireq->target_device, |
| 2914 | ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2915 | } |
| 2916 | |
Dan Williams | 9269e0e | 2011-05-12 07:42:17 -0700 | [diff] [blame] | 2917 | static void scic_sds_stp_request_started_pio_await_h2d_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2918 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2919 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2920 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2921 | scic_sds_remote_device_set_working_request(ireq->target_device, |
| 2922 | ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2923 | } |
| 2924 | |
Dan Williams | 9269e0e | 2011-05-12 07:42:17 -0700 | [diff] [blame] | 2925 | static void scic_sds_stp_request_started_soft_reset_await_h2d_asserted_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2926 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2927 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2928 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2929 | scic_sds_remote_device_set_working_request(ireq->target_device, |
| 2930 | ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2931 | } |
| 2932 | |
Dan Williams | 9269e0e | 2011-05-12 07:42:17 -0700 | [diff] [blame] | 2933 | static void scic_sds_stp_request_started_soft_reset_await_h2d_diagnostic_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2934 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2935 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
| 2936 | struct scu_task_context *tc = ireq->tc; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2937 | struct host_to_dev_fis *h2d_fis; |
| 2938 | enum sci_status status; |
| 2939 | |
| 2940 | /* Clear the SRST bit */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2941 | h2d_fis = &ireq->stp.cmd; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2942 | h2d_fis->control = 0; |
| 2943 | |
| 2944 | /* Clear the TC control bit */ |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 2945 | tc->control_frame = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2946 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2947 | status = scic_controller_continue_io(ireq); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 2948 | WARN_ONCE(status != SCI_SUCCESS, "isci: continue io failure\n"); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2949 | } |
| 2950 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2951 | static const struct sci_base_state scic_sds_request_state_table[] = { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2952 | [SCI_REQ_INIT] = { }, |
| 2953 | [SCI_REQ_CONSTRUCTED] = { }, |
| 2954 | [SCI_REQ_STARTED] = { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2955 | .enter_state = scic_sds_request_started_state_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2956 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2957 | [SCI_REQ_STP_NON_DATA_WAIT_H2D] = { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2958 | .enter_state = scic_sds_stp_request_started_non_data_await_h2d_completion_enter, |
| 2959 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2960 | [SCI_REQ_STP_NON_DATA_WAIT_D2H] = { }, |
| 2961 | [SCI_REQ_STP_PIO_WAIT_H2D] = { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2962 | .enter_state = scic_sds_stp_request_started_pio_await_h2d_completion_enter, |
| 2963 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2964 | [SCI_REQ_STP_PIO_WAIT_FRAME] = { }, |
| 2965 | [SCI_REQ_STP_PIO_DATA_IN] = { }, |
| 2966 | [SCI_REQ_STP_PIO_DATA_OUT] = { }, |
| 2967 | [SCI_REQ_STP_UDMA_WAIT_TC_COMP] = { }, |
| 2968 | [SCI_REQ_STP_UDMA_WAIT_D2H] = { }, |
| 2969 | [SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED] = { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2970 | .enter_state = scic_sds_stp_request_started_soft_reset_await_h2d_asserted_completion_enter, |
| 2971 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2972 | [SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG] = { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2973 | .enter_state = scic_sds_stp_request_started_soft_reset_await_h2d_diagnostic_completion_enter, |
| 2974 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2975 | [SCI_REQ_STP_SOFT_RESET_WAIT_D2H] = { }, |
| 2976 | [SCI_REQ_TASK_WAIT_TC_COMP] = { }, |
| 2977 | [SCI_REQ_TASK_WAIT_TC_RESP] = { }, |
| 2978 | [SCI_REQ_SMP_WAIT_RESP] = { }, |
| 2979 | [SCI_REQ_SMP_WAIT_TC_COMP] = { }, |
| 2980 | [SCI_REQ_COMPLETED] = { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2981 | .enter_state = scic_sds_request_completed_state_enter, |
| 2982 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2983 | [SCI_REQ_ABORTING] = { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2984 | .enter_state = scic_sds_request_aborting_state_enter, |
| 2985 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2986 | [SCI_REQ_FINAL] = { }, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2987 | }; |
| 2988 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2989 | static void |
| 2990 | scic_sds_general_request_construct(struct scic_sds_controller *scic, |
| 2991 | struct scic_sds_remote_device *sci_dev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2992 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2993 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2994 | sci_init_sm(&ireq->sm, scic_sds_request_state_table, SCI_REQ_INIT); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2995 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2996 | ireq->target_device = sci_dev; |
| 2997 | ireq->protocol = SCIC_NO_PROTOCOL; |
| 2998 | ireq->saved_rx_frame_index = SCU_INVALID_FRAME_INDEX; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2999 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3000 | ireq->sci_status = SCI_SUCCESS; |
| 3001 | ireq->scu_status = 0; |
| 3002 | ireq->post_context = 0xFFFFFFFF; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3003 | } |
| 3004 | |
| 3005 | static enum sci_status |
| 3006 | scic_io_request_construct(struct scic_sds_controller *scic, |
| 3007 | struct scic_sds_remote_device *sci_dev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3008 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3009 | { |
| 3010 | struct domain_device *dev = sci_dev_to_domain(sci_dev); |
| 3011 | enum sci_status status = SCI_SUCCESS; |
| 3012 | |
| 3013 | /* Build the common part of the request */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3014 | scic_sds_general_request_construct(scic, sci_dev, ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3015 | |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3016 | if (sci_dev->rnc.remote_node_index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3017 | return SCI_FAILURE_INVALID_REMOTE_DEVICE; |
| 3018 | |
| 3019 | if (dev->dev_type == SAS_END_DEV) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3020 | /* pass */; |
| 3021 | else if (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3022 | memset(&ireq->stp.cmd, 0, sizeof(ireq->stp.cmd)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3023 | else if (dev_is_expander(dev)) |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3024 | /* pass */; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3025 | else |
| 3026 | return SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3027 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3028 | memset(ireq->tc, 0, offsetof(struct scu_task_context, sgl_pair_ab)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3029 | |
| 3030 | return status; |
| 3031 | } |
| 3032 | |
| 3033 | enum sci_status scic_task_request_construct(struct scic_sds_controller *scic, |
| 3034 | struct scic_sds_remote_device *sci_dev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3035 | u16 io_tag, struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3036 | { |
| 3037 | struct domain_device *dev = sci_dev_to_domain(sci_dev); |
| 3038 | enum sci_status status = SCI_SUCCESS; |
| 3039 | |
| 3040 | /* Build the common part of the request */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3041 | scic_sds_general_request_construct(scic, sci_dev, ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3042 | |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3043 | if (dev->dev_type == SAS_END_DEV || |
| 3044 | dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3045 | set_bit(IREQ_TMF, &ireq->flags); |
| 3046 | memset(ireq->tc, 0, sizeof(struct scu_task_context)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3047 | } else |
| 3048 | status = SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3049 | |
| 3050 | return status; |
| 3051 | } |
| 3052 | |
| 3053 | static enum sci_status isci_request_ssp_request_construct( |
| 3054 | struct isci_request *request) |
| 3055 | { |
| 3056 | enum sci_status status; |
| 3057 | |
| 3058 | dev_dbg(&request->isci_host->pdev->dev, |
| 3059 | "%s: request = %p\n", |
| 3060 | __func__, |
| 3061 | request); |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3062 | status = scic_io_request_construct_basic_ssp(request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3063 | return status; |
| 3064 | } |
| 3065 | |
| 3066 | static enum sci_status isci_request_stp_request_construct( |
| 3067 | struct isci_request *request) |
| 3068 | { |
| 3069 | struct sas_task *task = isci_request_access_task(request); |
| 3070 | enum sci_status status; |
| 3071 | struct host_to_dev_fis *register_fis; |
| 3072 | |
| 3073 | dev_dbg(&request->isci_host->pdev->dev, |
| 3074 | "%s: request = %p\n", |
| 3075 | __func__, |
| 3076 | request); |
| 3077 | |
| 3078 | /* Get the host_to_dev_fis from the core and copy |
| 3079 | * the fis from the task into it. |
| 3080 | */ |
| 3081 | register_fis = isci_sata_task_to_fis_copy(task); |
| 3082 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3083 | status = scic_io_request_construct_basic_sata(request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3084 | |
| 3085 | /* Set the ncq tag in the fis, from the queue |
| 3086 | * command in the task. |
| 3087 | */ |
| 3088 | if (isci_sata_is_task_ncq(task)) { |
| 3089 | |
| 3090 | isci_sata_set_ncq_tag( |
| 3091 | register_fis, |
| 3092 | task |
| 3093 | ); |
| 3094 | } |
| 3095 | |
| 3096 | return status; |
| 3097 | } |
| 3098 | |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3099 | static enum sci_status |
| 3100 | scic_io_request_construct_smp(struct device *dev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3101 | struct isci_request *ireq, |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3102 | struct sas_task *task) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3103 | { |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3104 | struct scatterlist *sg = &task->smp_task.smp_req; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3105 | struct scic_sds_remote_device *sci_dev; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3106 | struct scu_task_context *task_context; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 3107 | struct isci_port *iport; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3108 | struct smp_req *smp_req; |
| 3109 | void *kaddr; |
| 3110 | u8 req_len; |
| 3111 | u32 cmd; |
| 3112 | |
| 3113 | kaddr = kmap_atomic(sg_page(sg), KM_IRQ0); |
| 3114 | smp_req = kaddr + sg->offset; |
| 3115 | /* |
| 3116 | * Look at the SMP requests' header fields; for certain SAS 1.x SMP |
| 3117 | * functions under SAS 2.0, a zero request length really indicates |
| 3118 | * a non-zero default length. |
| 3119 | */ |
| 3120 | if (smp_req->req_len == 0) { |
| 3121 | switch (smp_req->func) { |
| 3122 | case SMP_DISCOVER: |
| 3123 | case SMP_REPORT_PHY_ERR_LOG: |
| 3124 | case SMP_REPORT_PHY_SATA: |
| 3125 | case SMP_REPORT_ROUTE_INFO: |
| 3126 | smp_req->req_len = 2; |
| 3127 | break; |
| 3128 | case SMP_CONF_ROUTE_INFO: |
| 3129 | case SMP_PHY_CONTROL: |
| 3130 | case SMP_PHY_TEST_FUNCTION: |
| 3131 | smp_req->req_len = 9; |
| 3132 | break; |
| 3133 | /* Default - zero is a valid default for 2.0. */ |
| 3134 | } |
| 3135 | } |
| 3136 | req_len = smp_req->req_len; |
| 3137 | sci_swab32_cpy(smp_req, smp_req, sg->length / sizeof(u32)); |
| 3138 | cmd = *(u32 *) smp_req; |
| 3139 | kunmap_atomic(kaddr, KM_IRQ0); |
| 3140 | |
| 3141 | if (!dma_map_sg(dev, sg, 1, DMA_TO_DEVICE)) |
| 3142 | return SCI_FAILURE; |
| 3143 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3144 | ireq->protocol = SCIC_SMP_PROTOCOL; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3145 | |
| 3146 | /* byte swap the smp request. */ |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3147 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3148 | task_context = ireq->tc; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3149 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3150 | sci_dev = scic_sds_request_get_device(ireq); |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 3151 | iport = scic_sds_request_get_port(ireq); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3152 | |
| 3153 | /* |
| 3154 | * Fill in the TC with the its required data |
| 3155 | * 00h |
| 3156 | */ |
| 3157 | task_context->priority = 0; |
| 3158 | task_context->initiator_request = 1; |
| 3159 | task_context->connection_rate = sci_dev->connection_rate; |
| 3160 | task_context->protocol_engine_index = |
| 3161 | scic_sds_controller_get_protocol_engine_group(scic); |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 3162 | task_context->logical_port_index = scic_sds_port_get_index(iport); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3163 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SMP; |
| 3164 | task_context->abort = 0; |
| 3165 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 3166 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 3167 | |
| 3168 | /* 04h */ |
| 3169 | task_context->remote_node_index = sci_dev->rnc.remote_node_index; |
| 3170 | task_context->command_code = 0; |
| 3171 | task_context->task_type = SCU_TASK_TYPE_SMP_REQUEST; |
| 3172 | |
| 3173 | /* 08h */ |
| 3174 | task_context->link_layer_control = 0; |
| 3175 | task_context->do_not_dma_ssp_good_response = 1; |
| 3176 | task_context->strict_ordering = 0; |
| 3177 | task_context->control_frame = 1; |
| 3178 | task_context->timeout_enable = 0; |
| 3179 | task_context->block_guard_enable = 0; |
| 3180 | |
| 3181 | /* 0ch */ |
| 3182 | task_context->address_modifier = 0; |
| 3183 | |
| 3184 | /* 10h */ |
Dave Jiang | 77d6738 | 2011-05-25 02:21:57 +0000 | [diff] [blame] | 3185 | task_context->ssp_command_iu_length = req_len; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3186 | |
| 3187 | /* 14h */ |
| 3188 | task_context->transfer_length_bytes = 0; |
| 3189 | |
| 3190 | /* |
| 3191 | * 18h ~ 30h, protocol specific |
| 3192 | * since commandIU has been build by framework at this point, we just |
| 3193 | * copy the frist DWord from command IU to this location. */ |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3194 | memcpy(&task_context->type.smp, &cmd, sizeof(u32)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3195 | |
| 3196 | /* |
| 3197 | * 40h |
| 3198 | * "For SMP you could program it to zero. We would prefer that way |
| 3199 | * so that done code will be consistent." - Venki |
| 3200 | */ |
| 3201 | task_context->task_phase = 0; |
| 3202 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3203 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3204 | (scic_sds_controller_get_protocol_engine_group(scic) << |
| 3205 | SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame^] | 3206 | (scic_sds_port_get_index(iport) << |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3207 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3208 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3209 | /* |
| 3210 | * Copy the physical address for the command buffer to the SCU Task |
| 3211 | * Context command buffer should not contain command header. |
| 3212 | */ |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3213 | task_context->command_iu_upper = upper_32_bits(sg_dma_address(sg)); |
| 3214 | task_context->command_iu_lower = lower_32_bits(sg_dma_address(sg) + sizeof(u32)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3215 | |
| 3216 | /* SMP response comes as UF, so no need to set response IU address. */ |
| 3217 | task_context->response_iu_upper = 0; |
| 3218 | task_context->response_iu_lower = 0; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3219 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3220 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3221 | |
| 3222 | return SCI_SUCCESS; |
| 3223 | } |
| 3224 | |
| 3225 | /* |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3226 | * isci_smp_request_build() - This function builds the smp request. |
| 3227 | * @ireq: This parameter points to the isci_request allocated in the |
| 3228 | * request construct function. |
| 3229 | * |
| 3230 | * SCI_SUCCESS on successfull completion, or specific failure code. |
| 3231 | */ |
| 3232 | static enum sci_status isci_smp_request_build(struct isci_request *ireq) |
| 3233 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3234 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3235 | struct device *dev = &ireq->isci_host->pdev->dev; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3236 | enum sci_status status = SCI_FAILURE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3237 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3238 | status = scic_io_request_construct_smp(dev, ireq, task); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3239 | if (status != SCI_SUCCESS) |
| 3240 | dev_warn(&ireq->isci_host->pdev->dev, |
| 3241 | "%s: failed with status = %d\n", |
| 3242 | __func__, |
| 3243 | status); |
| 3244 | |
| 3245 | return status; |
| 3246 | } |
| 3247 | |
| 3248 | /** |
| 3249 | * isci_io_request_build() - This function builds the io request object. |
| 3250 | * @isci_host: This parameter specifies the ISCI host object |
| 3251 | * @request: This parameter points to the isci_request object allocated in the |
| 3252 | * request construct function. |
| 3253 | * @sci_device: This parameter is the handle for the sci core's remote device |
| 3254 | * object that is the destination for this request. |
| 3255 | * |
| 3256 | * SCI_SUCCESS on successfull completion, or specific failure code. |
| 3257 | */ |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3258 | static enum sci_status isci_io_request_build(struct isci_host *isci_host, |
| 3259 | struct isci_request *request, |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3260 | struct isci_remote_device *isci_device) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3261 | { |
| 3262 | enum sci_status status = SCI_SUCCESS; |
| 3263 | struct sas_task *task = isci_request_access_task(request); |
| 3264 | struct scic_sds_remote_device *sci_device = &isci_device->sci; |
| 3265 | |
| 3266 | dev_dbg(&isci_host->pdev->dev, |
| 3267 | "%s: isci_device = 0x%p; request = %p, " |
| 3268 | "num_scatter = %d\n", |
| 3269 | __func__, |
| 3270 | isci_device, |
| 3271 | request, |
| 3272 | task->num_scatter); |
| 3273 | |
| 3274 | /* map the sgl addresses, if present. |
| 3275 | * libata does the mapping for sata devices |
| 3276 | * before we get the request. |
| 3277 | */ |
| 3278 | if (task->num_scatter && |
| 3279 | !sas_protocol_ata(task->task_proto) && |
| 3280 | !(SAS_PROTOCOL_SMP & task->task_proto)) { |
| 3281 | |
| 3282 | request->num_sg_entries = dma_map_sg( |
| 3283 | &isci_host->pdev->dev, |
| 3284 | task->scatter, |
| 3285 | task->num_scatter, |
| 3286 | task->data_dir |
| 3287 | ); |
| 3288 | |
| 3289 | if (request->num_sg_entries == 0) |
| 3290 | return SCI_FAILURE_INSUFFICIENT_RESOURCES; |
| 3291 | } |
| 3292 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3293 | status = scic_io_request_construct(&isci_host->sci, sci_device, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3294 | request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3295 | |
| 3296 | if (status != SCI_SUCCESS) { |
| 3297 | dev_warn(&isci_host->pdev->dev, |
| 3298 | "%s: failed request construct\n", |
| 3299 | __func__); |
| 3300 | return SCI_FAILURE; |
| 3301 | } |
| 3302 | |
| 3303 | switch (task->task_proto) { |
| 3304 | case SAS_PROTOCOL_SMP: |
| 3305 | status = isci_smp_request_build(request); |
| 3306 | break; |
| 3307 | case SAS_PROTOCOL_SSP: |
| 3308 | status = isci_request_ssp_request_construct(request); |
| 3309 | break; |
| 3310 | case SAS_PROTOCOL_SATA: |
| 3311 | case SAS_PROTOCOL_STP: |
| 3312 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: |
| 3313 | status = isci_request_stp_request_construct(request); |
| 3314 | break; |
| 3315 | default: |
| 3316 | dev_warn(&isci_host->pdev->dev, |
| 3317 | "%s: unknown protocol\n", __func__); |
| 3318 | return SCI_FAILURE; |
| 3319 | } |
| 3320 | |
| 3321 | return SCI_SUCCESS; |
| 3322 | } |
| 3323 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3324 | static struct isci_request *isci_request_from_tag(struct isci_host *ihost, u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3325 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3326 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3327 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3328 | ireq = ihost->reqs[ISCI_TAG_TCI(tag)]; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3329 | ireq->io_tag = tag; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3330 | ireq->io_request_completion = NULL; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 3331 | ireq->flags = 0; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3332 | ireq->num_sg_entries = 0; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3333 | INIT_LIST_HEAD(&ireq->completed_node); |
| 3334 | INIT_LIST_HEAD(&ireq->dev_node); |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3335 | isci_request_change_state(ireq, allocated); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3336 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3337 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3338 | } |
| 3339 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3340 | static struct isci_request *isci_io_request_from_tag(struct isci_host *ihost, |
| 3341 | struct sas_task *task, |
| 3342 | u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3343 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3344 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3345 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3346 | ireq = isci_request_from_tag(ihost, tag); |
| 3347 | ireq->ttype_ptr.io_task_ptr = task; |
| 3348 | ireq->ttype = io_task; |
| 3349 | task->lldd_task = ireq; |
| 3350 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3351 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3352 | } |
| 3353 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3354 | struct isci_request *isci_tmf_request_from_tag(struct isci_host *ihost, |
| 3355 | struct isci_tmf *isci_tmf, |
| 3356 | u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3357 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3358 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3359 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3360 | ireq = isci_request_from_tag(ihost, tag); |
| 3361 | ireq->ttype_ptr.tmf_task_ptr = isci_tmf; |
| 3362 | ireq->ttype = tmf_task; |
| 3363 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3364 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3365 | } |
| 3366 | |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 3367 | int isci_request_execute(struct isci_host *ihost, struct isci_remote_device *idev, |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3368 | struct sas_task *task, u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3369 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3370 | enum sci_status status = SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3371 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3372 | unsigned long flags; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3373 | int ret = 0; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3374 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3375 | /* do common allocation and init of request object. */ |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3376 | ireq = isci_io_request_from_tag(ihost, task, tag); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3377 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3378 | status = isci_io_request_build(ihost, ireq, idev); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3379 | if (status != SCI_SUCCESS) { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3380 | dev_warn(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3381 | "%s: request_construct failed - status = 0x%x\n", |
| 3382 | __func__, |
| 3383 | status); |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3384 | return status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3385 | } |
| 3386 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3387 | spin_lock_irqsave(&ihost->scic_lock, flags); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3388 | |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3389 | if (test_bit(IDEV_IO_NCQERROR, &idev->flags)) { |
| 3390 | |
| 3391 | if (isci_task_is_ncq_recovery(task)) { |
| 3392 | |
| 3393 | /* The device is in an NCQ recovery state. Issue the |
| 3394 | * request on the task side. Note that it will |
| 3395 | * complete on the I/O request side because the |
| 3396 | * request was built that way (ie. |
| 3397 | * ireq->is_task_management_request is false). |
| 3398 | */ |
| 3399 | status = scic_controller_start_task(&ihost->sci, |
| 3400 | &idev->sci, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3401 | ireq); |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3402 | } else { |
| 3403 | status = SCI_FAILURE; |
| 3404 | } |
| 3405 | } else { |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3406 | /* send the request, let the core assign the IO TAG. */ |
| 3407 | status = scic_controller_start_io(&ihost->sci, &idev->sci, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3408 | ireq); |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3409 | } |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3410 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3411 | if (status != SCI_SUCCESS && |
| 3412 | status != SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3413 | dev_warn(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3414 | "%s: failed request start (0x%x)\n", |
| 3415 | __func__, status); |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3416 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3417 | return status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3418 | } |
| 3419 | |
| 3420 | /* Either I/O started OK, or the core has signaled that |
| 3421 | * the device needs a target reset. |
| 3422 | * |
| 3423 | * In either case, hold onto the I/O for later. |
| 3424 | * |
| 3425 | * Update it's status and add it to the list in the |
| 3426 | * remote device object. |
| 3427 | */ |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3428 | list_add(&ireq->dev_node, &idev->reqs_in_process); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3429 | |
| 3430 | if (status == SCI_SUCCESS) { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3431 | isci_request_change_state(ireq, started); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3432 | } else { |
| 3433 | /* The request did not really start in the |
| 3434 | * hardware, so clear the request handle |
| 3435 | * here so no terminations will be done. |
| 3436 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 3437 | set_bit(IREQ_TERMINATED, &ireq->flags); |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3438 | isci_request_change_state(ireq, completed); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3439 | } |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3440 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3441 | |
| 3442 | if (status == |
| 3443 | SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) { |
| 3444 | /* Signal libsas that we need the SCSI error |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3445 | * handler thread to work on this I/O and that |
| 3446 | * we want a device reset. |
| 3447 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3448 | spin_lock_irqsave(&task->task_state_lock, flags); |
| 3449 | task->task_state_flags |= SAS_TASK_NEED_DEV_RESET; |
| 3450 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
| 3451 | |
| 3452 | /* Cause this task to be scheduled in the SCSI error |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3453 | * handler thread. |
| 3454 | */ |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3455 | isci_execpath_callback(ihost, task, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3456 | sas_task_abort); |
| 3457 | |
| 3458 | /* Change the status, since we are holding |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3459 | * the I/O until it is managed by the SCSI |
| 3460 | * error handler. |
| 3461 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3462 | status = SCI_SUCCESS; |
| 3463 | } |
| 3464 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3465 | return ret; |
| 3466 | } |