)]}' { "log": [ { "commit": "f1ae98da8525c6b8b1c301c3a2b0bd2b6515cca2", "tree": "f73e377f98bbb452612a1f53b3d399cff6cac1fa", "parents": [ "f8f5701bdaf9134b1f90e5044a82c66324d2073f" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed May 30 10:48:29 2012 +0200" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon Jun 04 08:01:24 2012 +0200" }, "message": "ARM: dma-mapping: remove unconditional dependency on CMA\n\nCMA has been enabled unconditionally on all ARMv6+ systems to solve the\nlong standing issue of double kernel mappings for all dma coherent\nbuffers. This however created a dependency on CONFIG_EXPERIMENTAL for\nthe whole ARM architecture what should be really avoided. This patch\nremoves this dependency and lets one use old, well-tested dma-mapping\nimplementation also on ARMv6+ systems without the need to use\nEXPERIMENTAL stuff.\n\nReported-by: Russell King \u003clinux@arm.linux.org.uk\u003e\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\n" }, { "commit": "d484864dd96e1830e7689510597707c1df8cd681", "tree": "51551708ba3f26d05575fa91daaf0c0d970a77c3", "parents": [ "be87cfb47c5c740f7b17929bcd7c480b228513e0", "0f51596bd39a5c928307ffcffc9ba07f90f42a8b" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 25 09:18:59 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 25 09:18:59 2012 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.linaro.org/people/mszyprowski/linux-dma-mapping\n\nPull CMA and ARM DMA-mapping updates from Marek Szyprowski:\n \"These patches contain two major updates for DMA mapping subsystem\n (mainly for ARM architecture). First one is Contiguous Memory\n Allocator (CMA) which makes it possible for device drivers to allocate\n big contiguous chunks of memory after the system has booted.\n\n The main difference from the similar frameworks is the fact that CMA\n allows to transparently reuse the memory region reserved for the big\n chunk allocation as a system memory, so no memory is wasted when no\n big chunk is allocated. Once the alloc request is issued, the\n framework migrates system pages to create space for the required big\n chunk of physically contiguous memory.\n\n For more information one can refer to nice LWN articles:\n\n - \u0027A reworked contiguous memory allocator\u0027:\n\t\thttp://lwn.net/Articles/447405/\n\n - \u0027CMA and ARM\u0027:\n\t\thttp://lwn.net/Articles/450286/\n\n - \u0027A deep dive into CMA\u0027:\n\t\thttp://lwn.net/Articles/486301/\n\n - and the following thread with the patches and links to all previous\n versions:\n\t\thttps://lkml.org/lkml/2012/4/3/204\n\n The main client for this new framework is ARM DMA-mapping subsystem.\n\n The second part provides a complete redesign in ARM DMA-mapping\n subsystem. The core implementation has been changed to use common\n struct dma_map_ops based infrastructure with the recent updates for\n new dma attributes merged in v3.4-rc2. This allows to use more than\n one implementation of dma-mapping calls and change/select them on the\n struct device basis. The first client of this new infractructure is\n dmabounce implementation which has been completely cut out of the\n core, common code.\n\n The last patch of this redesign update introduces a new, experimental\n implementation of dma-mapping calls on top of generic IOMMU framework.\n This lets ARM sub-platform to transparently use IOMMU for DMA-mapping\n calls if one provides required IOMMU hardware.\n\n For more information please refer to the following thread:\n\t\thttp://www.spinics.net/lists/arm-kernel/msg175729.html\n\n The last patch merges changes from both updates and provides a\n resolution for the conflicts which cannot be avoided when patches have\n been applied on the same files (mainly arch/arm/mm/dma-mapping.c).\"\n\nAcked by Andrew Morton \u003cakpm@linux-foundation.org\u003e:\n \"Yup, this one please. It\u0027s had much work, plenty of review and I\n think even Russell is happy with it.\"\n\n* \u0027for-linus\u0027 of git://git.linaro.org/people/mszyprowski/linux-dma-mapping: (28 commits)\n ARM: dma-mapping: use PMD size for section unmap\n cma: fix migration mode\n ARM: integrate CMA with DMA-mapping subsystem\n X86: integrate CMA with DMA-mapping subsystem\n drivers: add Contiguous Memory Allocator\n mm: trigger page reclaim in alloc_contig_range() to stabilise watermarks\n mm: extract reclaim code from __alloc_pages_direct_reclaim()\n mm: Serialize access to min_free_kbytes\n mm: page_isolation: MIGRATE_CMA isolation functions added\n mm: mmzone: MIGRATE_CMA migration type added\n mm: page_alloc: change fallbacks array handling\n mm: page_alloc: introduce alloc_contig_range()\n mm: compaction: export some of the functions\n mm: compaction: introduce isolate_freepages_range()\n mm: compaction: introduce map_pages()\n mm: compaction: introduce isolate_migratepages_range()\n mm: page_alloc: remove trailing whitespace\n ARM: dma-mapping: add support for IOMMU mapper\n ARM: dma-mapping: use alloc, mmap, free from dma_ops\n ARM: dma-mapping: remove redundant code and do the cleanup\n ...\n\nConflicts:\n\tarch/x86/include/asm/dma-mapping.h\n" }, { "commit": "cdd3a354a05b0c33fe33ab11a0fb0838396cad19", "tree": "ea2c87bbc2dc5865a97e73e201661d69937b45d5", "parents": [ "813a95e5b4fa936bbde10ef89188932745dcd7f4", "ada2e35defe6c6f0a986ec8147e47726fbd0e7b1" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 22 09:41:01 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 22 09:41:01 2012 -0700" }, "message": "Merge tag \u0027pm\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc\n\nPull arm-soc power management changes from Olof Johansson:\n \"Power management changes here are mostly for the omap platform, but\n also include cpuidle changes for ux500 and suspend/resume code for\n mmp.\"\n\n* tag \u0027pm\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)\n ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset\n ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database\n ARM: OMAP4: hwmod_data: Name the common irq for McBSP ports\n ARM: OMAP4: hwmod data: I2C: add flag for context restore\n ARM: OMAP3: hwmod_data: Rename the common irq for McBSP ports\n ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod\n ARM: OMAP3: hwmod data: add HDQ/1-wire hwmod\n ARM: OMAP2+: hwmod data: add HDQ/1-wire hwmod shared data\n ARM: OMAP2+: HDQ1W: add custom reset function\n ARM: OMAP2420: hwmod data: Add MMC hwmod data for 2420\n arm: omap3: clockdomain data: Remove superfluous commas from gfx_sgx_3xxx_wkdeps[]\n ARM: OMAP2+: powerdomain: Get rid off duplicate pwrdm_clkdm_state_switch() API\n ARM: OMAP3: clock data: add clockdomain for HDQ functional clock\n ARM: OMAP3+: dpll: Configure autoidle mode only if it\u0027s supported\n ARM: OMAP2+: dmtimer: cleanup iclk usage\n ARM: OMAP4+: Add prm and cm base init function.\n ARM: OMAP2/3: Add idle_st bits for ST_32KSYNC timer to prcm-common header\n ARM: OMAP3: Fix CM register bit masks\n ARM: OMAP: clock: convert AM3517/3505 detection/flags to AM35xx\n ARM: OMAP3: clock data: treat all AM35x devices the same\n ...\n" }, { "commit": "0f51596bd39a5c928307ffcffc9ba07f90f42a8b", "tree": "b636403815316ecad2170092b70f1079df260a95", "parents": [ "61f6c7a47a2f84b7ba4b65240ffe9247df772b06", "4ce63fcd919c32d22528e54dcd89506962933719" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Tue May 22 08:55:43 2012 +0200" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Tue May 22 08:55:43 2012 +0200" }, "message": "Merge branch \u0027for-next-arm-dma\u0027 into for-linus\n\nConflicts:\n\tarch/arm/Kconfig\n\tarch/arm/mm/dma-mapping.c\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\n" }, { "commit": "4ab1056766a4e49f6b9ef324313dd1583f8f8f4e", "tree": "89f975e7e021dd27dc807e45445e963aeb39fcda", "parents": [ "4175160b065e74572819a320dcd34129224a4e1c", "4cdfc2ec72e940abb4322aa1bc14f43a1486fc5d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon May 21 15:15:33 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon May 21 15:15:33 2012 +0100" }, "message": "Merge branch \u0027v3-removal\u0027 into for-linus\n\nConflicts:\n\tarch/arm/boot/compressed/head.S\n" }, { "commit": "4175160b065e74572819a320dcd34129224a4e1c", "tree": "3298e2c9a7c7db33bf28617875e5429e17eec61c", "parents": [ "ddf90a2ff2c4a9da99acc898a4afeab3e4251fcd", "0ec8e7aa8f63f0cacd545fcd7f40f93fde2c0e6e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon May 21 15:15:24 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon May 21 15:15:24 2012 +0100" }, "message": "Merge branch \u0027misc\u0027 into for-linus\n\nConflicts:\n\tarch/arm/kernel/ptrace.c\n" }, { "commit": "ddf90a2ff2c4a9da99acc898a4afeab3e4251fcd", "tree": "97eb0b6e2d4fad9d5a3e58a4762997c6170ae05d", "parents": [ "dfb85185bda373a70409c70c2632b02fb0f8f449", "5693188a6e888603afa9564974145e5e6e2c623c", "56cb248428ead13a6b423ed3f3cf9e4aa01244b1", "d098bc7d58ebda22a6554b6c9df1056802d9900f", "34fd421349ffc6a4280b71276bf7c6d48f92156f", "90cf2418f5c45192bac1ac57af62f61dbac92886", "d12379acaf55a395083ca81d753b1af75507556c" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon May 21 15:15:10 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon May 21 15:15:10 2012 +0100" }, "message": "Merge branches \u0027amba\u0027, \u0027devel-stable\u0027, \u0027fixes\u0027, \u0027mach-types\u0027, \u0027mmci\u0027, \u0027pci\u0027 and \u0027versatile\u0027 into for-linus\n" }, { "commit": "61f6c7a47a2f84b7ba4b65240ffe9247df772b06", "tree": "aaeadf6490c61a541f83c86374e87a69384b2ca5", "parents": [ "58f42fd54144346898e6dc6d6ae3acd4c591b42f" ], "author": { "name": "Vitaly Andrianov", "email": "vitalya@ti.com", "time": "Mon May 14 13:49:56 2012 -0400" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:09:40 2012 +0200" }, "message": "ARM: dma-mapping: use PMD size for section unmap\n\nThe dma_contiguous_remap() function clears existing section maps using\nthe wrong size (PGDIR_SIZE instead of PMD_SIZE). This is a bug which\ndoes not affect non-LPAE systems, where PGDIR_SIZE and PMD_SIZE are the same.\nOn LPAE systems, however, this bug causes the kernel to hang at this point.\n\nThis fix has been tested on both LPAE and non-LPAE kernel builds.\n\nSigned-off-by: Vitaly Andrianov \u003cvitalya@ti.com\u003e\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\n" }, { "commit": "c79095092834a18ae74cfc08def1a5a101dc106c", "tree": "c6cd81c38b92dcdb269288ab9a125bc13f4bb339", "parents": [ "0a2b9a6ea93650b8a00f9fd5ee8fdd25671e2df6" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Thu Dec 29 13:09:51 2011 +0100" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:09:38 2012 +0200" }, "message": "ARM: integrate CMA with DMA-mapping subsystem\n\nThis patch adds support for CMA to dma-mapping subsystem for ARM\narchitecture. By default a global CMA area is used, but specific devices\nare allowed to have their private memory areas if required (they can be\ncreated with dma_declare_contiguous() function during board\ninitialisation).\n\nContiguous memory areas reserved for DMA are remapped with 2-level page\ntables on boot. Once a buffer is requested, a low memory kernel mapping\nis updated to to match requested memory access type.\n\nGFP_ATOMIC allocations are performed from special pool which is created\nearly during boot. This way remapping page attributes is not needed on\nallocation time.\n\nCMA has been enabled unconditionally for ARMv6+ systems.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nCC: Michal Nazarewicz \u003cmina86@mina86.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nTested-by: Rob Clark \u003crob.clark@linaro.org\u003e\nTested-by: Ohad Ben-Cohen \u003cohad@wizery.com\u003e\nTested-by: Benjamin Gaignard \u003cbenjamin.gaignard@linaro.org\u003e\nTested-by: Robert Nelson \u003crobertcnelson@gmail.com\u003e\nTested-by: Barry Song \u003cBaohua.Song@csr.com\u003e\n" }, { "commit": "4ce63fcd919c32d22528e54dcd89506962933719", "tree": "648f7681a5c89209b627e8c3e899d953ed38685d", "parents": [ "f99d60341238fe73fc514129cd9ae4e44e1b2c47" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed May 16 15:48:21 2012 +0200" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:23 2012 +0200" }, "message": "ARM: dma-mapping: add support for IOMMU mapper\n\nThis patch add a complete implementation of DMA-mapping API for\ndevices which have IOMMU support.\n\nThis implementation tries to optimize dma address space usage by remapping\nall possible physical memory chunks into a single dma address space chunk.\n\nDMA address space is managed on top of the bitmap stored in the\ndma_iommu_mapping structure stored in device-\u003earchdata. Platform setup\ncode has to initialize parameters of the dma address space (base address,\nsize, allocation precision order) with arm_iommu_create_mapping() function.\nTo reduce the size of the bitmap, all allocations are aligned to the\nspecified order of base 4 KiB pages.\n\ndma_alloc_* functions allocate physical memory in chunks, each with\nalloc_pages() function to avoid failing if the physical memory gets\nfragmented. In worst case the allocated buffer is composed of 4 KiB page\nchunks.\n\ndma_map_sg() function minimizes the total number of dma address space\nchunks by merging of physical memory chunks into one larger dma address\nspace chunk. If requested chunk (scatter list entry) boundaries\nmatch physical page boundaries, most calls to dma_map_sg() requests will\nresult in creating only one chunk in dma address space.\n\ndma_map_page() simply creates a mapping for the given page(s) in the dma\naddress space.\n\nAll dma functions also perform required cache operation like their\ncounterparts from the arm linear physical memory mapping version.\n\nThis patch contains code and fixes kindly provided by:\n- Krishna Reddy \u003cvdumpa@nvidia.com\u003e,\n- Andrzej Pietrasiewicz \u003candrzej.p@samsung.com\u003e,\n- Hiroshi DOYU \u003chdoyu@nvidia.com\u003e\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nReviewed-by: Konrad Rzeszutek Wilk \u003ckonrad.wilk@oracle.com\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "f99d60341238fe73fc514129cd9ae4e44e1b2c47", "tree": "4e3214b9cdfbcddd9243f14161c77956eb3f5791", "parents": [ "51fde3499b531d4cf278f4d2eaa6c45b2865b16b" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed May 16 18:31:23 2012 +0200" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:22 2012 +0200" }, "message": "ARM: dma-mapping: use alloc, mmap, free from dma_ops\n\nThis patch converts dma_alloc/free/mmap_{coherent,writecombine}\nfunctions to use generic alloc/free/mmap methods from dma_map_ops\nstructure. A new DMA_ATTR_WRITE_COMBINE DMA attribute have been\nintroduced to implement writecombine methods.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "51fde3499b531d4cf278f4d2eaa6c45b2865b16b", "tree": "63ec32ec33f9e97b9f4e04c118385c2366b2f922", "parents": [ "15237e1f505b3e5c2276f240b01cd2133e110cbc" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Fri Feb 10 19:55:20 2012 +0100" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:19 2012 +0200" }, "message": "ARM: dma-mapping: remove redundant code and do the cleanup\n\nThis patch just performs a global cleanup in DMA mapping implementation\nfor ARM architecture. Some of the tiny helper functions have been moved\nto the caller code, some have been merged together.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "15237e1f505b3e5c2276f240b01cd2133e110cbc", "tree": "989e8a8580420ad3759a7bab81cd86347a3dadca", "parents": [ "2a550e73d3e5f040a3e8eb733c942ab352eafb36" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Fri Feb 10 19:55:20 2012 +0100" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:18 2012 +0200" }, "message": "ARM: dma-mapping: move all dma bounce code to separate dma ops structure\n\nThis patch removes dma bounce hooks from the common dma mapping\nimplementation on ARM architecture and creates a separate set of\ndma_map_ops for dma bounce devices.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "2a550e73d3e5f040a3e8eb733c942ab352eafb36", "tree": "dd4d161b5e3db2983737bad3f7b5787488bbe229", "parents": [ "2dc6a016bbedf18f18ad73997e5338307d6dbde9" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Fri Feb 10 19:55:20 2012 +0100" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:17 2012 +0200" }, "message": "ARM: dma-mapping: implement dma sg methods on top of any generic dma ops\n\nThis patch converts all dma_sg methods to be generic (independent of the\ncurrent DMA mapping implementation for ARM architecture). All dma sg\noperations are now implemented on top of respective\ndma_map_page/dma_sync_single_for* operations from dma_map_ops structure.\n\nBefore this patch there were custom methods for all scatter/gather\nrelated operations. They iterated over the whole scatter list and called\ncache related operations directly (which in turn checked if we use dma\nbounce code or not and called respective version). This patch changes\nthem not to use such shortcut. Instead it provides similar loop over\nscatter list and calls methods from the device\u0027s dma_map_ops structure.\nThis enables us to use device dependent implementations of cache related\noperations (direct linear or dma bounce) depending on the provided\ndma_map_ops structure.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "2dc6a016bbedf18f18ad73997e5338307d6dbde9", "tree": "741bf3c884304108b2e1d0a471aa6042c0d142e7", "parents": [ "a227fb92a0f5f0dd8282719386e9b3a29f0d16b2" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Fri Feb 10 19:55:20 2012 +0100" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:14 2012 +0200" }, "message": "ARM: dma-mapping: use asm-generic/dma-mapping-common.h\n\nThis patch modifies dma-mapping implementation on ARM architecture to\nuse common dma_map_ops structure and asm-generic/dma-mapping-common.h\nhelpers.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "a227fb92a0f5f0dd8282719386e9b3a29f0d16b2", "tree": "b990f647dcb38e17a4eef63b14f3358e6698e5c3", "parents": [ "553ac78877242b6d8b591323731df304140d0f99" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Fri Feb 10 19:55:20 2012 +0100" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:13 2012 +0200" }, "message": "ARM: dma-mapping: remove offset parameter to prepare for generic dma_ops\n\nThis patch removes the need for the offset parameter in dma bounce\nfunctions. This is required to let dma-mapping framework on ARM\narchitecture to use common, generic dma_map_ops based dma-mapping\nhelpers.\n\nBackground and more detailed explaination:\n\ndma_*_range_* functions are available from the early days of the dma\nmapping api. They are the correct way of doing a partial syncs on the\nbuffer (usually used by the network device drivers). This patch changes\nonly the internal implementation of the dma bounce functions to let\nthem tunnel through dma_map_ops structure. The driver api stays\nunchanged, so driver are obliged to call dma_*_range_* functions to\nkeep code clean and easy to understand.\n\nThe only drawback from this patch is reduced detection of the dma api\nabuse. Let us consider the following code:\n\ndma_addr \u003d dma_map_single(dev, ptr, 64, DMA_TO_DEVICE);\ndma_sync_single_range_for_cpu(dev, dma_addr+16, 0, 32, DMA_TO_DEVICE);\n\nWithout the patch such code fails, because dma bounce code is unable\nto find the bounce buffer for the given dma_address. After the patch\nthe above sync call will be equivalent to:\n\ndma_sync_single_range_for_cpu(dev, dma_addr, 16, 32, DMA_TO_DEVICE);\n\nwhich succeeds.\n\nI don\u0027t consider this as a real problem, because DMA API abuse should be\ncaught by debug_dma_* function family. This patch lets us to simplify\nthe internal low-level implementation without chaning the driver visible\nAPI.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "553ac78877242b6d8b591323731df304140d0f99", "tree": "fe826ee0134b8a97df9350648f85a94edd06f042", "parents": [ "6b6f770b573903f8a7d1cfab1fc662685653f413" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed Feb 29 14:45:28 2012 +0100" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:12 2012 +0200" }, "message": "ARM: dma-mapping: introduce DMA_ERROR_CODE constant\n\nReplace all uses of ~0 with DMA_ERROR_CODE, what should make the code\neasier to read.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "6b6f770b573903f8a7d1cfab1fc662685653f413", "tree": "033a393bb5e59562a3941c00a2cfc0acfefe7f08", "parents": [ "47142f07eea32e9c108f548a4b06c28bec7df6e4" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Tue Feb 28 10:19:14 2012 +0100" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:11 2012 +0200" }, "message": "ARM: dma-mapping: use pr_* instread of printk\n\nReplace all calls to printk with pr_* functions family.\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nTested-By: Subash Patel \u003csubash.ramaswamy@linaro.org\u003e\n" }, { "commit": "47142f07eea32e9c108f548a4b06c28bec7df6e4", "tree": "b170dc8d992de4d968331f84bb67f34476477c72", "parents": [ "bca0fa5f12a6744a2b2e53154af65a51402b3426" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Tue May 15 19:04:13 2012 +0200" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Mon May 21 15:06:10 2012 +0200" }, "message": "ARM: dma-mapping: use dma_mmap_from_coherent()\n\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\n" }, { "commit": "1a3abcf41f13666d4ed241c8cc7f48bd38e7b543", "tree": "4d1cb4bc3b0e65149a1ab2d1ad4a51a4bdd2035c", "parents": [ "9b61a4d1b2064dbd0c9e61754305ac852170509f" ], "author": { "name": "Vitaly Andrianov", "email": "vitalya@ti.com", "time": "Tue May 15 15:01:16 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu May 17 14:48:56 2012 +0100" }, "message": "ARM: 7418/1: LPAE: fix access flag setup in mem_type_table\n\nA zero value for prot_sect in the memory types table implies that\nsection mappings should never be created for the memory type in question.\nThis is checked for in alloc_init_section().\n\nWith LPAE, we set a bit to mask access flag faults for kernel mappings.\nThis breaks the aforementioned (!prot_sect) check in alloc_init_section().\n\nThis patch fixes this bug by first checking for a non-zero\nprot_sect before setting the PMD_SECT_AF flag.\n\nSigned-off-by: Vitaly Andrianov \u003cvitalya@ti.com\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9b61a4d1b2064dbd0c9e61754305ac852170509f", "tree": "0665524aa0636b7615a49748e5ddff818a231d45", "parents": [ "998de4acb2ba188d20768d1065658377a2e7d29b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed May 16 15:19:20 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed May 16 15:20:59 2012 +0100" }, "message": "ARM: prevent VM_GROWSDOWN mmaps extending below FIRST_USER_ADDRESS\n\nCc: \u003cstable@vger.kernel.org\u003e\nReported-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "89326f76b7ae602eb6a2d3e4cc028190fc8d480f", "tree": "29d55ffa2b9c46f22962e6a7ff08e3b04e9b0dbe", "parents": [ "3f5d081957cee794fe2937bb7edafa7ac949044d" ], "author": { "name": "Chao Xie", "email": "chao.xie@marvell.com", "time": "Mon May 07 11:23:59 2012 +0800" }, "committer": { "name": "Haojian Zhuang", "email": "haojian.zhuang@gmail.com", "time": "Mon May 07 11:43:48 2012 +0800" }, "message": "ARM: cache: tauros2: add disable and resume callback\n\nFor the SOC chips using tauros2 cache, will need disable\nand resume tauros2 cache for SOC suspend/resume.\n\nSigned-off-by: Chao Xie \u003cchao.xie@marvell.com\u003e\nSigned-off-by: Haojian Zhuang \u003chaojian.zhuang@gmail.com\u003e\n" }, { "commit": "3f5d081957cee794fe2937bb7edafa7ac949044d", "tree": "eca3454f0e5ab78e540cc39d02b2bd82421a85d5", "parents": [ "87046f4f3194ac0a795a10f3368ac73c04c633e3" ], "author": { "name": "Chao Xie", "email": "chao.xie@marvell.com", "time": "Mon May 07 11:23:58 2012 +0800" }, "committer": { "name": "Haojian Zhuang", "email": "haojian.zhuang@gmail.com", "time": "Mon May 07 11:42:54 2012 +0800" }, "message": "ARM: mm: proc-mohawk: add suspend resume for mohawk\n\nWhen enable ARCH_SUSPEND_POSSIBLE, it need defintion of\ncpu_mohawk_do_suspend and cpu_mohawk_do_resume\n\nSigned-off-by: Chao Xie \u003cchao.xie@marvell.com\u003e\nSigned-off-by: Haojian Zhuang \u003c\u003chaojian.zhuang@gmail.com\u003e\n" }, { "commit": "357c9c1f07d4546bc3fbc0fd1044d96b114d14ed", "tree": "a355e9cd73ab9f7b536b4c7562d931cfb3f5a885", "parents": [ "69964ea4c7b68c9399f7977aa5b9aa6539a6a98a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri May 04 12:04:26 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat May 05 05:50:50 2012 +0100" }, "message": "ARM: Remove support for ARMv3 ARM610 and ARM710 CPUs\n\nThis patch removes support for ARMv3 CPUs, which haven\u0027t worked properly\nfor quite some time (see the FIXME comment in arch/arm/mm/fault.c). The\nonly V3 parts left is the cache model for ARMv3, which is needed for some\nodd reason by ARM740T CPUs, and being able to build with -march\u003darmv3,\nwhich is required for the RiscPC platform due to its bus structure.\n\nAcked-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nAcked-by: Jean-Christophe PLAGNIOL-VILLARD \u003cplagnioj@jcrosoft.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c5102f5935503ebebad46e137d0eef68f272cc16", "tree": "888332340ca07cbd2a648fa603b8b252af02252a", "parents": [ "435a7ef52db7d86e67a009b36cac1457f8972391" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Apr 27 13:08:53 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed May 02 11:12:49 2012 +0100" }, "message": "ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails\n\nThe cacheflush syscall can fail for two reasons:\n\n(1) The arguments are invalid (nonsensical address range or no VMA)\n\n(2) The region generates a translation fault on a VIPT or PIPT cache\n\nThis patch allows do_cache_op to return an error code to userspace in\nthe case of the above. The various coherent_user_range implementations\nare modified to return 0 in the case of VIVT caches or -EFAULT in the\ncase of an abort on v6/v7 cores.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "14904927fcef6bb881fd995b478a0d2e700c1818", "tree": "5bee696fe202dabec672dcb8dee63bdb380060c3", "parents": [ "354535845ffb74d8a4827fbdaa493037d0030eea" ], "author": { "name": "Stephen Boyd", "email": "sboyd@codeaurora.org", "time": "Fri Apr 27 01:40:10 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Apr 28 11:00:16 2012 +0100" }, "message": "ARM: 7401/1: mm: Fix section mismatches\n\nWARNING: vmlinux.o(.text+0x111b8): Section mismatch in reference\nfrom the function arm_memory_present() to the function\n.init.text:memory_present()\nThe function arm_memory_present() references\nthe function __init memory_present().\nThis is often because arm_memory_present lacks a __init\nannotation or the annotation of memory_present is wrong.\n\nWARNING: arch/arm/mm/built-in.o(.text+0x1edc): Section mismatch\nin reference from the function alloc_init_pud() to the function\n.init.text:alloc_init_section()\nThe function alloc_init_pud() references\nthe function __init alloc_init_section().\nThis is often because alloc_init_pud lacks a __init\nannotation or the annotation of alloc_init_section is wrong.\n\nSigned-off-by: Stephen Boyd \u003csboyd@codeaurora.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ab4d536890853ab6675ede65db40e2c0980cb0ea", "tree": "3a1d9d7b06c82568a1a6b2e9f21a0576dabc30f4", "parents": [ "f154fe9b806574437b47f08e924ad10c0e240b23" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Apr 20 17:22:11 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Apr 23 14:21:52 2012 +0100" }, "message": "ARM: 7398/1: l2x0: only write to debug registers on PL310\n\nPL310 errata #588369 and #727915 require writes to the debug registers\nof the cache controller to work around known problems. Writing these\nregisters on L220 may cause deadlock, so ensure that we only perform\nthis operation when we identify a PL310 at probe time.\n\nCc: stable@vger.kernel.org\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f154fe9b806574437b47f08e924ad10c0e240b23", "tree": "6e681fc5cb9c6ba7fb029b5d50f11b1b53eb4ef6", "parents": [ "f0c4b8d653f5ee091fb8d4d02ed7eaad397491bb" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Apr 20 17:21:08 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Apr 23 14:21:52 2012 +0100" }, "message": "ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310\n\nThe workaround for PL310 erratum #753970 can lead to deadlock on systems\nwith an L220 cache controller.\n\nThis patch makes the workaround effective only when the cache controller\nis identified as a PL310 at probe time.\n\nCc: stable@vger.kernel.org\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f0c4b8d653f5ee091fb8d4d02ed7eaad397491bb", "tree": "cc7f1d1be2354dee506453f63f92a878384f30a8", "parents": [ "e895bd7992df1ebd1e0c28f7965520482bc83b74" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Apr 20 17:20:08 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Apr 23 14:21:52 2012 +0100" }, "message": "ARM: 7396/1: errata: only handle ARM erratum #326103 on affected cores\n\nErratum #326103 (\"FSR write bit incorrect on a SWP to read-only memory\")\nonly affects the ARM 1136 core prior to r1p0. The workaround\ndisassembles the faulting instruction to determine whether it was a read\nor write access on all v6 cores.\n\nAn issue has been reported on the ARM 11MPCore whereby loading the\nfaulting instruction may happen in parallel with that page being\nunmapped, resulting in a deadlock due to the lack of TLB broadcasting\nin hardware:\n\nhttp://lists.infradead.org/pipermail/linux-arm-kernel/2012-March/091561.html\n\nThis patch limits the workaround so that it is only used on affected\ncores, which are known to be UP only. Other v6 cores can rely on the\nFSR to indicate the access type correctly.\n\nCc: stable@vger.kernel.org\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "e323969ccda2d69f02e047c08b03faa09215c72a", "tree": "27ed693ec5bb114773f267722bdd0db371a4f5a2", "parents": [ "7fec1b57b8a925d83c194f995f83d9f8442fd48e" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Mon Nov 28 15:59:10 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Apr 17 15:29:37 2012 +0100" }, "message": "ARM: Remove current_mm per-cpu variable\n\nThe current_mm variable was used to store the new mm between the\nswitch_mm() and switch_to() calls where an IPI to reset the context\ncould have set the wrong mm. Since the interrupts are disabled during\ncontext switch, there is no need for this variable, current-\u003eactive_mm\nalready points to the current mm when interrupts are re-enabled.\n\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nTested-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nReviewed-by: Frank Rowand \u003cfrank.rowand@am.sony.com\u003e\nTested-by: Marc Zyngier \u003cMarc.Zyngier@arm.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "7fec1b57b8a925d83c194f995f83d9f8442fd48e", "tree": "320c333459779e1388f5aae50ae50edb4482e82c", "parents": [ "3c5f7e7b4a0346de670b08f595bd15e7eec91f97" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Mon Nov 28 13:53:28 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Apr 17 15:29:32 2012 +0100" }, "message": "ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs\n\nSince the ASIDs must be unique to an mm across all the CPUs in a system,\nthe __new_context() function needs to broadcast a context reset event to\nall the CPUs during ASID allocation if a roll-over occurred. Such IPIs\ncannot be issued with interrupts disabled and ARM had to define\n__ARCH_WANT_INTERRUPTS_ON_CTXSW.\n\nThis patch changes the check_context() function to\ncheck_and_switch_context() called from switch_mm(). In case of\nASID-capable CPUs (ARMv6 onwards), if a new ASID is needed and the\ninterrupts are disabled, it defers the __new_context() and\ncpu_switch_mm() calls to the post-lock switch hook where the interrupts\nare enabled. Setting the reserved TTBR0 was also moved to\ncheck_and_switch_context() from cpu_v7_switch_mm().\n\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nTested-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nReviewed-by: Frank Rowand \u003cfrank.rowand@am.sony.com\u003e\nTested-by: Marc Zyngier \u003cMarc.Zyngier@arm.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "3c5f7e7b4a0346de670b08f595bd15e7eec91f97", "tree": "ab49b3cd2cc56f83f569350c0dd2a2499de80a09", "parents": [ "e816b57a337ea3b755de72bec38c10c864f23015" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue May 31 15:38:43 2011 +0100" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Apr 17 15:29:21 2012 +0100" }, "message": "ARM: Use TTBR1 instead of reserved context ID\n\nOn ARMv7 CPUs that cache first level page table entries (like the\nCortex-A15), using a reserved ASID while changing the TTBR or flushing\nthe TLB is unsafe.\n\nThis is because the CPU may cache the first level entry as the result of\na speculative memory access while the reserved ASID is assigned. After\nthe process owning the page tables dies, the memory will be reallocated\nand may be written with junk values which can be interpreted as global,\nvalid PTEs by the processor. This will result in the TLB being populated\nwith bogus global entries.\n\nThis patch avoids the use of a reserved context ID in the v7 switch_mm\nand ASID rollover code by temporarily using the swapper_pg_dir pointed\nat by TTBR1, which contains only global entries that are not tagged\nwith ASIDs.\n\nReviewed-by: Frank Rowand \u003cfrank.rowand@am.sony.com\u003e\nTested-by: Marc Zyngier \u003cMarc.Zyngier@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n[catalin.marinas@arm.com: add LPAE support]\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "078c04545ba56da21567728a909a496df5ff730d", "tree": "08d0f061a972f426ef7d7c2ae227ac998ffca013", "parents": [ "e5ab85800820edd907d3f43f285e1232f84d5a41" ], "author": { "name": "Jonathan Austin", "email": "Jonathan.Austin@arm.com", "time": "Thu Apr 12 17:45:25 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Apr 15 22:00:31 2012 +0100" }, "message": "ARM: 7384/1: ThumbEE: Disable userspace TEEHBR access for !CONFIG_ARM_THUMBEE\n\nCurrently when ThumbEE is not enabled (!CONFIG_ARM_THUMBEE) the ThumbEE\nregister states are not saved/restored at context switch. The default state\nof the ThumbEE Ctrl register (TEECR) allows userspace accesses to the\nThumbEE Base Handler register (TEEHBR). This can cause unexpected behaviour\nwhen people use ThumbEE on !CONFIG_ARM_THUMBEE kernels, as well as allowing\ncovert communication - eg between userspace tasks running inside chroot\njails.\n\nThis patch sets up TEECR in order to prevent user-space access to TEEHBR\nwhen !CONFIG_ARM_THUMBEE. In this case, tasks are sent SIGILL if they try to\naccess TEEHBR.\n\nCc: stable@vger.kernel.org\nReviewed-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Jonathan Austin \u003cjonathan.austin@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6b8e5c912f4294611351aba151324764ebbefa1b", "tree": "85b5c6410b721e8eda13588e4769c49dfc050f48", "parents": [ "9b7333a9c1c22409f685ff6bb6a9e3638e7ff06f" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Apr 12 17:16:01 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Apr 13 14:05:42 2012 +0100" }, "message": "ARM: 7383/1: nommu: populate vectors page from paging_init\n\nCommit 94e5a85b (\"ARM: earlier initialization of vectors page\") made it\nthe responsibility of paging_init to initialise the vectors page.\n\nThis patch adds a call to early_trap_init for the !CONFIG_MMU case,\nplacing the vectors at CONFIG_VECTORS_BASE.\n\nCc: Jonathan Austin \u003cjonathan.austin@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9b7333a9c1c22409f685ff6bb6a9e3638e7ff06f", "tree": "75b96493c14a830ac80f1cbe676f4fe82d02ef63", "parents": [ "a106b21a352517b57af1c3581e15b8787ffe4e98" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Thu Apr 12 17:12:37 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Apr 13 14:05:41 2012 +0100" }, "message": "ARM: 7381/1: nommu: fix typo in mm/Kconfig\n\nThe description for the CPU_HIGH_VECTOR Kconfig option for nommu builds\ndoesn\u0027t make any sense.\n\nThis patch fixes up the trivial grammatical error.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "dff2aa7af8c96a11f75d858859f0e0c78b193d12", "tree": "3b88ae41a4d4571a48d03ad90c8955f3fffec77e", "parents": [ "258f742635360175564e9470eb060ff4d4b984e7" ], "author": { "name": "Kautuk Consul", "email": "consul.kautuk@gmail.com", "time": "Mon Apr 02 18:19:49 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Apr 10 09:27:42 2012 +0100" }, "message": "ARM: 7368/1: fault.c: correct how the tsk-\u003e[maj|min]_flt gets incremented\n\ncommit 8878a539ff19a43cf3729e7562cd528f490246ae was done by me\nto make the page fault handler retryable as well as interruptible.\n\nDue to this commit, there is a mistake in the way in which\ntsk-\u003e[maj|min]_flt counter gets incremented for VM_FAULT_ERROR:\nIf VM_FAULT_ERROR is returned in the fault flags by handle_mm_fault,\nthen either maj_flt or min_flt will get incremented. This is wrong\nas in the case of a VM_FAULT_ERROR we need to be skip ahead to the\nerror handling code in do_page_fault.\n\nAdded a check after the call to __do_page_fault() to check for\n(fault \u0026 VM_FAULT_ERROR).\n\nSigned-off-by: Kautuk Consul \u003cconsul.kautuk@gmail.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "820d41cf0cd0e94a5661e093821e2e5c6b36a9d8", "tree": "4d03046048dc52a8fa539c7e7b846e02738d8ca5", "parents": [ "6268b325c3066234e7bddb99d2b98bcedb0c0033", "88b48684fe2d4f6207223423227c80d5408bccaf" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 29 18:02:10 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 29 18:02:10 2012 -0700" }, "message": "Merge tag \u0027cleanup2\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc\n\nPull \"ARM: cleanups of io includes\" from Olof Johansson:\n \"Rob Herring has done a sweeping change cleaning up all of the\n mach/io.h includes, moving some of the oft-repeated macros to a common\n location and removing a bunch of boiler plate. This is another step\n closer to a common zImage for multiple platforms.\"\n\nFix up various fairly trivial conflicts (\u003cmach/io.h\u003e removal vs changes\naround it, tegra localtimer.o is *still* gone, yadda-yadda).\n\n* tag \u0027cleanup2\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)\n ARM: tegra: Include assembler.h in sleep.S to fix build break\n ARM: pxa: use common IOMEM definition\n ARM: dma-mapping: convert ARCH_HAS_DMA_SET_COHERENT_MASK to kconfig symbol\n ARM: __io abuse cleanup\n ARM: create a common IOMEM definition\n ARM: iop13xx: fix missing declaration of iop13xx_init_early\n ARM: fix ioremap/iounmap for !CONFIG_MMU\n ARM: kill off __mem_pci\n ARM: remove bunch of now unused mach/io.h files\n ARM: make mach/io.h include optional\n ARM: clps711x: remove unneeded include of mach/io.h\n ARM: dove: add explicit include of dove.h to addr-map.c\n ARM: at91: add explicit include of hardware.h to uncompressor\n ARM: ep93xx: clean-up mach/io.h\n ARM: tegra: clean-up mach/io.h\n ARM: orion5x: clean-up mach/io.h\n ARM: davinci: remove unneeded mach/io.h include\n [media] davinci: remove includes of mach/io.h\n ARM: OMAP: Remove remaining includes for mach/io.h\n ARM: msm: clean-up mach/io.h\n ...\n" }, { "commit": "12679a2d7e3bfbdc7586e3e86d1ca90c46659363", "tree": "d9c00f2e599d1c3e04a349229a6a19906d01f99e", "parents": [ "1c036588772d01655d851f75dffc27c971e072e2", "b0df89868006517417251e02cc4ce5d4b0165885" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 29 16:53:48 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 29 16:53:48 2012 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.linaro.org/people/rmk/linux-arm\n\nPull more ARM updates from Russell King.\n\nThis got a fair number of conflicts with the \u003casm/system.h\u003e split, but\nalso with some other sparse-irq and header file include cleanups. They\nall looked pretty trivial, though.\n\n* \u0027for-linus\u0027 of git://git.linaro.org/people/rmk/linux-arm: (59 commits)\n ARM: fix Kconfig warning for HAVE_BPF_JIT\n ARM: 7361/1: provide XIP_VIRT_ADDR for no-MMU builds\n ARM: 7349/1: integrator: convert to sparse irqs\n ARM: 7259/3: net: JIT compiler for packet filters\n ARM: 7334/1: add jump label support\n ARM: 7333/2: jump label: detect %c support for ARM\n ARM: 7338/1: add support for early console output via semihosting\n ARM: use set_current_blocked() and block_sigmask()\n ARM: exec: remove redundant set_fs(USER_DS)\n ARM: 7332/1: extract out code patch function from kprobes\n ARM: 7331/1: extract out insn generation code from ftrace\n ARM: 7330/1: ftrace: use canonical Thumb-2 wide instruction format\n ARM: 7351/1: ftrace: remove useless memory checks\n ARM: 7316/1: kexec: EOI active and mask all interrupts in kexec crash path\n ARM: Versatile Express: add NO_IOPORT\n ARM: get rid of asm/irq.h in asm/prom.h\n ARM: 7319/1: Print debug info for SIGBUS in user faults\n ARM: 7318/1: gic: refactor irq_start assignment\n ARM: 7317/1: irq: avoid NULL check in for_each_irq_desc loop\n ARM: 7315/1: perf: add support for the Cortex-A7 PMU\n ...\n" }, { "commit": "0195c00244dc2e9f522475868fa278c473ba7339", "tree": "f97ca98ae64ede2c33ad3de05ed7bbfa4f4495ed", "parents": [ "f21ce8f8447c8be8847dadcfdbcc76b0d7365fa5", "141124c02059eee9dbc5c86ea797b1ca888e77f7" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 28 15:58:21 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 28 15:58:21 2012 -0700" }, "message": "Merge tag \u0027split-asm_system_h-for-linus-20120328\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system\n\nPull \"Disintegrate and delete asm/system.h\" from David Howells:\n \"Here are a bunch of patches to disintegrate asm/system.h into a set of\n separate bits to relieve the problem of circular inclusion\n dependencies.\n\n I\u0027ve built all the working defconfigs from all the arches that I can\n and made sure that they don\u0027t break.\n\n The reason for these patches is that I recently encountered a circular\n dependency problem that came about when I produced some patches to\n optimise get_order() by rewriting it to use ilog2().\n\n This uses bitops - and on the SH arch asm/bitops.h drags in\n asm-generic/get_order.h by a circuituous route involving asm/system.h.\n\n The main difficulty seems to be asm/system.h. It holds a number of\n low level bits with no/few dependencies that are commonly used (eg.\n memory barriers) and a number of bits with more dependencies that\n aren\u0027t used in many places (eg. switch_to()).\n\n These patches break asm/system.h up into the following core pieces:\n\n (1) asm/barrier.h\n\n Move memory barriers here. This already done for MIPS and Alpha.\n\n (2) asm/switch_to.h\n\n Move switch_to() and related stuff here.\n\n (3) asm/exec.h\n\n Move arch_align_stack() here. Other process execution related bits\n could perhaps go here from asm/processor.h.\n\n (4) asm/cmpxchg.h\n\n Move xchg() and cmpxchg() here as they\u0027re full word atomic ops and\n frequently used by atomic_xchg() and atomic_cmpxchg().\n\n (5) asm/bug.h\n\n Move die() and related bits.\n\n (6) asm/auxvec.h\n\n Move AT_VECTOR_SIZE_ARCH here.\n\n Other arch headers are created as needed on a per-arch basis.\"\n\nFixed up some conflicts from other header file cleanups and moving code\naround that has happened in the meantime, so David\u0027s testing is somewhat\nweakened by that. We\u0027ll find out anything that got broken and fix it..\n\n* tag \u0027split-asm_system_h-for-linus-20120328\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system: (38 commits)\n Delete all instances of asm/system.h\n Remove all #inclusions of asm/system.h\n Add #includes needed to permit the removal of asm/system.h\n Move all declarations of free_initmem() to linux/mm.h\n Disintegrate asm/system.h for OpenRISC\n Split arch_align_stack() out from asm-generic/system.h\n Split the switch_to() wrapper out of asm-generic/system.h\n Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h\n Create asm-generic/barrier.h\n Make asm-generic/cmpxchg.h #include asm-generic/cmpxchg-local.h\n Disintegrate asm/system.h for Xtensa\n Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt]\n Disintegrate asm/system.h for Tile\n Disintegrate asm/system.h for Sparc\n Disintegrate asm/system.h for SH\n Disintegrate asm/system.h for Score\n Disintegrate asm/system.h for S390\n Disintegrate asm/system.h for PowerPC\n Disintegrate asm/system.h for PA-RISC\n Disintegrate asm/system.h for MN10300\n ...\n" }, { "commit": "9f97da78bf018206fb623cd351d454af2f105fe0", "tree": "509971bf0d93f56d7ad182bdad3c89886f7ce675", "parents": [ "15d07dc9c59eae51219c40253bdf920f62bb10f2" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:01 2012 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:01 2012 +0100" }, "message": "Disintegrate asm/system.h for ARM\n\nDisintegrate asm/system.h for ARM.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\ncc: Russell King \u003clinux@arm.linux.org.uk\u003e\ncc: linux-arm-kernel@lists.infradead.org\n" }, { "commit": "15d07dc9c59eae51219c40253bdf920f62bb10f2", "tree": "d830b428bf55526b1ab80139f6b4c24d4b38d627", "parents": [ "ec2212088c42ff7d1362629ec26dda4f3e8bdad3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Mar 28 18:30:01 2012 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:01 2012 +0100" }, "message": "ARM: move CP15 definitions to separate header file\n\nAvoid namespace conflicts with drivers over the CP15 definitions by\nmoving CP15 related prototypes and definitions to a private header\nfile.\n\nAcked-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nTested-by: Stephen Warren \u003cswarren@nvidia.com\u003e [Tegra]\nAcked-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nTested-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e [EP93xx]\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Kukjin Kim \u003ckgene.kim@samsung.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\n" }, { "commit": "4ba21e868f4b6e2ce5432055e206edadc6319533", "tree": "0d06d66d00c091ebd2abc88cfcf9332b6bc08f18", "parents": [ "3e175ca4cab37b1eb99f7cf032142a1e5cdb3d97", "60db4fcf14c6b562399579473a67e51eed694ff4", "fada8dcf2d085f4e2eb1ba760c8d37111977dbec" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Mar 27 11:29:31 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Mar 27 11:29:31 2012 +0100" }, "message": "Merge branches \u0027l2\u0027, \u0027pgt2\u0027 and \u0027misc\u0027 into for-linus\n" }, { "commit": "f5274c2d0d8d91076af8605187d762dfa0b92825", "tree": "96b4c6292a9aec6d623bf577c2e10cd16b2ea4b9", "parents": [ "e0b823e9a543527dbb0f806252ee03a60f2aefbc" ], "author": { "name": "Javi Merino", "email": "javi.merino@arm.com", "time": "Mon Feb 06 15:45:36 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Mar 24 09:38:53 2012 +0000" }, "message": "ARM: 7319/1: Print debug info for SIGBUS in user faults\n\nPrint debug information on user faults for SIGBUS if user_debug \u003d 16\nin the kernel command line.\n\nReference: \u003c1327333344-26340-1-git-send-email-javi.merino@arm.com\u003e\n\nSigned-off-by: Javi Merino \u003cjavi.merino@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d9277d51a8eeaa097d3c1385f458c99d65ffc4f4", "tree": "83690616d9953c6ebcb92755a1414690d6a6cf71", "parents": [ "a7f464f3db93ae5492bee6f6e48939fd8a45fa99" ], "author": { "name": "Uwe Kleine-König", "email": "u.kleine-koenig@pengutronix.de", "time": "Wed Feb 01 11:16:51 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Mar 24 09:38:52 2012 +0000" }, "message": "ARM: 7312/1: only show modules in the memory layout for MODULES\u003dy\n\nThis line is irritating and wrong when modules are not supported, so\ndon\u0027t show it then.\n\nSigned-off-by: Uwe Kleine-König \u003cu.kleine-koenig@pengutronix.de\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "195864cf3d6f5b6b743793bda3aaa2ff65d322ae", "tree": "d6692b92ca3df0c38887ed186360328bbb3b007b", "parents": [ "149c24151e8577b2a033639722dc5734de5e6eaf" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 19 10:05:41 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Mar 24 09:38:51 2012 +0000" }, "message": "ARM: move CP15 definitions to separate header file\n\nAvoid namespace conflicts with drivers over the CP15 definitions by\nmoving CP15 related prototypes and definitions to a private header\nfile.\n\nAcked-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nTested-by: Stephen Warren \u003cswarren@nvidia.com\u003e [Tegra]\nAcked-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nTested-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e [EP93xx]\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Kukjin Kim \u003ckgene.kim@samsung.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "475c77edf826333aa61625f49d6a2bec26ecb5a6", "tree": "8e1c6c319e347cd3c649fdb0b3ab45971c6b19e7", "parents": [ "934e18b5cb4531cc6e81865bf54115cfd21d1ac6", "1488d5158dcd612fcdaf6b642451b026ee8bbcbb" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 23 14:02:12 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 23 14:02:12 2012 -0700" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci\n\nPull PCI changes (including maintainer change) from Jesse Barnes:\n \"This pull has some good cleanups from Bjorn and Yinghai, as well as\n some more code from Yinghai to better handle resource re-allocation\n when enabled.\n\n There\u0027s also a new initcall_debug feature from Arjan which will print\n out quirk timing information to help identify slow quirks for fixing\n or refinement (Yinghai sent in a few patches to do just that once the\n new debug code landed).\n\n Beyond that, I\u0027m handing off PCI maintainership to Bjorn Helgaas.\n He\u0027s been a core PCI and Linux contributor for some time now, and has\n kindly volunteered to take over. I just don\u0027t feel I have the time\n for PCI review and work that it deserves lately (I\u0027ve taken on some\n other projects), and haven\u0027t been as responsive lately as I\u0027d like, so\n I approached Bjorn asking if he\u0027d like to manage things. He\u0027s going\n to give it a try, and I\u0027m confident he\u0027ll do at least as well as I\n have in keeping the tree managed, patches flowing, and keeping things\n stable.\"\n\nFix up some fairly trivial conflicts due to other cleanups (mips device\nresource fixup cleanups clashing with list handling cleanup, ppc iseries\nremoval clashing with pci_probe_only cleanup etc)\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (112 commits)\n PCI: Bjorn gets PCI hotplug too\n PCI: hand PCI maintenance over to Bjorn Helgaas\n unicore32/PCI: move \u003casm-generic/pci-bridge.h\u003e include to asm/pci.h\n sparc/PCI: convert devtree and arch-probed bus addresses to resource\n powerpc/PCI: allow reallocation on PA Semi\n powerpc/PCI: convert devtree bus addresses to resource\n powerpc/PCI: compute I/O space bus-to-resource offset consistently\n arm/PCI: don\u0027t export pci_flags\n PCI: fix bridge I/O window bus-to-resource conversion\n x86/PCI: add spinlock held check to \u0027pcibios_fwaddrmap_lookup()\u0027\n PCI / PCIe: Introduce command line option to disable ARI\n PCI: make acpihp use __pci_remove_bus_device instead\n PCI: export __pci_remove_bus_device\n PCI: Rename pci_remove_behind_bridge to pci_stop_and_remove_behind_bridge\n PCI: Rename pci_remove_bus_device to pci_stop_and_remove_bus_device\n PCI: print out PCI device info along with duration\n PCI: Move \"pci reassigndev resource alignment\" out of quirks.c\n PCI: Use class for quirk for usb host controller fixup\n PCI: Use class for quirk for ti816x class fixup\n PCI: Use class for quirk for intel e100 interrupt fixup\n ...\n" }, { "commit": "9f3938346a5c1fa504647670edb5fea5756cfb00", "tree": "7cf6d24d6b076c8db8571494984924cac03703a2", "parents": [ "69a7aebcf019ab3ff5764525ad6858fbe23bb86d", "317b6e128247f75976b0fc2b9fd8d2c20ef13b3a" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 21 09:40:26 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 21 09:40:26 2012 -0700" }, "message": "Merge branch \u0027kmap_atomic\u0027 of git://github.com/congwang/linux\n\nPull kmap_atomic cleanup from Cong Wang.\n\nIt\u0027s been in -next for a long time, and it gets rid of the (no longer\nused) second argument to k[un]map_atomic().\n\nFix up a few trivial conflicts in various drivers, and do an \"evil\nmerge\" to catch some new uses that have come in since Cong\u0027s tree.\n\n* \u0027kmap_atomic\u0027 of git://github.com/congwang/linux: (59 commits)\n feature-removal-schedule.txt: schedule the deprecated form of kmap_atomic() for removal\n highmem: kill all __kmap_atomic() [swarren@nvidia.com: highmem: Fix ARM build break due to __kmap_atomic rename]\n drbd: remove the second argument of k[un]map_atomic()\n zcache: remove the second argument of k[un]map_atomic()\n gma500: remove the second argument of k[un]map_atomic()\n dm: remove the second argument of k[un]map_atomic()\n tomoyo: remove the second argument of k[un]map_atomic()\n sunrpc: remove the second argument of k[un]map_atomic()\n rds: remove the second argument of k[un]map_atomic()\n net: remove the second argument of k[un]map_atomic()\n mm: remove the second argument of k[un]map_atomic()\n lib: remove the second argument of k[un]map_atomic()\n power: remove the second argument of k[un]map_atomic()\n kdb: remove the second argument of k[un]map_atomic()\n udf: remove the second argument of k[un]map_atomic()\n ubifs: remove the second argument of k[un]map_atomic()\n squashfs: remove the second argument of k[un]map_atomic()\n reiserfs: remove the second argument of k[un]map_atomic()\n ocfs2: remove the second argument of k[un]map_atomic()\n ntfs: remove the second argument of k[un]map_atomic()\n ...\n" }, { "commit": "69a7aebcf019ab3ff5764525ad6858fbe23bb86d", "tree": "7211df5704b743a7667159748c670a9744164482", "parents": [ "d464c92b5234227c1698862a1906827e2e398ae0", "f1f996b66cc3908a8f5ffccc2ff41840e92f3b10" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 20 21:12:50 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 20 21:12:50 2012 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\nPull trivial tree from Jiri Kosina:\n \"It\u0027s indeed trivial -- mostly documentation updates and a bunch of\n typo fixes from Masanari.\n\n There are also several linux/version.h include removals from Jesper.\"\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (101 commits)\n kcore: fix spelling in read_kcore() comment\n constify struct pci_dev * in obvious cases\n Revert \"char: Fix typo in viotape.c\"\n init: fix wording error in mm_init comment\n usb: gadget: Kconfig: fix typo for \u0027different\u0027\n Revert \"power, max8998: Include linux/module.h just once in drivers/power/max8998_charger.c\"\n writeback: fix fn name in writeback_inodes_sb_nr_if_idle() comment header\n writeback: fix typo in the writeback_control comment\n Documentation: Fix multiple typo in Documentation\n tpm_tis: fix tis_lock with respect to RCU\n Revert \"media: Fix typo in mixer_drv.c and hdmi_drv.c\"\n Doc: Update numastat.txt\n qla4xxx: Add missing spaces to error messages\n compiler.h: Fix typo\n security: struct security_operations kerneldoc fix\n Documentation: broken URL in libata.tmpl\n Documentation: broken URL in filesystems.tmpl\n mtd: simplify return logic in do_map_probe()\n mm: fix comment typo of truncate_inode_pages_range\n power: bq27x00: Fix typos in comment\n ...\n" }, { "commit": "a24401bcf4a67c8fe17e649e74eeb09b08b79ef5", "tree": "c4b1be87e0a63057e85ae82076d54c437313b1f8", "parents": [ "589973a7042f5a91a5b8bf78a32c97ae073e2c72" ], "author": { "name": "Cong Wang", "email": "amwang@redhat.com", "time": "Sat Nov 26 10:53:39 2011 +0800" }, "committer": { "name": "Cong Wang", "email": "xiyou.wangcong@gmail.com", "time": "Tue Mar 20 21:48:30 2012 +0800" }, "message": "highmem: kill all __kmap_atomic()\n[swarren@nvidia.com: highmem: Fix ARM build break due to __kmap_atomic rename]\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Cong Wang \u003camwang@redhat.com\u003e\n" }, { "commit": "5472e862de2bc4a47f18d216a4a626d5c7eeef90", "tree": "9533c823c1d6161950059c5e40abd32a1ea18c9d", "parents": [ "1ec9c5ddc17aa398f05646abfcbaf315b544e62f" ], "author": { "name": "Cong Wang", "email": "amwang@redhat.com", "time": "Fri Nov 25 23:14:15 2011 +0800" }, "committer": { "name": "Cong Wang", "email": "xiyou.wangcong@gmail.com", "time": "Tue Mar 20 21:48:14 2012 +0800" }, "message": "arm: remove the second argument of k[un]map_atomic()\n\nSigned-off-by: Cong Wang \u003camwang@redhat.com\u003e\n" }, { "commit": "8a2b6255dd11eee1b27d1be394241abf1871b610", "tree": "176fe3a486861176d8dbc73adecb6809528f65b7", "parents": [ "5621caac1d9514b568f986b55ce5494b1d119d40" ], "author": { "name": "Rob Herring", "email": "rob.herring@calxeda.com", "time": "Sat Mar 10 21:24:04 2012 -0600" }, "committer": { "name": "Rob Herring", "email": "rob.herring@calxeda.com", "time": "Sun Mar 11 15:59:13 2012 -0500" }, "message": "ARM: fix ioremap/iounmap for !CONFIG_MMU\n\nWith commit 4fe7ef3a081 (ARM: provide runtime hook for ioremap/iounmap),\ncompiles with !CONFIG_MMU were broken. Rename nommu __iounmap to\n__arm_iounmap and add arch_ioremap_caller and arch_iounmap. Its\nnot expected that these need to be overriden for !CONFIG_MMU, so setting\nthe function ptrs has no effect in this case.\n\nSigned-off-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\n" }, { "commit": "4fe7ef3a0811c33137ace0ed424dd0c01dd2d75e", "tree": "046a63d0c5db517529e86c914bb2fb493a4adee6", "parents": [ "47168824fa71b52ca3f4c18ddf0c42ff35192235" ], "author": { "name": "Rob Herring", "email": "rob.herring@calxeda.com", "time": "Fri Feb 10 17:05:13 2012 -0600" }, "committer": { "name": "Rob Herring", "email": "rob.herring@calxeda.com", "time": "Tue Mar 06 21:22:01 2012 -0600" }, "message": "ARM: provide runtime hook for ioremap/iounmap\n\nWe have compile time over-ride of ioremap and iounmap, but an run-time\noverride is needed for multi-platform builds. This adds an extra function\npointer check, but ioremap is not peformance critical. The option for\ncompile time selection remains.\n\nThe caller variant is used here to provide correct caller information as\nARM can only support level 0 for __builtin_return_address.\n\nSigned-off-by: Rob Herring \u003crob.herring@calxeda.com\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nReviewed-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nReviewed-by: Nicolas Pitre \u003cnico@linaro.org\u003e\n" }, { "commit": "efbc74ace95338484f8d732037b99c7c77098fce", "tree": "3c617af9176276e58fcf8351355985c92178896d", "parents": [ "120213728c6407398428a5692cfa5004b520b274" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Feb 24 12:12:38 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 27 11:22:08 2012 +0000" }, "message": "ARM: 7345/1: errata: update workaround for A9 erratum #743622\n\nErratum #743622 affects all r2 variants of the Cortex-A9 processor, so\nensure that the workaround is applied regardless of the revision.\n\nCc: \u003cstable@vger.kernel.org\u003e\nReported-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6696cbc39dff488dbe04d80d74023d8766a15e70", "tree": "2d8e96a315dc43a33778d0195252edd4ba9851ef", "parents": [ "151d16d531c5bc60bad9dc62102be18f11b4280a" ], "author": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:18:56 2012 -0700" }, "committer": { "name": "Bjorn Helgaas", "email": "bhelgaas@google.com", "time": "Thu Feb 23 20:18:56 2012 -0700" }, "message": "arm/PCI: remove arch pci_flags definition\n\nThe PCI core provides a pci_flags definition (currently __weak), so drop\nthe arm definition in favor of that.\n\nWe EXPORT_SYMBOL(pci_flags) as arm did previously. I\u0027m dubious about\nthis: no other architecture exports it, and I didn\u0027t see any modules in\nthe tree that reference it.\n\nCC: Rob Herring \u003crob.herring@calxeda.com\u003e\nCC: Russell King \u003clinux@arm.linux.org.uk\u003e\nCC: linux-arm-kernel@lists.infradead.org\nSigned-off-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\n" }, { "commit": "8e43a905dd574f54c5715d978318290ceafbe275", "tree": "4d2bc5178293689353675105ee37e1c287848f39", "parents": [ "6e2e340b59d2d4e7b6b7f2c2d02b0d5ca4df6458" ], "author": { "name": "Rabin Vincent", "email": "rabin@rab.in", "time": "Wed Feb 15 16:01:42 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Feb 15 21:09:52 2012 +0000" }, "message": "ARM: 7325/1: fix v7 boot with lockdep enabled\n\nBootup with lockdep enabled has been broken on v7 since b46c0f74657d\n(\"ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR\").\n\nThis is because v7_setup (which is called very early during boot) calls\nv7_flush_dcache_all, and the save_and_disable_irqs added by that patch\nends up attempting to call into lockdep C code (trace_hardirqs_off())\nwhen we are in no position to execute it (no stack, MMU off).\n\nFix this by using a notrace variant of save_and_disable_irqs. The code\nalready uses the notrace variant of restore_irqs.\n\nReviewed-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nAcked-by: Stephen Boyd \u003csboyd@codeaurora.org\u003e\nCc: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nCc: stable@vger.kernel.org\nSigned-off-by: Rabin Vincent \u003crabin@rab.in\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "08a183f02b5fef1cd78d27ffc8281fa96d79f814", "tree": "37621a2e6d7fe0cfe85465cef425467d33767ff1", "parents": [ "7ada1dd62804ca9ce1cb8666c6e563cd92fa50c1" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Feb 14 16:33:27 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Feb 15 11:04:36 2012 +0000" }, "message": "ARM: 7323/1: Do not allow ARM_LPAE on pre-ARMv7 architectures\n\nThis patch expands the Kconfig dependencies for ARM_LPAE to not allow\nenabling when architectures other than ARMv7 are built into the kernel.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nReported-by: Russell King \u003clinux@arm.linux.org.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9e45dd688a1860a5e1e84844e43abf881564edb5", "tree": "81267634eece6cfaff07ed0652f9d38bf86f5872", "parents": [ "9ba2630169cfa6595597bdef700f219d4e07aa05" ], "author": { "name": "Jesper Juhl", "email": "jj@chaosbits.net", "time": "Sun Feb 05 01:22:29 2012 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Fri Feb 10 09:52:18 2012 +0100" }, "message": "ARM: Remove duplicate asm/memblock.h include from arch/arm/mm/init.c\n\nThere\u0027s no need to include the header twice, so get rid of the\nduplicate.\n\nSigned-off-by: Jesper Juhl \u003cjj@chaosbits.net\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "b46c0f74657d1fe1c1b0c1452631cc38a9e6987f", "tree": "b6004a9408492488526c7c5cfdbb43b28c3d814a", "parents": [ "b8b9987ffdc2ab9c5e2c1edad556b23ccb38249b" ], "author": { "name": "Stephen Boyd", "email": "sboyd@codeaurora.org", "time": "Tue Feb 07 19:42:07 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 09 16:25:37 2012 +0000" }, "message": "ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR\n\narmv7\u0027s flush_cache_all() flushes caches via set/way. To\ndetermine the cache attributes (line size, number of sets,\netc.) the assembly first writes the CSSELR register to select a\ncache level and then reads the CCSIDR register. The CSSELR register\nis banked per-cpu and is used to determine which cache level CCSIDR\nreads. If the task is migrated between when the CSSELR is written and\nthe CCSIDR is read the CCSIDR value may be for an unexpected cache\nlevel (for example L1 instead of L2) and incorrect cache flushing\ncould occur.\n\nDisable interrupts across the write and read so that the correct\ncache attributes are read and used for the cache flushing\nroutine. We disable interrupts instead of disabling preemption\nbecause the critical section is only 3 instructions and we want\nto call v7_dcache_flush_all from __v7_setup which doesn\u0027t have a\nfull kernel stack with a struct thread_info.\n\nThis fixes a problem we see in scm_call() when flush_cache_all()\nis called from preemptible context and sometimes the L2 cache is\nnot properly flushed out.\n\nSigned-off-by: Stephen Boyd \u003csboyd@codeaurora.org\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nReviewed-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nCc: stable@vger.kernel.org\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "97f1040982d7935716e9a45a26ccd5cc8fe92f8c", "tree": "158cd337307a4a4e09a3fb5110f29ab0136bef6c", "parents": [ "3c424f359898aff48c3d5bed608ac706f8a528c3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Jan 29 14:55:21 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 02 17:37:41 2012 +0000" }, "message": "Revert \"ARM: 7304/1: ioremap: fix boundary check when reusing static mapping\"\n\nThis reverts commit 3c424f359898aff48c3d5bed608ac706f8a528c3.\n\nJoachim Eastwood reports:\n| \"ARM: 7304/1: ioremap: fix boundary check when reusing static mapping\"\n| Commit: 3c424f359898aff48c3d5bed608ac706f8a528c3 in Linus master\n|\n| Breaks booting on my custom AT91RM9200 board.\n| There isn\u0027t any error messages or anything that indicates what goes\n| wrong it just stops after; Uncompressing Linux... done, booting the\n| kernel.\n|\n| Reverting it makes my board boot again.\n\nand further debugging reveals:\n\nioremap: pfn\u003dfffff phys\u003dfffff000 offset\u003d400 size\u003d1000\nioremap: area c3ffdfc0: phys_addr\u003d200000 pfn\u003d200 size\u003d4000\nioremap: found: addr fef74000 \u003d\u003e fed73000 \u003d\u003e fed73400\n\nClearly, an area for pfn 0x200, 16K can\u0027t ever satisfy a request for pfn\n0xfffff. This happens because the changed if statement becomes:\n\n if (0x00200 \u003e 0xfffff ||\n 0xfffff000 + 0x400 + 0x1000-1 \u003e 0x00200000 + 0x4000-1)\nand therefore:\n if (0x00200 \u003e 0xfffff ||\n 0x000003ff \u003e 0x00203fff)\n\nThe if condition fails, and so we _believe_ that the SRAM mapping fits\nour request. Clearly that\u0027s totally bogus.\n\nMoreover, the original premise of the \u0027fix\u0027 patch was wrong:\n| The condition checking boundaries of the requested and existing\n| mappings didn\u0027t take in-page offset into consideration though,\n| which lead to obscure and hard to debug problems when requested\n| mapping crossed end of the static one.\n\nas the code immediately above this loop does:\n\n size \u003d PAGE_ALIGN(offset + size);\n\nso \u0027size\u0027 already contains the requested offset into the page.\n\nSo, revert the broken \u0027fix\u0027.\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\n" }, { "commit": "3c424f359898aff48c3d5bed608ac706f8a528c3", "tree": "aeddc0dd01e9e9f5a690f90ddb1bfb7a588ea929", "parents": [ "9a95b9e7416c2e7fa799e54078a1adf84a7ed0bf" ], "author": { "name": "Pawel Moll", "email": "pawel.moll@arm.com", "time": "Thu Jan 26 11:47:11 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 27 21:26:38 2012 +0000" }, "message": "ARM: 7304/1: ioremap: fix boundary check when reusing static mapping\n\nSince commit 576d2f2525612ecb5af029a76f21f22a3b82563d \"ARM: add\ngeneric ioremap optimization by reusing static mappings\" ioremap()\nis trying to reuse existing static mapping when possible.\n\nThe condition checking boundaries of the requested and existing\nmappings didn\u0027t take in-page offset into consideration though,\nwhich lead to obscure and hard to debug problems when requested\nmapping crossed end of the static one.\n\nSigned-off-by: Pawel Moll \u003cpawel.moll@arm.com\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "60db4fcf14c6b562399579473a67e51eed694ff4", "tree": "82edc5508e8720ba51419f120494f511405e66ac", "parents": [ "0d31fe47b0f62e6546779eae2fc9b2e024aff4ce" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jul 04 11:25:53 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 26 20:07:59 2012 +0000" }, "message": "ARM: pgtable: get rid of TOP_PTE()\n\nGet rid of the TOP_PTE() macro as we now have proper accessor functions\ninstead. No one should be directly referencing the top pte table\nanymore.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "0d31fe47b0f62e6546779eae2fc9b2e024aff4ce", "tree": "6e1a619868e7e8bde6180d73c75ea7ab6f131e9b", "parents": [ "67ece1443174d852e71c42facb3e2d7dd338c88a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jul 04 11:22:27 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 26 20:07:41 2012 +0000" }, "message": "ARM: pgtable: provide get_top_pte() to complement set_top_pte()\n\nProvide get_top_pte() to complement set_top_pte(), moving the only\nusers of TOP_PTE to arch/arm/mm/mm.h.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "67ece1443174d852e71c42facb3e2d7dd338c88a", "tree": "418359d432acfcb2ecc4c58c8afa5f73de4fa01e", "parents": [ "6e78df176141f2cb673bed7fa47825e3c6a8719f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Jul 02 15:20:44 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 26 20:06:28 2012 +0000" }, "message": "ARM: pgtable: consolidate set_pte_ext(TOP_PTE,...) + tlb flush\n\nA number of places establish a PTE in our top page table and\nimmediately flush the TLB. Rather than having this at every callsite,\nprovide an inline function for this purpose.\n\nThis changes some global tlb flushes to be local; each time we setup\none of these mappings, we always do it with preemption disabled which\nwould prevent us migrating to another CPU.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6e78df176141f2cb673bed7fa47825e3c6a8719f", "tree": "451b621572f7ba63d1121e7d9c2ed1f1432f2ded", "parents": [ "de27c308223dc9bd48de9742c7c2b53a15c1b012" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Jul 02 14:56:42 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 26 20:06:22 2012 +0000" }, "message": "ARM: pgtable: use mk_pte rather than pfn_pte(page_to_pfn())\n\nmk_pte is provided to do this translation for us, so use it rather\nthan open-coding it in the copypage code.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "de27c308223dc9bd48de9742c7c2b53a15c1b012", "tree": "d32acbc71110b1e727abd80620f95f14565b6031", "parents": [ "dcd6c92267155e70a94b3927bce681ce74b80d1f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Jul 02 14:46:27 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 26 20:06:14 2012 +0000" }, "message": "ARM: pgtable: move TOP_PTE address definitions to arch/arm/mm/mm.h\n\nMove the TOP_PTE address definitions to one central place so that it\u0027s\neasy to discover what they\u0027re being used for. This helps to ensure\nthat there are no overlaps.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "94e5a85b3be0ce109d26aa6812b2a02c518a0e4b", "tree": "fb809876ee6b193489bbca6767c04df346466f1c", "parents": [ "45cd5290bfd358e9885c0bf47a8c46671a92f716" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 18 15:32:49 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:24:11 2012 +0000" }, "message": "ARM: earlier initialization of vectors page\n\nInitialize the contents of the vectors page immediately after we\nallocate the page, but before we map it. This avoids any possible\naliases with other mappings which may need to be flushed after the\npage has been mapped irrespective of the cache type.\n\nWe follow this later with a flush_cache_all() after all static memory\nmappings have been initialized, which ensures that this is safe from\nany cache effects.\n\nTested-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "45cd5290bfd358e9885c0bf47a8c46671a92f716", "tree": "a1831403d646336b022b973fd48427263d349e8b", "parents": [ "6bebb572404f96d367170fb263603cda7251f932" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 12 23:08:07 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:23:57 2012 +0000" }, "message": "ARM: add dma coherent region reporting via procfs\n\nAdd a new seqfile for reporting coherent DMA allocations. This contains\nthe address range, size and the function which was used to allocate\neach region, allowing these allocations to be viewed in much the same\nway as /proc/vmallocinfo.\n\nThe DMA coherent region has limited space, so this allows allocation\nfailures to be viewed, as well as finding out how much space is being\nused.\n\nMake sure this file is only readable by root - same as vmallocinfo - to\nprevent information leakage.\n\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "612539e81f655f6ac73c7af1da8701c1ee618aee", "tree": "a442b17625ad28e282c4ddb0f786ccdfbe4f8bf4", "parents": [ "868dbf905245a524496a0535982ed21ad3be5585" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Jan 20 12:10:18 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:20:06 2012 +0000" }, "message": "ARM: 7296/1: proc-v7.S: remove HARVARD_CACHE preprocessor guards\n\nOn v7, we use the same cache maintenance instructions for data lines\nas for unified lines. This was not the case for v6, where HARVARD_CACHE\nwas defined to indicate the L1 cache topology.\n\nThis patch removes the erroneous compile-time check for HARVARD_CACHE in\nproc-v7.S, ensuring that we perform I-side invalidation at boot.\n\nReported-and-Acked-by: Shawn Guo \u003cshawn.guo@linaro.org\u003e\n\nCc: stable \u003cstable@vger.kernel.org\u003e\nAcked-by: Catalin Marinas \u003cCatalin.Marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "868dbf905245a524496a0535982ed21ad3be5585", "tree": "685a1d7bbbd677a386d4b533404606a91341ab83", "parents": [ "eb50439b92b6298bf209a982f295ba9c0f7cb30b" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Jan 20 12:01:14 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:20:06 2012 +0000" }, "message": "ARM: 7295/1: cortex-a7: move proc_info out of !CONFIG_ARM_LPAE block\n\nThe merging of commits 1b6ba46b (\"ARM: LPAE: MMU setup for the 3-level\npage table format\") and b4244738 (\"ARM: 7202/1: Add Cortex-A7 proc info\")\nduring the merge window ended up putting the Cortex-A7 proc_info into a\ncode block guarded by !CONFIG_ARM_LPAE. This makes Cortex-A7 platforms\nunbootable when LPAE is enabled.\n\nThis patch moves the proc_info structure for Cortex-A7 outside of the\nguarded block.\n\nCc: Pawel Moll \u003cpawel.moll@arm.com\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a092f2b15399bb4d1aa4e83cffe775f0c946f323", "tree": "b32be39bb3823afbc01ad5f10774ec6a13c30934", "parents": [ "972da06470519b6eaef9776a586e2353f089de9c" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Fri Jan 20 12:01:10 2012 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Jan 23 10:20:05 2012 +0000" }, "message": "ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs\n\nTo ensure correct alignment of cacheline-aligned data, the maximum\ncacheline size needs to be known at compile time.\n\nSince Cortex-A8 and Cortex-A15 have 64-byte cachelines (and it is likely\nthat there will be future ARMv7 implementations with the same line size)\nthen it makes sense to assume that CPU_V7 implies a 64-byte L1 cacheline\nsize. For CPUs with smaller caches, this will result in some harmless\npadding but will help with single zImage work and avoid hitting subtle\nbugs with misaligned data structures.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3e175ca4cab37b1eb99f7cf032142a1e5cdb3d97", "tree": "75536a90f1854ee9fd7aad4d93b1b5b9939620e9", "parents": [ "dcd6c92267155e70a94b3927bce681ce74b80d1f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Sep 18 11:27:30 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 20 10:50:20 2012 +0000" }, "message": "ARM: cache-l2x0.c: consistently use u32\n\n__u32 exists to avoid namespace clashes with userspace programs. It\nshould not be used outside header files, so convert to use u32 instead.\nAlso, don\u0027t mix uint32_t and __u32 - use the same type throughout the\nfile for consistency.\n\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "bc2827d08cb31de5ab3a467a3e1572d8437340e6", "tree": "f75be9f88248090ef21b01c63f43d250b677f4c9", "parents": [ "7a28b5a25f212b5f17cc0c973d1b8baa16069dd5" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 19 14:35:19 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 19 17:26:29 2012 +0000" }, "message": "ARM: fix a section mismatch warning with our use of memblock\n\nCommit 716a3dc2008 (ARM: Add arm_memblock_steal() to allocate memory\naway from the kernel) added a function which calls memblock_alloc().\nThis causes a section conflict:\n\nWARNING: vmlinux.o(.text+0xc614): Section mismatch in reference from the function arm_memblock_steal() to the function .init.text:memblock_alloc()\nThe function arm_memblock_steal() references\nthe function __init memblock_alloc().\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "716a3dc20084da9b3ab17bd125005a5345e23e3b", "tree": "f7ba487050d33fc2913fdee81b384f5578ccb105", "parents": [ "4de3a8e101150feaefa1139611a50ff37467f33e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 13 15:00:51 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 13 15:02:35 2012 +0000" }, "message": "ARM: Add arm_memblock_steal() to allocate memory away from the kernel\n\nSeveral platforms are now using the memblock_alloc+memblock_free+\nmemblock_remove trick to obtain memory which won\u0027t be mapped in the\nkernel\u0027s page tables. Most platforms do this (correctly) in the\n-\u003ereserve callback. However, OMAP has started to call these functions\noutside of this callback, and this is extremely unsafe - memory will\nnot be unmapped, and could well be given out after memblock is no\nlonger responsible for its management.\n\nSo, provide arm_memblock_steal() to perform this function, and ensure\nthat it panic()s if it is used inappropriately. Convert everyone\nover, including OMAP.\n\nAs a result, OMAP with OMAP4_ERRATA_I688 enabled will panic on boot\nwith this change. Mark this option as BROKEN and make it depend on\nBROKEN. OMAP needs to be fixed, or 137d105d50 (ARM: OMAP4: Fix\nerrata i688 with MPU interconnect barriers.) reverted until such\ntime it can be fixed correctly.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "e343a895a9f342f239c5e3c5ffc6c0b1707e6244", "tree": "46c81c6ae375b1f14e209b13c8ac020842807ece", "parents": [ "06792c4dde2ad143928cc95c1ba218c6269c494b", "193a667fba76b3df482cbf865228e26ee246e889" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 10 18:04:27 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 10 18:04:27 2012 -0800" }, "message": "Merge tag \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost\n\nlib: use generic pci_iomap on all architectures\n\nMany architectures don\u0027t want to pull in iomap.c,\nso they ended up duplicating pci_iomap from that file.\nThat function isn\u0027t trivial, and we are going to modify it\nhttps://lkml.org/lkml/2011/11/14/183\nso the duplication hurts.\n\nThis reduces the scope of the problem significantly,\nby moving pci_iomap to a separate file and\nreferencing that from all architectures.\n\n* tag \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost:\n alpha: drop pci_iomap/pci_iounmap from pci-noop.c\n mn10300: switch to GENERIC_PCI_IOMAP\n mn10300: add missing __iomap markers\n frv: switch to GENERIC_PCI_IOMAP\n tile: switch to GENERIC_PCI_IOMAP\n tile: don\u0027t panic on iomap\n sparc: switch to GENERIC_PCI_IOMAP\n sh: switch to GENERIC_PCI_IOMAP\n powerpc: switch to GENERIC_PCI_IOMAP\n parisc: switch to GENERIC_PCI_IOMAP\n mips: switch to GENERIC_PCI_IOMAP\n microblaze: switch to GENERIC_PCI_IOMAP\n arm: switch to GENERIC_PCI_IOMAP\n alpha: switch to GENERIC_PCI_IOMAP\n lib: add GENERIC_PCI_IOMAP\n lib: move GENERIC_IOMAP to lib/Kconfig\n\nFix up trivial conflicts due to changes nearby in arch/{m68k,score}/Kconfig\n" }, { "commit": "770e1b035dcb6ec3f8ee69dda0815dd1e220a683", "tree": "e6d36abfdb053fbc722aea8d7e946d6d1b93c7e1", "parents": [ "d3d0b024348c040f0d6851e2e59fc961677d5169", "7b9dd47136c07ffd883aff6926c7b281e4c1eea4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 18:15:25 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 18:15:25 2012 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm\n\n* \u0027for-linus\u0027 of git://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (207 commits)\n ARM: 7267/1: Remove BUILD_BUG_ON from asm/bug.h\n ARM: 7269/1: mach-sa1100: fix sched_clock breakage\n ARM: 7198/1: arm/imx6: add restart support for imx6q\n ARM: restart: remove the now empty arch_reset()\n ARM: restart: remove comments about adding code to arch_reset()\n ARM: restart: lpc32xx \u0026 u300: remove unnecessary printk\n ARM: restart: plat-samsung: remove plat/reset.h and s5p_reset_hook\n ARM: restart: w90x900: use new restart hook\n ARM: restart: Versatile Express: use new restart hook\n ARM: restart: versatile: use new restart hook\n ARM: restart: u300: use new restart hook\n ARM: restart: tegra: use new restart hook\n ARM: restart: spear: use new restart hook\n ARM: restart: shark: use new restart hook\n ARM: restart: sa1100: use new restart hook\n ARM: 7252/1: restart: S5PV210: use new restart hook\n ARM: 7251/1: restart: S5PC100: use new restart hook\n ARM: 7250/1: restart: S5P64X0: use new restart hook\n ARM: 7266/1: restart: S3C64XX: use new restart hook\n ARM: 7265/1: restart: S3C24XX: use new restart hook\n ...\n\nFix up trivial conflict in arch/arm/mm/init.c due to removal of\nmemblock_init() clashing with the movement of the sorting of the meminfo\narray.\n" }, { "commit": "4a2164a7dbf0d3b6a1c2ef6f20c0d54350491a12", "tree": "1ef38a6a3b39f7e539fff848975a5672acc21f44", "parents": [ "15f043a65f655eb8a3aeb831a85da66de520c80f", "45aa0663cc408617b79a2b53f0a5f50e94688a48" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 07:54:53 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 07:54:53 2012 -0800" }, "message": "Merge branch \u0027core-memblock-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\n* \u0027core-memblock-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (52 commits)\n memblock: Reimplement memblock allocation using reverse free area iterator\n memblock: Kill early_node_map[]\n score: Use HAVE_MEMBLOCK_NODE_MAP\n s390: Use HAVE_MEMBLOCK_NODE_MAP\n mips: Use HAVE_MEMBLOCK_NODE_MAP\n ia64: Use HAVE_MEMBLOCK_NODE_MAP\n SuperH: Use HAVE_MEMBLOCK_NODE_MAP\n sparc: Use HAVE_MEMBLOCK_NODE_MAP\n powerpc: Use HAVE_MEMBLOCK_NODE_MAP\n memblock: Implement memblock_add_node()\n memblock: s/memblock_analyze()/memblock_allow_resize()/ and update users\n memblock: Track total size of regions automatically\n powerpc: Cleanup memblock usage\n memblock: Reimplement memblock_enforce_memory_limit() using __memblock_remove()\n memblock: Make memblock functions handle overflowing range @size\n memblock: Reimplement __memblock_remove() using memblock_isolate_range()\n memblock: Separate out memblock_isolate_range() from memblock_set_node()\n memblock: Kill memblock_init()\n memblock: Kill sentinel entries at the end of static region arrays\n memblock: Add __memblock_dump_all()\n ...\n" }, { "commit": "2e0e943436912ffe0848ece58167edfe754edb96", "tree": "b91919095c74742fa06e2105db6d859bee39b2b4", "parents": [ "a32737e1ca650504f172292dd344eb64c02311f3", "ef3a0bf5bfadbace156fa2a3b9c753df2de41df2" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:24:33 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:24:33 2012 +0000" }, "message": "Merge branch \u0027devel-stable\u0027 into for-linus\n\nConflicts:\n\tarch/arm/kernel/setup.c\n\tarch/arm/mach-shmobile/board-kota2.c\n" }, { "commit": "a32737e1ca650504f172292dd344eb64c02311f3", "tree": "7dd2004ece26081507af877d9dd40b1bd4eecc1a", "parents": [ "27edacac7d97d37ec77779c7da08345298a5d283", "a3c2b511a844641f6d0b60bd84cd6076143b3f2d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:24:16 2012 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Jan 05 13:24:16 2012 +0000" }, "message": "Merge branches \u0027fixes\u0027 and \u0027misc\u0027 into for-linus\n" }, { "commit": "ba90c516bae79b5f8184d915bfce7eb280af61b1", "tree": "a6f9c276ddab5bfd98a83eb264346e9db166df63", "parents": [ "e66dc7452af463ccd4360b1bb625c803e5327e3f" ], "author": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Thu Dec 08 13:41:06 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 23 22:34:48 2011 +0000" }, "message": "ARM: 7197/1: errata: Remove SMP dependency for erratum 751472\n\nActivation conditions for a workaround should not be encoded in the\nworkaround\u0027s direct dependencies if this makes otherwise reasonable\nconfiguration choices impossible.\n\nThis patches uses the SMP/UP patching facilities instead to compile\nout the workaround if the configuration means that it is definitely\nnot needed.\n\nThis means that configs for buggy silicon can simply select\nARM_ERRATA_751472, without preventing a UP kernel from being built\nor duplicatiing knowledge about when to activate the workaround.\nThis seems the correct way to do things, because the erratum is a\nproperty of the silicon, irrespective of what the kernel config\nhappens to be.\n\nSigned-off-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "45aa0663cc408617b79a2b53f0a5f50e94688a48", "tree": "0a53931c317c3c72a3555bd2fbb70a881ee870f2", "parents": [ "511585a28e5b5fd1cac61e601e42efc4c5dd64b5", "7bd0b0f0da3b1ec11cbcc798eb0ef747a1184077" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 20 12:14:26 2011 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Dec 20 12:14:26 2011 +0100" }, "message": "Merge branch \u0027memblock-kill-early_node_map\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/misc into core/memblock\n" }, { "commit": "df0bcfe0f811a73077c06f75e440397e89ba58a4", "tree": "0d59d32430f337acda23a18b2e0116a2b9dcd51f", "parents": [ "215e83d971a04f04d191c7f702943412a19408fd", "a2075a7aff5f469b91029c14f216dc169d1bd5f3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 19 21:54:35 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 19 21:54:35 2011 +0000" }, "message": "Merge branch \u0027arm/common-kconfig-refactor+for-rmk\u0027 of git://git.linaro.org/people/dmart/linux-2.6-arm into devel-stable\n" }, { "commit": "ce5ea9f3767e8589521319cae2eb6e05c52bd056", "tree": "29e08e74c3ecd3a6b8a4875d3e631b17ff456fef", "parents": [ "caca6a03d365883564885f2c1da3e88dcf65d139" ], "author": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Tue Nov 29 15:56:19 2011 +0000" }, "committer": { "name": "Dave Martin", "email": "dave.martin@linaro.org", "time": "Mon Dec 19 13:46:11 2011 +0000" }, "message": "ARM: l2x0/pl310: Refactor Kconfig to be more maintainable\n\nMaking CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs)\nis bothersome to maintain and likely to lead to merge conflicts.\n\nThis patch moves the knowledge of which platforms have a L2x0 or\nPL310 cache controller to the individual machines. To enable this,\na new MIGHT_HAVE_CACHE_L2X0 config option is introduced to allow\nmachines to indicate that they may have such a cache controller\nindependently of each other.\n\nBoards/SoCs which cannot reliably operate without the L2 cache\ncontroller support will need to select CACHE_L2X0 directly from\ntheir own Kconfigs instead. This applies to some TrustZone-enabled\nboards where Linux runs in the Normal World, for example.\n\nSigned-off-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nAcked-by: Anton Vorontsov \u003ccbouatmailru@gmail.com\u003e\n (for cns3xxx)\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\n (for omap)\nAcked-by: Shawn Guo \u003cshawn.guo@linaro.org\u003e\n (for imx)\nAcked-by: Kukjin Kim \u003ckgene.kim@samsung.com\u003e\n (for exynos)\nAcked-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n (for imx)\nAcked-by: Olof Johansson \u003colof@lixom.net\u003e\n (for tegra)\n" }, { "commit": "b4244738d20a631cd27fa105a2db71622618ab4e", "tree": "2c1d1bf8fffd252aad3288a6a8adbf934925fd7e", "parents": [ "786a767465b12cb4c1a45421b12fbf6bff45b0ea" ], "author": { "name": "Pawel Moll", "email": "pawel.moll@arm.com", "time": "Fri Dec 09 20:00:39 2011 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Dec 11 08:36:21 2011 +0000" }, "message": "ARM: 7202/1: Add Cortex-A7 proc info\n\nThis patch adds processor info for ARM Ltd. Cortex-A7.\n\nA7 is architecturally identical to A15 so it shares the\nsame SMP initialization code and hwcaps.\n\nTested-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Pawel Moll \u003cpawel.moll@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1aadc0560f46530f8a0f11055285b876a8a31770", "tree": "9d57dbe134894d4f8d20cfd246ac9457af65b271", "parents": [ "1440c4e2c918532f39131c3330fe2226e16be7b6" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:08 2011 -0800" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:08 2011 -0800" }, "message": "memblock: s/memblock_analyze()/memblock_allow_resize()/ and update users\n\nThe only function of memblock_analyze() is now allowing resize of\nmemblock region arrays. Rename it to memblock_allow_resize() and\nupdate its users.\n\n* The following users remain the same other than renaming.\n\n arm/mm/init.c::arm_memblock_init()\n microblaze/kernel/prom.c::early_init_devtree()\n powerpc/kernel/prom.c::early_init_devtree()\n openrisc/kernel/prom.c::early_init_devtree()\n sh/mm/init.c::paging_init()\n sparc/mm/init_64.c::paging_init()\n unicore32/mm/init.c::uc32_memblock_init()\n\n* In the following users, analyze was used to update total size which\n is no longer necessary.\n\n powerpc/kernel/machine_kexec.c::reserve_crashkernel()\n powerpc/kernel/prom.c::early_init_devtree()\n powerpc/mm/init_32.c::MMU_init()\n powerpc/mm/tlb_nohash.c::__early_init_mmu() \n powerpc/platforms/ps3/mm.c::ps3_mm_add_memory()\n powerpc/platforms/embedded6xx/wii.c::wii_memory_fixups()\n sh/kernel/machine_kexec.c::reserve_crashkernel()\n\n* x86/kernel/e820.c::memblock_x86_fill() was directly setting\n memblock_can_resize before populating memblock and calling analyze\n afterwards. Call memblock_allow_resize() before start populating.\n\nmemblock_can_resize is now static inside memblock.c.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Guan Xuetao \u003cgxt@mprc.pku.edu.cn\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\n" }, { "commit": "fe091c208a40299fba40e62292a610fb91e44b4e", "tree": "72bf673f05a736cbf3555a4dcf428b95840fc9f7", "parents": [ "c5a1cb284b791fcc3c70962331a682452afaf6cd" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:07 2011 -0800" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:07 2011 -0800" }, "message": "memblock: Kill memblock_init()\n\nmemblock_init() initializes arrays for regions and memblock itself;\nhowever, all these can be done with struct initializers and\nmemblock_init() can be removed. This patch kills memblock_init() and\ninitializes memblock with struct initializer.\n\nThe only difference is that the first dummy entries don\u0027t have .nid\nset to MAX_NUMNODES initially. This doesn\u0027t cause any behavior\ndifference.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Guan Xuetao \u003cgxt@mprc.pku.edu.cn\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\n" }, { "commit": "1c16d242aa441c11ccaeaa63b49712555b8bfaeb", "tree": "ff8332060f3d800abbabbfe63a942e0ef6d93d33", "parents": [ "d4bbf7e7759afc172e2bfbc5c416324590049cdd" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:06 2011 -0800" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Dec 08 10:22:06 2011 -0800" }, "message": "memblock: Fix include breakages caused by 24aa07882b\n\n24aa07882b (memblock, x86: Replace memblock_x86_reserve/free_range()\nwith generic ones) removed arch/x86/include/asm/memblock.h and dropped\nits inclusion from include/linux/memblock.h which breaks other\narchitectures which depended on the generic memblock.h pulling in the\narch specific one.\n\nHowever, the proper fix isn\u0027t adding back the asm inclusion. memblock\ndoesn\u0027t have any arch dependent part and doesn\u0027t need arch specific\nheader file and asm/memblock.h files are either practically empty or\ncontain mostly unrelated arch specific stuff.\n\n* In microblaze, sh, powerpc, sparc and openrisc, asm/memblock.h is\n either empty or just contains unused MEMBLOCK_DBG() macro. Remove\n them.\n\n* In arm and unicore32, asm/memblock.h contains arch specific stuff.\n Include it directly from its users. It might be a good idea to\n rename the header file to avoid confusion.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nReported-by: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: Michal Simek \u003cmonstr@monstr.eu\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Guan Xuetao \u003cgxt@mprc.pku.edu.cn\u003e\n" }, { "commit": "6ae25a5b9d7ba86d6ac19c403dfa57dae6caa73d", "tree": "41d04269f268d6162e5f1866496dd42fbc79d2a4", "parents": [ "3ee0fc5ca129cbae81c073756febcb1c552af446", "497b7e943d0dc5743454de56dcdb67352bbf96b2" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 08 18:02:04 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 08 18:02:04 2011 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable\n\nConflicts:\n\tarch/arm/mm/ioremap.c\n" }, { "commit": "497b7e943d0dc5743454de56dcdb67352bbf96b2", "tree": "7c8b85aef41299cd50f4c3740ab89800f10f79ae", "parents": [ "77f73a2c8e869b035e71eea5cae07c30fe4bded0" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:32 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:33:29 2011 +0000" }, "message": "ARM: LPAE: Add the Kconfig entries\n\nThis patch adds the ARM_LPAE and ARCH_PHYS_ADDR_T_64BIT Kconfig entries\nallowing LPAE support to be compiled into the kernel.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "77f73a2c8e869b035e71eea5cae07c30fe4bded0", "tree": "2f7f3488ecd409d872dc427e8050f97fc8fe5f27", "parents": [ "ae2de101739c5a2a43a23a74a0d43aea810fb5a8" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Nov 22 17:30:32 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:33:28 2011 +0000" }, "message": "ARM: LPAE: mark memory banks with start \u003e ULONG_MAX as highmem\n\nMemory banks living outside of the 32-bit physical address\nspace do not have a 1:1 pa \u003c-\u003e va mapping and therefore the\n__va macro may wrap.\n\nThis patch ensures that such banks are marked as highmem so\nthat the Kernel doesn\u0027t try to split them up when it sees that\nthe wrapped virtual address overlaps the vmalloc space.\n\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nAcked-by: Nicolas Pitre \u003cnico@linaro.org\u003e\n" }, { "commit": "ae2de101739c5a2a43a23a74a0d43aea810fb5a8", "tree": "a61f4305ab65d17b3f99004d8e5ad62b4ac2f5bd", "parents": [ "14d8c9512aef5bf25c017d1b331de51c7928c5d4" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:32 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:33:28 2011 +0000" }, "message": "ARM: LPAE: Add identity mapping support for the 3-level page table format\n\nWith LPAE, the pgd is a separate page table with entries pointing to the\npmd. The identity_mapping_add() function needs to ensure that the pgd is\npopulated before populating the pmd level. The do..while blocks now loop\nover the pmd in order to have the same implementation for the two page\ntable formats. The pmd_addr_end() definition has been removed and the\ngeneric one used instead. The pmd clean-up is done in the pgd_free()\nfunction.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "14d8c9512aef5bf25c017d1b331de51c7928c5d4", "tree": "d1d456e544b850a412f6f6350a6a4b5cb7164c2e", "parents": [ "f7b8156d150f7383b42622a9219b230b36435b4a" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:31 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:40 2011 +0000" }, "message": "ARM: LPAE: Add context switching support\n\nWith LPAE, TTBRx registers are 64-bit. The ASID is stored in TTBR0\nrather than a separate Context ID register. This patch makes the\nnecessary changes to handle context switching on LPAE.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "f7b8156d150f7383b42622a9219b230b36435b4a", "tree": "c06e0ed558f7a9e106920a9f3acbb6bed15017bf", "parents": [ "c9f27f1026f55b543df260ad8ab84a7bdab7792f" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:31 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:40 2011 +0000" }, "message": "ARM: LPAE: Add fault handling support\n\nThe DFSR and IFSR register format is different when LPAE is enabled. In\naddition, DFSR and IFSR have similar definitions for the fault type.\nThis modifies the fault code to correctly handle the new format.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "1b6ba46b7efa31055eb993a6f2c6bbcb8b35b001", "tree": "b04e3b1fd23ba81a643f64cba113551d127111a0", "parents": [ "da02877987e6e173ebba137d4e1e155e1f1151cd" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:29 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:39 2011 +0000" }, "message": "ARM: LPAE: MMU setup for the 3-level page table format\n\nThis patch adds the MMU initialisation for the LPAE page table format.\nThe swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new\nproc-v7-3level.S file contains the TTB initialisation, context switch\nand PTE setting code with the LPAE. The TTBRx split is based on the\nPAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit mappings\n(supersections) and a few other memory types in mmu.c are conditionally\ncompiled.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "da02877987e6e173ebba137d4e1e155e1f1151cd", "tree": "8035bb1fb7def068ed2fd13d5d11ec5857c7d338", "parents": [ "dcfdae04bd92e8a2ea155db0e21e3bddc09e0a89" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:29 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:39 2011 +0000" }, "message": "ARM: LPAE: Page table maintenance for the 3-level format\n\nThis patch modifies the pgd/pmd/pte manipulation functions to support\nthe 3-level page table format. Since there is no need for an \u0027ext\u0027\nargument to cpu_set_pte_ext(), this patch conditionally defines a\ndifferent prototype for this function when CONFIG_ARM_LPAE.\n\nThe patch also introduces the L_PGD_SWAPPER flag to mark pgd entries\npointing to pmd tables pre-allocated in the swapper_pg_dir and avoid\ntrying to free them at run-time. This flag is 0 with the classic page\ntable format.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "8d2cd3a38fd663bd341507f5ac29002ffd81d986", "tree": "9205cf509841c64af8de8bbedceece8524e80d36", "parents": [ "136848d4ca9cf6f08edf6e50cb9bbe19de55c32a" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:28 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:37 2011 +0000" }, "message": "ARM: LPAE: Factor out classic-MMU specific code into proc-v7-2level.S\n\nThis patch modifies the proc-v7.S file so that it only contains code\nshared between classic MMU and LPAE. The non-common code is factored out\ninto a separate file.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "136848d4ca9cf6f08edf6e50cb9bbe19de55c32a", "tree": "9b4b311b64f40afb2028db988710f3500e3995cf", "parents": [ "e0c0313bd720977a7ed01dc48f0762a3ddec607f" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:28 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:37 2011 +0000" }, "message": "ARM: LPAE: Move the FSR definitions to separate files\n\nThe FSR structure is different with LPAE and this patch moves the\nclassic MMU specific definition to a separate fsr-2level.c file that is\nincluded in fault.c. It also moves the fsr_fs and FSR bits to the\nfault.h file.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "03a6b8274cc61fb9bb77aaa102e63840461c5f3a", "tree": "9d64db13ff38f31b50a69f2169828c34ac6a3b21", "parents": [ "4e8ee7de227e3ab9a72040b448ad728c5428a042" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 22 17:30:27 2011 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Thu Dec 08 10:30:36 2011 +0000" }, "message": "ARM: pgtable: Fix compiler warning in ioremap.c introduced by nopud\n\nWith the arch/arm code conversion to pgtable-nopud.h, the section and\nsupersection (un|re)map code triggers compiler warnings on UP systems.\nThis is caused by pmd_offset() being given a pgd_t argument rather than\na pud_t one. This patch makes the necessary conversion with the\nassumption that the pud is folded into the pgd. The page table setting\ncode only loops over the pmd which is enough with the classic page\ntables. This code is not compiled when LPAE is enabled.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "3ee0fc5ca129cbae81c073756febcb1c552af446", "tree": "08f061c1ec9e948df760a0746441bec9f290d774", "parents": [ "deee6d5359969a0ce4e2760cfd7b9f379bd5698a", "4e8ee7de227e3ab9a72040b448ad728c5428a042" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 06 20:27:54 2011 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 06 20:27:54 2011 +0000" }, "message": "Merge branch \u0027kexec/idmap\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable\n" }, { "commit": "4e8ee7de227e3ab9a72040b448ad728c5428a042", "tree": "ffaf8492fd359d3281a55ff6e751504e905cc27c", "parents": [ "72662e01088394577be4a3f14da94cf87bea2591" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Nov 23 12:26:25 2011 +0000" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Dec 06 14:04:15 2011 +0000" }, "message": "ARM: SMP: use idmap_pgd for mapping MMU enable during secondary booting\n\nThe ARM SMP booting code allocates a temporary set of page tables\ncontaining an identity mapping of the kernel image and provides this\nto secondary CPUs for initial booting.\n\nIn reality, we only need to include the __turn_mmu_on function in the\nidentity mapping since the rest of the kernel is executing from virtual\naddresses after this point.\n\nThis patch adds __turn_mmu_on to the .idmap.text section, allowing the\nSMP booting code to use the idmap_pgd directly and not have to populate\nits own set of page table.\n\nAs a result of this patch, we can make the identity_mapping_add function\nstatic (since it is only used within mm/idmap.c) and also remove the\nidentity_mapping_del function. The identity map population is moved to\nan early initcall so that it is setup in time for secondary CPU bringup.\n\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" }, { "commit": "2c8951ab0c337cb198236df07ad55f9dd4892c26", "tree": "cfbc338f1d2b9642af2036dffd9fbf76024d2732", "parents": [ "1a4baafa7d203da1cceb302c2df38f0fea1c17a1" ], "author": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Wed Jun 08 15:53:34 2011 +0100" }, "committer": { "name": "Will Deacon", "email": "will.deacon@arm.com", "time": "Tue Dec 06 14:04:15 2011 +0000" }, "message": "ARM: idmap: use idmap_pgd when setting up mm for reboot\n\nFor soft-rebooting a system, it is necessary to map the MMU-off code\nwith an identity mapping so that execution can continue safely once the\nMMU has been switched off.\n\nCurrently, switch_mm_for_reboot takes out a 1:1 mapping from 0x0 to\nTASK_SIZE during reboot in the hope that the reset code lives at a\nphysical address corresponding to a userspace virtual address.\n\nThis patch modifies the code so that we switch to the idmap_pgd tables,\nwhich contain a 1:1 mapping of the cpu_reset code. This has the\nadvantage of only remapping the code that we need and also means we\ndon\u0027t need to worry about allocating a pgd from an atomic context in the\ncase that the physical address of the cpu_reset code aliases with the\nvirtual space used by the kernel.\n\nAcked-by: Dave Martin \u003cdave.martin@linaro.org\u003e\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n" } ], "next": "1a4baafa7d203da1cceb302c2df38f0fea1c17a1" }