)]}' { "log": [ { "commit": "9598111f49ade848aa44f431ee81a42a000c8b3c", "tree": "cdc3e6c1172ca8363332a63fad47d604bc1923e2", "parents": [ "ec9502599cd837c8e4e279585817d1ffb1249126" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 20:39:35 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:11 2012 +0200" }, "message": "MIPS: ath79: add initial support for the Atheros DB120 board\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3517/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "ec9502599cd837c8e4e279585817d1ffb1249126", "tree": "c650946f4508c942cdb03f12a0f9949509199d46", "parents": [ "67644c547fef2739f49c80e5eb1ace82f3e916e2" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:30 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:11 2012 +0200" }, "message": "MIPS: ath79: add PCI registration code for AR934X\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3516/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "67644c547fef2739f49c80e5eb1ace82f3e916e2", "tree": "041180fc9457a4125b3ae36477055f98cfb8587d", "parents": [ "574d6e70ea25a8d5dd4b77464ae7314d40f1caf2" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:29 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:11 2012 +0200" }, "message": "MIPS: ath79: add PCI_AR724X Kconfig symbol\n\nThe AR724X specific PCI code can be used for the\nAR934X SoCs, however it can be selected only if\nSOC_AR724X is set.\n\nIntroduce a new Kconfig symbol in order to be able\nto use the code for AR934X as well.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3514/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "574d6e70ea25a8d5dd4b77464ae7314d40f1caf2", "tree": "1dac845bb3d649a63bfb5b0bf79ae24d95b8e6c7", "parents": [ "9800bdc797b12835e1e36ebe8b82874c606bc11d" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:28 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:10 2012 +0200" }, "message": "MIPS: ath79: add WMAC registration code for AR934X\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3513/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "9800bdc797b12835e1e36ebe8b82874c606bc11d", "tree": "ff07dd8e6276931f984d53c080bd774de257073f", "parents": [ "42184768b36b2dad88a3705d689891b5da884c85" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:27 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:10 2012 +0200" }, "message": "MIPS: ath79: register UART device for AR934X SoCs\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3512/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "42184768b36b2dad88a3705d689891b5da884c85", "tree": "ba40b74465509b34d6358806a67f33add92a9e94", "parents": [ "fce5cc6e0ddc601e504063548034766c5c5a78d1" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:26 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:09 2012 +0200" }, "message": "MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3511/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "fce5cc6e0ddc601e504063548034766c5c5a78d1", "tree": "7cd6498b983f4f8efb22070b22c77f9afb2388f9", "parents": [ "4dbcbdf8135def8f704b130305721bdd42a8078b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:25 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:09 2012 +0200" }, "message": "MIPS: ath79: add IRQ handling code for AR934X\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3510/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4dbcbdf8135def8f704b130305721bdd42a8078b", "tree": "f6b8dec7781a7ece62f55af354ba6f5e49d37fdb", "parents": [ "5b5b544ed32a1b6ad4d7706fcee530eb67670e71" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:24 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:08 2012 +0200" }, "message": "MIPS: ath79: rework IP2/IP3 interrupt handling\n\nThe current implementation assumes that flushing the\nDDR writeback buffer is required for IP2/IP3 interrupts,\nhowever this is not true for all SoCs.\n\nUse SoC specific IP2/IP3 handlers instead of flushing\nthe buffers in the dispatcher code.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3509/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "5b5b544ed32a1b6ad4d7706fcee530eb67670e71", "tree": "86d3e2b416d7e28492eff2254b065a78a2fbb8cb", "parents": [ "8889612b3e2054617219581ae10dbe33cf3bddfe" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:23 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:08 2012 +0200" }, "message": "MIPS: ath79: add GPIO support code for AR934X\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3508/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "8889612b3e2054617219581ae10dbe33cf3bddfe", "tree": "c1bc35777092773857c5eeca53630897aeb1ae16", "parents": [ "d84114660a65e89e27ebd3fb21ce71ff579ee882" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:22 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:08 2012 +0200" }, "message": "MIPS: ath79: add clock initialization code for AR934X\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3507/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d84114660a65e89e27ebd3fb21ce71ff579ee882", "tree": "e73cace8d697ad2ad9304630414389c36fd18d29", "parents": [ "80a7ed81a840aee97f7650cbeaabb3c2c1765e70" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:21 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:07 2012 +0200" }, "message": "MIPS: ath79: add SoC detection code for AR934X\n\nAlso add \u0027soc_is_ar934[124x]\u0027 helper functions and a Kconfig\nsymbol for the AR934X SoCs.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3506/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "80a7ed81a840aee97f7650cbeaabb3c2c1765e70", "tree": "0a00c9b52fb1936d425238aa3aef17dda65e991b", "parents": [ "703327ddcc736a054f4e2c132235a8370d2f7870" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:20 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:07 2012 +0200" }, "message": "MIPS: ath79: sort case statements in ath79_detect_sys_type\n\nSort the case statements alphabetically in order to improve\nreadability.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3505/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "703327ddcc736a054f4e2c132235a8370d2f7870", "tree": "2c7f616a4bbb04eeb55a5895f8e9da99ba357606", "parents": [ "e9b62e8ef9d71ed977797529fc0dfc352448d50b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:45:19 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:07 2012 +0200" }, "message": "MIPS: ath79: add early_printk support for AR934X\n\nThe patch allows to see kernel messages on AR934X SoCs in\nearly boot stage.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: Luis R. Rodriguez \u003cmcgrof@qca.qualcomm.com\u003e\nCc: linux-mips@linux-mips.org\nCc: mcgrof@infradead.org\nPatchwork: https://patchwork.linux-mips.org/patch/3504/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e9b62e8ef9d71ed977797529fc0dfc352448d50b", "tree": "481732793c836517a854e50856214d50c60932c4", "parents": [ "1f3a92de2a5081077799a51f39b1010ed0492264" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:14 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:07 2012 +0200" }, "message": "MIPS: ath79: update copyright headers of PCI related files\n\nAdd copyright records according to the recent changes in\nthe PCI code. Also fix up the descriptions.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3503/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1f3a92de2a5081077799a51f39b1010ed0492264", "tree": "40f87868826968db3fece53d8490ae634af92333", "parents": [ "52c28be371e33b99700811dbed009913b854c44d" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:13 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:06 2012 +0200" }, "message": "MIPS: ath79: register PCI controller on the PB44 board\n\nThe PB44 reference board has two miniPCI slots. Register\nthe PCI controller to make those usable.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3502/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "52c28be371e33b99700811dbed009913b854c44d", "tree": "ef530385cc70170d37d8278f7ad7f7385dffafe7", "parents": [ "d22ce25f870dff2521d352e20d0fd2a7598fbf87" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:12 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:06 2012 +0200" }, "message": "MIPS: ath79: remove ar724x_pci_add_data function\n\nThe variables set by this function are not used anymore.\nRemove the function and the relevant variables as well.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3501/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d22ce25f870dff2521d352e20d0fd2a7598fbf87", "tree": "1cff72b64ddf1a612d5b6096914ed3d086b774b2", "parents": [ "f8365ec4e1b945f70a86e9514dd67ba5f9f2915b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:11 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:06 2012 +0200" }, "message": "MIPS: ath79: allow to use SoC specific PCI IRQ maps\n\nThe PCI controllers in the AR71XX and in the\nAR724X SoCs are different, and both of them\nuses different IRQ wiring.\n\nThe patch modifies the \u0027pcibios_map_irq\u0027 function\nin order to allow to use different IRQ maps for\nthe different SoCs. The patch also adds a function,\nwhich lets the board setup code to override the\ndefault IRQ map.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3500/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f8365ec4e1b945f70a86e9514dd67ba5f9f2915b", "tree": "4a2c60a5201b7dcba14dca32d47560919093cf0b", "parents": [ "a68ad4d892c6254310d2bfc3d6b0c0d989377636" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:10 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:05 2012 +0200" }, "message": "MIPS: ath79: add support for the PCI host controller of the AR71XX SoCs\n\nThe Atheros AR71XX SoCs have a built-in PCI Host Controller.\nThis patch adds a driver for that, and modifies the relevant\nfiles in order to allow to register the PCI controller from\nboard specific setup.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3498/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "a68ad4d892c6254310d2bfc3d6b0c0d989377636", "tree": "28e30e1a250a2dc2e90b3ec2751e9f7d1879e440", "parents": [ "881b6ef0cca3395ac0171472a1ce768fede7535b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:09 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:05 2012 +0200" }, "message": "MIPS: ath79: allow to use board specific pci_plat_dev_init functions\n\nTh current implementation causes NULL pointer dereference\nif \u0027pci_data\u0027 is not set:\n\npci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1000ffff 64bit]\npci 0000:00:00.0: BAR 0: set to [mem 0x10000000-0x1000ffff 64bit] (PCI\naddress [0x10000000-0x1000ffff])\nCPU 0 Unable to handle kernel paging request at virtual address 00000000, epc \u003d\u003d 802daca0, ra \u003d\u003d 802e78a4\nOops[#1]:\nCpu 0\n$ 0 : 00000000 80420000 00000000 00000000\n$ 4 : 00000000 00000000 00000001 00000001\n$ 8 : 00000001 0000032c 81c54700 00000001\n$12 : 0000032d 0000000f 00000000 ffffffff\n$16 : 81c14c00 00000001 802dac74 80195f98\n$20 : 802ea050 00000000 00000000 00000000\n$24 : 00000003 800617f0\n$28 : 81c20000 81c21e70 00000000 802e78a4\nHi : 00000000\nLo : 4190ab00\nepc : 802daca0 0x802daca0\n Not tainted\nra : 802e78a4 0x802e78a4\nStatus: 1000c003 KERNEL EXL IE\nCause : 00800008\nBadVA : 00000000\nPrId : 00019374 (MIPS 24Kc)\nModules linked in:\nProcess swapper (pid: 1, threadinfo\u003d81c20000, task\u003d81c18000, tls\u003d00000000)\nStack : 00000000 8027d5d8 802e8ae0 00000000 01000000 802e8b5c 81c50600 00000000\n 802ff290 00000000 80420000 802ea0bc 00000000 00000000 80420000 802ff290\n 80420000 80060930 33390000 00000000 00002308 80140a80 00000028 802d0000\n 00000000 800ba024 802ff004 802ff0c8 802ff290 00000000 00000000 00000000\n 00000000 802d897c 01234567 7f827068 00000000 0045f798 00460000 00000000\n\nThis can be avoided by calling the \u0027ar724x_pci_add_data\u0027\nfunction from the board specific setup code. However it\nmakes no sense to use that function for every board,\nespecially when the board does not needs to set the\nplatform_data field of any PCI device.\n\nThe patch allows the board setup code to specify a board\nspecific function if that is required.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3499/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "881b6ef0cca3395ac0171472a1ce768fede7535b", "tree": "a59dabc68964b8e2a5edd147b7999f1c8fe64ea9", "parents": [ "4c07c7dfa0f3575dc3276c544349fbf181381167" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:08 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:04 2012 +0200" }, "message": "MIPS: ath79: get rid of some ifdefs in mach-ubnt-xm.c\n\nRemove a superfluous ifdef around an include. Also\nreorganize the board setup code a bit, so another\nifdef can be removed.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3497/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4c07c7dfa0f3575dc3276c544349fbf181381167", "tree": "4b39750ce1284ec0032b21508fa56a8201a7dea1", "parents": [ "93ef85b5598ad2cc23f38d97ed565027b969c0aa" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:07 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:04 2012 +0200" }, "message": "MIPS: ath79: add PCI IRQ handling code for AR724X SoCs\n\nThe PCI Host Controller of the AR724x SoC has a\nbuilt-in IRQ controller. The current code does\nnot supports that, so the IRQ lines wired to this\ncontroller are not usable. This leads to failed\n\u0027request_irq\u0027 calls:\n\n ath9k 0000:00:00.0: request_irq failed\n ath9k: probe of 0000:00:00.0 failed with error -89\n\nThis patch adds support for the IRQ controller\nin order to make PCI IRQs work.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3496/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "93ef85b5598ad2cc23f38d97ed565027b969c0aa", "tree": "d8d0744cd0f50d5b753396196bc0329fac211966", "parents": [ "6015a856f16ccf33e9f83643d04c2e15be2384eb" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:36:06 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:03 2012 +0200" }, "message": "MIPS: ath79: fix a wrong IRQ number\n\nThe Ubiquiti XM board setup code uses an invalid\nIRQ number, because it if above of NR_IRQS. This\nleads to failed \u0027request_irq\u0027 calls:\n\n ath9k 0000:00:00.0: request_irq failed\n ath9k: probe of 0000:00:00.0 failed with error -22\n\nPreserve some IRQ numbers for the built-in IRQ\ncontroller of PCI host controllers in the\nAR71XX/AR724X SoCs, and use the correct IRQ\nnumber in the board setup code.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3495/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d624bd3cf7835612b25b9ec8db4002624c2dbb32", "tree": "64615a0cf44f613cd99e399257cb873c7c9c7eb1", "parents": [ "692183ef12c4ba9dcdc9a54065ca92072cd79493" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:29:26 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:02 2012 +0200" }, "message": "MIPS: ath79: replace ath724x to ar724x\n\nReplace the \u0027ath724x\u0027 to \u0027ar724x\u0027 in function, variable and\nstructure names to reflect the name of the real SoC.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: René Bolldorf \u003cxsecute@googlemail.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3490/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "6335aef59c55f50e6d8017a28c0ee985b533ea29", "tree": "a1014ca9517a7df6e51f1f709b6b0f033a105b58", "parents": [ "659243ccaf296ae122c159d4c573f93561e1b8d6" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:29:24 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:01 2012 +0200" }, "message": "MIPS: ath79: add a common PCI registration function\n\nThe current code unconditionally registers the AR724X\nspecific PCI controller, even if the kernel is running\non a different SoC.\n\nAdd a common function for PCI controller registration,\nand only register the AR724X PCI controller if the kernel\nis running on an AR724X SoC.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3488/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3a6208df8eb97e01fd8510762dd59dce375dd14d", "tree": "009c85590f9ca79d67d626b2d638b79d717ffdd0", "parents": [ "e2dbdc436b46250c8682ea57151a7afb45f271e1" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:29:22 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:01 2012 +0200" }, "message": "MIPS: ath79: rename pci-ath724x.h\n\nThe declared function in this header file is used by the\nath79 platform code only. Move the header to the platform\ndirectory.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: René Bolldorf \u003cxsecute@googlemail.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3486/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e2dbdc436b46250c8682ea57151a7afb45f271e1", "tree": "209d66461e92a9af7f46817ac63cdd6ca26ab1da", "parents": [ "97bf7a190082457f84467b28baed14c8147476f2" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:29:21 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:00 2012 +0200" }, "message": "MIPS: ath79: separate common PCI code\n\nThe \u0027pcibios_map_irq\u0027 and \u0027pcibios_plat_dev_init\u0027\nare common functions and only instance one of them\ncan be present in a single kernel.\n\nCurrently these functions can be built only if the\nCONFIG_SOC_AR724X option is selected. However the\nath79 platform contain support for the AR71XX SoCs,.\nThe AR71XX SoCs have a differnet PCI controller,\nand those will require a different code.\n\nMove the common PCI code into a separeate file in\norder to be able to use that with other SoCs as\nwell.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nAcked-by: René Bolldorf \u003cxsecute@googlemail.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3485/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "97bf7a190082457f84467b28baed14c8147476f2", "tree": "0b825f7a9d29b1bdcdc1a64ebd02ca945f1147d5", "parents": [ "36be50515fe2aef61533b516fa2576a2c7fe7664" ], "author": { "name": "Thomas Meyer", "email": "thomas@m3y3r.de", "time": "Wed Mar 14 10:28:36 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 15 17:49:00 2012 +0200" }, "message": "MIPS: ath79: Use kmemdup rather than duplicating its implementation\n\nThe semantic patch that makes this change is available\nin scripts/coccinelle/api/memdup.cocci.\n\nSigned-off-by: Thomas Meyer \u003cthomas@m3y3r.de\u003e\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3483/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "de14ca6ae2c592d66db88f1e5596b26f7f011384", "tree": "e5872b70e9a112c2f2591b22f81520e6bd48d189", "parents": [ "05c8be02a98344148529441b28c0a8ce931dd6a8" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Mar 14 10:28:35 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 27 15:18:30 2012 +0100" }, "message": "MIPS: ath79: fix AR933X WMAC reset code\n\nThe current code puts the built-in WMAC device of the\nAR933X SoCs into reset instead of starting it. This\ncauses a hard lock on AR933X based boards when the\nwireless driver tries to access the device.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: stable@vger.kernel.org\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3484/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "5d98cd4e1df9587963ade40ef29bef604fb3920a", "tree": "9a7bf0da2755dd2dff845d58be1ca4cf8a1d9c7f", "parents": [ "7a7a4a592f42d9abf3b6cc40620b3f79fef49246" ], "author": { "name": "Hauke Mehrtens", "email": "hauke@hauke-m.de", "time": "Tue Mar 13 01:04:53 2012 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@linuxfoundation.org", "time": "Thu Mar 15 12:45:43 2012 -0700" }, "message": "USB: use generic platform driver on ath79\n\nThe ath79 usb driver doesn\u0027t do anything special and is now converted\nto the generic ehci and ohci driver.\nThis was tested on a TP-Link TL-WR1043ND (AR9132)\n\nAcked-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCC: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCC: linux-mips@linux-mips.org\nCC: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Hauke Mehrtens \u003chauke@hauke-m.de\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@linuxfoundation.org\u003e\n" }, { "commit": "87b43457f896975ba2aca1a611c018b3429a7b19", "tree": "16e60b58305d10860ad50c67000021366da41dd5", "parents": [ "f79eaeb108499e10fa604103737e7273404e76a4" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Sun Dec 11 16:11:41 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Feb 20 18:33:19 2012 +0100" }, "message": "MIPS: ATH79: Avoid a kernel bug on AR913X\n\nWireless mac registration causes a BUG on AR913X SoCs due to\na missing \u0027else\u0027.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3182/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7bf6612e8a9d6a0b3b82e8e2611942be1258b307", "tree": "5bc1e695e6f2d95cb49cbb8b47e89274eb8b13c7", "parents": [ "7a5c3b8c5c27211846efe7029a3d2ee7087425e3", "f77138e8d53a7a4a539f8d931107991d91727afd", "b606d5ae905f5e560021298307ab7b9ef69a60f1", "b15a6d62b5482966d0605e24c728bea8f7f876eb", "df0ac8a406718360aa08e632a73a805a6cc4cb27", "876f1166189bcb9493e02a35fd38d143e1b26eee", "d7a887a73dec6c387b02a966a71aac767bbd9ce6", "6457a396bbc20656009eaf950ca165912a943520", "5611cc4572e889b62a7b4c72a413536bf6a9c416", "ff5d7265cfb88e8f8943a55afde90255fc5deacb", "b3ea581834c1e36cc76589e63dedcd99fd6abf51" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:42:31 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:42:31 2012 +0100" }, "message": "Merge branches \u0027next/ar7\u0027, \u0027next/ath79\u0027, \u0027next/bcm63xx\u0027, \u0027next/bmips\u0027, \u0027next/cavium\u0027, \u0027next/generic\u0027, \u0027next/kprobes\u0027, \u0027next/lantiq\u0027, \u0027next/perf\u0027 and \u0027next/raza\u0027 into mips-for-linux-next\n" }, { "commit": "b606d5ae905f5e560021298307ab7b9ef69a60f1", "tree": "2a6214c8d75a150e35b4b9965d4ff532d927730c", "parents": [ "009b9d52e5bdd4b79ae214db10afb677998b33b1" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Fri Nov 18 00:17:54 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:48 2011 +0000" }, "message": "MIPS: ath79: Rename dev-ar913x-wmac.c to dev-wmac.c\n\nRename the file as a last step of the \u0027ar913x\u0027 removal changes.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3034/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "009b9d52e5bdd4b79ae214db10afb677998b33b1", "tree": "861dbb37510ea7b56481a57ddf939d443399aa8c", "parents": [ "0b0db270b8695f0a0ca87f273a8214fd9f6773de" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Fri Nov 18 00:17:54 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:48 2011 +0000" }, "message": "MIPS: ath79: Rename dev-ar913x-wmac.h to dev-wmac.h\n\nThe \u0027ar913x\u0027 part was removed from the common variable and function names,\nso remove that from the relevant header file name as well.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3033/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "0b0db270b8695f0a0ca87f273a8214fd9f6773de", "tree": "befefcba605f46550e6232f80776b82524f44d31", "parents": [ "3ae400223121ffb7d5b6f8299b6d18059a8fd038" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Fri Nov 18 00:17:54 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:48 2011 +0000" }, "message": "MIPS: ath79: Register the wireless MAC device on the AP121 board\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3032/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3ae400223121ffb7d5b6f8299b6d18059a8fd038", "tree": "c7e1f4f679b3bd38778ea402b1f97c81564b8f00", "parents": [ "34cfcd26bd34884e9bcbbfae4f87b36e42931c30" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Fri Nov 18 00:17:54 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:48 2011 +0000" }, "message": "MIPS: ath79: Rename ATH79_DEV_AR913X_WMAC option to ATH79_DEV_WMAC\n\nThe ATH79_DEV_AR913X_WMAC option was used to select the AR913x specific\nwireless MAC registration code. The registration code now supports the\nAR933X SoCs as well. Rename the option to reflect the changes.\n\nAlso make the new option depends on SOC_AR933X.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3031/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "34cfcd26bd34884e9bcbbfae4f87b36e42931c30", "tree": "45cf0ceb5001f50a4933b04527d3c42235a27ff8", "parents": [ "6903bb49da18e0bf3e2909e6b1342ee9a26b78ff" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Fri Nov 18 00:17:53 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:48 2011 +0000" }, "message": "MIPS: ath79: Add AR933x specific WMAC setup code\n\nThe wireless MAC of the AR933x SoCs uses different base address, and\nrequires different setup code.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3030/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "6903bb49da18e0bf3e2909e6b1342ee9a26b78ff", "tree": "a3774efb110142c3e408e5ead6c80710ba361af6", "parents": [ "67b0f0f1b355df293f92069a0409452c9e24370b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Fri Nov 18 00:17:53 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:47 2011 +0000" }, "message": "MIPS: ath79: Separate AR913x SoC specific WMAC setup code\n\nThe device registration code can be shared between the different SoCs, but\nthe required setup code varies Move AR913x specific setup code into a\nseparate function in order to make adding support for another SoCs easier.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3029/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "67b0f0f1b355df293f92069a0409452c9e24370b", "tree": "92b9af4fc7533ee3b4852f9d1f92e5468c661298", "parents": [ "be5f3623204e15cb8a95a6d381ae6eb074ba46b5" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Fri Nov 18 00:17:53 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:47 2011 +0000" }, "message": "MIPS: ath79: Remove \u0027ar913x\u0027 from common variable and function names\n\nThe wireless MAC specific variables and the registration code can be shared\nbetween multiple SoCs. Remove the \u0027ar913x\u0027 part from the function and\nvariable names to avoid confusions.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3028/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "be5f3623204e15cb8a95a6d381ae6eb074ba46b5", "tree": "52fb613a75ad0c563323de0ddcb646d595196d1b", "parents": [ "2dc7b4a1977e3bd3b7c819c63cab1baf7d260d89" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Fri Nov 18 00:17:46 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:47 2011 +0000" }, "message": "MIPS: ath79: Store the SoC revision in a global variable\n\nKnowing the exact revision of the SoC is required to make runtime decisions\nin various code paths. We have determined the SoC revision already, so we\nonly need to store that in a global variable.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3027/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "2dc7b4a1977e3bd3b7c819c63cab1baf7d260d89", "tree": "5fca4608f57952434941b838b0bbda3ffea740cb", "parents": [ "4ff40d5a7668cfadcfc37c3982caea940ba60d8d" ], "author": { "name": "Rene Bolldorf", "email": "xsecute@googlemail.com", "time": "Fri Nov 18 00:17:42 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:47 2011 +0000" }, "message": "Initial support for the Ubiquiti Networks XM board (rev 1.0).\n\nSigned-off-by: Rene Bolldorf \u003cxsecute@googlemail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/3020/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7e0dde175e5c06c31624e7fb88975eee683d6894", "tree": "fadd9013f22dfdf56ac8e694468e35f6b694053f", "parents": [ "13051c5cc3dd2600afe980049eb566b9b6a4afda" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 19:26:13 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:47 2011 +0000" }, "message": "MIPS: ath79: Add initial support for the Atheros AP121 reference board\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2531/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "13051c5cc3dd2600afe980049eb566b9b6a4afda", "tree": "ad094f4f9ac12d55d78d2d2e5c60312d673c2ac1", "parents": [ "d57f341ba08c9f34ccd45a89729e73174d4a3325" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 19:26:12 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:46 2011 +0000" }, "message": "MIPS: ath79: register UART device for the AR933X SoCs\n\nThe AR933X SoCs does not have a 8250 compatible UART, they\nare using a different UART core. Register a different platform\ndevice for the different UART.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2528/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "c279b7759602d4ef97d45f3eb2cdf36a713eb99a", "tree": "1c399f392565472b4726cc29b71e4d770266d00c", "parents": [ "9d6b204f93cfeb7ec5e6ec499aca43d2c1d6da3f" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 21:26:10 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:46 2011 +0000" }, "message": "MIPS: ath79: add AR933X specific USB platform device registration\n\nAlso select the USB_ARCH_HAS_EHCI symbol in order to make the\nEHCI driver available.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2527/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "2c048303d6fac960dc2deaeae764a3403aa97f3b", "tree": "78940be6f5fb6bae5d9250e328a5a66d5bf841d6", "parents": [ "fdfbcf4705e0b01d90112d6cfa5deec6484ec11b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 21:26:08 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:46 2011 +0000" }, "message": "MIPS: ath79: Add config symbol for the AR933X SoCs\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2525/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "fdfbcf4705e0b01d90112d6cfa5deec6484ec11b", "tree": "7de855fbb004acbb39d679e17221d2a6f8358430", "parents": [ "54eed4c77ca1d02228f07bee74a1afe081393ab0" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 21:26:07 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:46 2011 +0000" }, "message": "MIPS: ath79: add AR933X specific GPIO initialization\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2524/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "54eed4c77ca1d02228f07bee74a1afe081393ab0", "tree": "5dede063a5ec57facde120c90df3e20202a9c4b8", "parents": [ "7ee15d8a2837841d75f56319b94510ed950094b5" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 21:26:06 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:45 2011 +0000" }, "message": "MIPS: ath79: Add AR933X specific IRQ initialization\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2530/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7ee15d8a2837841d75f56319b94510ed950094b5", "tree": "03757b0eb2ae8d30c550c76b322719fcdfa341da", "parents": [ "04225e1d227c8e68d685936ecf42ac175fec0e54" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 21:26:05 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:45 2011 +0000" }, "message": "MIPS: ath79: Add AR933X specific glue for ath79_device_reset_{set,clear}\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2523/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "04225e1d227c8e68d685936ecf42ac175fec0e54", "tree": "e7ecd726ca40a58c1d11bc6753dd7e4c8c72c107", "parents": [ "0bd3acdf7d559c8289de73c4c711fd2381e6c7ad" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 21:26:04 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:45 2011 +0000" }, "message": "MIPS: ath79: add AR933X specific clock init\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2522/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "0bd3acdf7d559c8289de73c4c711fd2381e6c7ad", "tree": "7edee8764810ff405bf14083fd285da596d1a1e9", "parents": [ "6d1c8fde2daa498fa6ddf8916bcfc5aee1bbe51b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 21:26:03 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:45 2011 +0000" }, "message": "MIPS: ath79: Add early printk support for the AR933X SoCs\n\nThe AR933X SoCs are using a different UART, thus require\ndifferent code for early printk support.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2521/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "6d1c8fde2daa498fa6ddf8916bcfc5aee1bbe51b", "tree": "bf3d479ffb45da56cb23ebdab440de63cf3a674b", "parents": [ "8bed1288d479fd118d30666de53dfba8044f789f" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Thu Jun 23 18:13:14 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:45 2011 +0000" }, "message": "MIPS: ath79: add revision id for the AR933X SoCs\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2538/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "8bed1288d479fd118d30666de53dfba8044f789f", "tree": "0eb4495a74254796e19a3df018b868dac5458bc1", "parents": [ "7e98aa4639cba9ef5c99b1484bc86ddb04f67b80" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Mon Jun 20 21:26:01 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:44 2011 +0000" }, "message": "MIPS: ath79: Remove superfluous parentheses\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kathy Giori \u003ckgiori@qca.qualcomm.com\u003e\nCc: \"Luis R. Rodriguez\" \u003crodrigue@qca.qualcomm.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2519/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7e98aa4639cba9ef5c99b1484bc86ddb04f67b80", "tree": "9851f7472dbf493118df0be3040323c9f3afa275", "parents": [ "d2b4ac1e5d34648cc56785f6bd11bfa020ad4f02" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Sun Jun 05 23:38:46 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:44 2011 +0000" }, "message": "MIPS: ath79: add common USB Host Controller device\n\nAdd common platform_device and helper code to make the registration of\nthe built-in USB controllers easier on the board which are using them.\nAlso register the USB controller on the AP81 and PB44 boards.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2442/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d2b4ac1e5d34648cc56785f6bd11bfa020ad4f02", "tree": "74f043b6ffa5f01994edbc3dd95c614bc7996574", "parents": [ "2f8501b9b81b23e99206e31b3eff65e68b56b24b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Sun Jun 05 23:38:45 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:02:44 2011 +0000" }, "message": "MIPS: ath79: Handle more MISC IRQs\n\nThe AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller.\nThe patch adds support for them.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2440/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "ab75dc02c151c9d2a2fd446334d740b097a3b9db", "tree": "45270931b489a1260e2d2aa3b9ffb1ef7347cfb6", "parents": [ "864c6c22e9a5742b0f43c983b6c405d52817bacd" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Nov 17 15:07:31 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:01:45 2011 +0000" }, "message": "MIPS: Fix up inconsistency in panic() string argument.\n\nPanic() invokes printk() to add a \\n internally, so panic arguments should\nnot themselves end in \\n. Panic invocations in arch/mips and elsewhere\nare inconsistently sometimes terminating in \\n, sometimes not.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "90e6ca5cda8a38b7bb53660e67eff0845c0abe3f", "tree": "dd55be04d3d14ebc717c033dcda244b3fa6bad05", "parents": [ "2f7ac6c199978d0a0e407a12534201aa675a6482" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Apr 13 10:54:24 2011 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Apr 13 16:58:19 2011 -0700" }, "message": "USB: ohci: add bus glue for the Atheros AR71XX/AR7240 SoCs\n\nThe Atheros AR71XX/AR7240 SoCs have a built-in OHCI controller.\nThis patch adds the necessary glue code to make the generic OHCI\ndriver usable for them.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: Alan Stern \u003cstern@rowland.harvard.edu\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "502fa84195f47a79d7220470ebaa85a773659755", "tree": "389cf79ef65632f8c8a9dc16d8b1bad265410c35", "parents": [ "01da92f7f6436c6c29c11490c7fcdb20fb6c46b8" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Wed Apr 13 10:54:22 2011 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Apr 13 16:57:44 2011 -0700" }, "message": "USB: ehci: add bus glue for the Atheros AR71XX/AR724X/AR91XX SoCs\n\nThe Atheros AR71XX/AR91XX SoCs have a built-in EHCI controller.\nThis patch adds the necessary glue code to make the generic EHCI\ndriver usable for them.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: Alan Stern \u003cstern@rowland.harvard.edu\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "e4ec7989b4e55d9275ebac66230b7dac6dcb1fae", "tree": "b42cd789681bada83b0051899ed66c1c0e2bbea2", "parents": [ "9efbc3fba2cd7f703b55d72e5168ed4348930442" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Sun Mar 27 15:19:28 2011 +0200" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Mar 29 14:48:07 2011 +0200" }, "message": "MIPS: Convert the irq functions to the new names\n\nScripted with coccinelle.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "3fb8818bd2ed2030f00678da090adff36739bf20", "tree": "081fe2aa87edb5dabb5d8462d8656fb8bbcad8b3", "parents": [ "41d735e8705c5a2cffe64bc56624a4bb0519c1da" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Wed Mar 23 21:08:47 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Mar 25 18:45:15 2011 +0100" }, "message": "MIPS: ath79: Convert to new irq_chip functions\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2175/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f9b08d9c606498584e1fb05ab95a575e52f0f8e2", "tree": "4d5bf188ba146bf882aa28917c6564302d515cd5", "parents": [ "756cca61a7faddcafa582d683b46f32280eda948" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Mar 25 18:45:13 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Mar 25 18:45:13 2011 +0100" }, "message": "MIPS: Remove useless initialization.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f5b35d0b16a08e6c1e7c8a41fa87ad10cf9aefa4", "tree": "fd4991f97b52aa714f5aebe955a2b897dbca0ecc", "parents": [ "aa6695ec8b51da7aaa245310073ddd39a306a77f" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:29 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:28 2011 +0100" }, "message": "MIPS: ath79: add common WMAC device for AR913X based boards\n\nAdd common platform_device and helper code to make the registration\nof the built-in wireless MAC easier on the Atheros AR9130/AR9132\nbased boards. Also register the WMAC device on the AR81 board.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e,\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1962/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "aa6695ec8b51da7aaa245310073ddd39a306a77f", "tree": "760da11acabf41da8a66b8777788a58cbaf6d89c", "parents": [ "68a1d3163678a42ad2d0a9013672083c4fb613be" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:28 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:27 2011 +0100" }, "message": "MIPS: ath79: Add initial support for the Atheros AP81 reference board\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1952/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "68a1d3163678a42ad2d0a9013672083c4fb613be", "tree": "ac653355ea8030195c4edd606fa1b31c7f4a8a75", "parents": [ "8efaef4dc842a8a050d10aef30e26220b8995fc3" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:23 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:27 2011 +0100" }, "message": "MIPS: ath79: add common SPI controller device\n\nSeveral boards are using the built-in SPI controller of the\nAR71XX/AR724X/AR913X SoCs. This patch adds common platform_device\nand helper code to register it. Additionally, the patch registers\nthe SPI bus on the PB44 board.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1956/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3f348c5d1aaa0b8b2563f50d2d9a0c64e7d649fb", "tree": "cdd531781d22fe64c5c3cce0a56de153bf9cc397", "parents": [ "858f763c1cc37ecc6ab39dec60bb3a46606dcac4" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:21 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:27 2011 +0100" }, "message": "MIPS: ath79: add common GPIO buttons device\n\nAlmost all boards have one or more push buttons connected to GPIO lines.\nThis patch adds common code to register a platform_device for them.\n\nThe patch also adds support for the buttons on the PB44 board.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1954/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "858f763c1cc37ecc6ab39dec60bb3a46606dcac4", "tree": "0b0d834212fa05e53de9988ba5ea83c224302a1f", "parents": [ "d8fec1fc80cd8639449e2b5012688f5be109eeaf" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:20 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:26 2011 +0100" }, "message": "MIPS: ath79: add common watchdog device\n\nAll supported SoCs have a built-in hardware watchdog driver. This patch\nregisters a platform_device for that to make it usable.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1955/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d8fec1fc80cd8639449e2b5012688f5be109eeaf", "tree": "57882250166f98d561b126bf664f5abaef3a0a22", "parents": [ "0cde72284c9c7d4b348ece9e1fe136f787185cd7" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:18 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:26 2011 +0100" }, "message": "MIPS: ath79: add common GPIO LEDs device\n\nAlmost all boards have one or more LEDs connected to GPIO lines. This\npatch adds common code to register a platform_device for them.\n\nThe patch also adds support for the LEDs on the PB44 board.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1953/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "0cde72284c9c7d4b348ece9e1fe136f787185cd7", "tree": "af4131bf897fc1daeb6e711e3f0c417c53d52c08", "parents": [ "0aabf1a4d9b6b2d2371f641ec19fb7551cea4a90" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:17 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:26 2011 +0100" }, "message": "MIPS: ath79: add initial support for the Atheros PB44 reference board\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1950/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "0aabf1a4d9b6b2d2371f641ec19fb7551cea4a90", "tree": "9bb5ece8310ce78c19652058f5a00816e6fc5d2d", "parents": [ "6eae43c57ee92de91f6cc7c391cea97c43295da0" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:16 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:25 2011 +0100" }, "message": "MIPS: ath79: utilize the MIPS multi-machine support\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nCc: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1949/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "6eae43c57ee92de91f6cc7c391cea97c43295da0", "tree": "5ac5521d28527e6218faea0f31cc888df65dbc9f", "parents": [ "d4a67d9dc8a5a80c4ec1814791af8c0252c158b8" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:15 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:25 2011 +0100" }, "message": "MIPS: ath79: add GPIOLIB support\n\nThis patch implements generic GPIO routines for the built-in\nGPIO controllers of the Atheros AR71XX/AR724X/AR913X SoCs.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: David Brownell \u003cdbrownell@users.sourceforge.net\u003e\nCc: linux-mips@linux-mips.org\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1948/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d4a67d9dc8a5a80c4ec1814791af8c0252c158b8", "tree": "28c9797f2ec5bf46325e1d5dd7db675ac0ac6713", "parents": [ "94bb0c1ab293c298a8852e4f10c4215bad6daa9b" ], "author": { "name": "Gabor Juhos", "email": "juhosg@openwrt.org", "time": "Tue Jan 04 21:28:14 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:24 2011 +0100" }, "message": "MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs\n\nThis patch adds initial support for various Atheros SoCs based on the\nMIPS 24Kc core. The following models are supported at the moment:\n\n - AR7130\n - AR7141\n - AR7161\n - AR9130\n - AR9132\n - AR7240\n - AR7241\n - AR7242\n\nThe current patch contains minimal support only, but the resulting\nkernel can boot into user-space with using of an initramfs image on\nvarious boards which are using these SoCs. Support for more built-in\ndevices and individual boards will be implemented in further patches.\n\nSigned-off-by: Gabor Juhos \u003cjuhosg@openwrt.org\u003e\nSigned-off-by: Imre Kaloz \u003ckaloz@openwrt.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nCc: Cliff Holden \u003cCliff.Holden@Atheros.com\u003e\nCc: Kathy Giori \u003cKathy.Giori@Atheros.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1947/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" } ] }