)]}' { "log": [ { "commit": "9cd9669bd60ee41d34d1b41d7a0b884806939d7b", "tree": "e9d46ceab7a941bb44bad9578fddef66baf185af", "parents": [ "586016ebf76d62e58a0e9dfd971e465c8027889d" ], "author": { "name": "David Daney", "email": "david.daney@cavium.com", "time": "Tue May 15 00:04:49 2012 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed May 16 23:34:34 2012 +0200" }, "message": "MIPS: Use board_cache_error_setup for r4k cache error handler setup.\n\nSigned-off-by: David Daney \u003cdavid.daney@cavium.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3821/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "586016ebf76d62e58a0e9dfd971e465c8027889d", "tree": "a83319dd56a2d445db20be61a6df0c01fc3cb1bc", "parents": [ "e3dc81f2306e650f01e38ec87e24c3fecb843dc3" ], "author": { "name": "David Daney", "email": "david.daney@cavium.com", "time": "Tue May 15 00:04:48 2012 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed May 16 23:34:33 2012 +0200" }, "message": "MIPS: Octeon: Use board_cache_error_setup for cache error handler setup.\n\nSigned-off-by: David Daney \u003cdavid.daney@cavium.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/3820/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "58bca4a8fa90fcf9069379653b396b2cec642f7f", "tree": "483c535136b5b168f36326956453e80ce5aa6543", "parents": [ "64ebe987311853ea857a244439de5b947a4b1b07", "64d70fe5d3640e1a89790ed21120921278f8cb86" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 04 17:13:43 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 04 17:13:43 2012 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.linaro.org/people/mszyprowski/linux-dma-mapping\n\nPull DMA mapping branch from Marek Szyprowski:\n \"Short summary for the whole series:\n\n A few limitations have been identified in the current dma-mapping\n design and its implementations for various architectures. There exist\n more than one function for allocating and freeing the buffers:\n currently these 3 are used dma_{alloc, free}_coherent,\n dma_{alloc,free}_writecombine, dma_{alloc,free}_noncoherent.\n\n For most of the systems these calls are almost equivalent and can be\n interchanged. For others, especially the truly non-coherent ones\n (like ARM), the difference can be easily noticed in overall driver\n performance. Sadly not all architectures provide implementations for\n all of them, so the drivers might need to be adapted and cannot be\n easily shared between different architectures. The provided patches\n unify all these functions and hide the differences under the already\n existing dma attributes concept. The thread with more references is\n available here:\n\n http://www.spinics.net/lists/linux-sh/msg09777.html\n\n These patches are also a prerequisite for unifying DMA-mapping\n implementation on ARM architecture with the common one provided by\n dma_map_ops structure and extending it with IOMMU support. More\n information is available in the following thread:\n\n http://thread.gmane.org/gmane.linux.kernel.cross-arch/12819\n\n More works on dma-mapping framework are planned, especially in the\n area of buffer sharing and managing the shared mappings (together with\n the recently introduced dma_buf interface: commit d15bd7ee445d\n \"dma-buf: Introduce dma buffer sharing mechanism\").\n\n The patches in the current set introduce a new alloc/free methods\n (with support for memory attributes) in dma_map_ops structure, which\n will later replace dma_alloc_coherent and dma_alloc_writecombine\n functions.\"\n\nPeople finally started piping up with support for merging this, so I\u0027m\nmerging it as the last of the pending stuff from the merge window.\nLooks like pohmelfs is going to wait for 3.5 and more external support\nfor merging.\n\n* \u0027for-linus\u0027 of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:\n common: DMA-mapping: add NON-CONSISTENT attribute\n common: DMA-mapping: add WRITE_COMBINE attribute\n common: dma-mapping: introduce mmap method\n common: dma-mapping: remove old alloc_coherent and free_coherent methods\n Hexagon: adapt for dma_map_ops changes\n Unicore32: adapt for dma_map_ops changes\n Microblaze: adapt for dma_map_ops changes\n SH: adapt for dma_map_ops changes\n Alpha: adapt for dma_map_ops changes\n SPARC: adapt for dma_map_ops changes\n PowerPC: adapt for dma_map_ops changes\n MIPS: adapt for dma_map_ops changes\n X86 \u0026 IA64: adapt for dma_map_ops changes\n common: dma-mapping: introduce generic alloc() and free() methods\n" }, { "commit": "0b5f9c005def154f9c21f9be0223b65b50d54368", "tree": "bbee9b3e549acc5886d1022c2aad46d5abfdd22e", "parents": [ "b5174fa3a7f4f8f150bfa3b917c92608953dfa0f" ], "author": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Thu Mar 29 15:38:30 2012 +1030" }, "committer": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Thu Mar 29 15:38:30 2012 +1030" }, "message": "remove references to cpu_*_map in arch/\n\nThis has been obsolescent for a while; time for the final push.\n\nIn adjacent context, replaced old cpus_* with cpumask_*.\n\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e (arch/sparc)\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e (arch/tile)\nCc: user-mode-linux-devel@lists.sourceforge.net\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e\nCc: linux-arm-kernel@lists.infradead.org\nCc: Richard Kuo \u003crkuo@codeaurora.org\u003e\nCc: linux-hexagon@vger.kernel.org\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: linux-mips@linux-mips.org\nCc: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nCc: Helge Deller \u003cdeller@gmx.de\u003e\nCc: sparclinux@vger.kernel.org\n" }, { "commit": "b81947c646bfefdf98e2fde5d7d39cbbda8525d4", "tree": "944890e7a466af7512e878fa4f71bca1b0f7a600", "parents": [ "c40d04df152a1111c5bbcb632278394dabd2b73d" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:02 2012 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Wed Mar 28 18:30:02 2012 +0100" }, "message": "Disintegrate asm/system.h for MIPS\n\nDisintegrate asm/system.h for MIPS.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\ncc: linux-mips@linux-mips.org\n" }, { "commit": "e8d51e54ab4020d984dda471ca077c7fed094326", "tree": "874f1d1ad6a1ab0aa28559062b0a27743bf5be97", "parents": [ "baa676fcf8d555269bd0a5a2496782beee55824d" ], "author": { "name": "Andrzej Pietrasiewicz", "email": "andrzej.p@samsung.com", "time": "Tue Mar 27 14:32:21 2012 +0200" }, "committer": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Wed Mar 28 16:36:32 2012 +0200" }, "message": "MIPS: adapt for dma_map_ops changes\n\nAdapt core MIPS architecture code for dma_map_ops changes: replace\nalloc/free_coherent with generic alloc/free methods.\n\nSigned-off-by: Andrzej Pietrasiewicz \u003candrzej.p@samsung.com\u003e\nAcked-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\n[added missing changes to arch/mips/cavium-octeon/dma-octeon.c,\n fixed attrs argument in dma-mapping.h]\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nReviewed-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "a24401bcf4a67c8fe17e649e74eeb09b08b79ef5", "tree": "c4b1be87e0a63057e85ae82076d54c437313b1f8", "parents": [ "589973a7042f5a91a5b8bf78a32c97ae073e2c72" ], "author": { "name": "Cong Wang", "email": "amwang@redhat.com", "time": "Sat Nov 26 10:53:39 2011 +0800" }, "committer": { "name": "Cong Wang", "email": "xiyou.wangcong@gmail.com", "time": "Tue Mar 20 21:48:30 2012 +0800" }, "message": "highmem: kill all __kmap_atomic()\n[swarren@nvidia.com: highmem: Fix ARM build break due to __kmap_atomic rename]\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Cong Wang \u003camwang@redhat.com\u003e\n" }, { "commit": "9c02048fcdf3cd0ab2d04a0a01de100582db28e1", "tree": "3ac1a97a0bf99389c2cc0d2a1d8fc8ab6b3d258c", "parents": [ "5472e862de2bc4a47f18d216a4a626d5c7eeef90" ], "author": { "name": "Cong Wang", "email": "amwang@redhat.com", "time": "Fri Nov 25 23:14:15 2011 +0800" }, "committer": { "name": "Cong Wang", "email": "xiyou.wangcong@gmail.com", "time": "Tue Mar 20 21:48:14 2012 +0800" }, "message": "mips: remove the second argument of k[un]map_atomic()\n\nSigned-off-by: Cong Wang \u003camwang@redhat.com\u003e\n" }, { "commit": "43ca4957a15a120d0822a60a22998dbb41bbf075", "tree": "e1bbcc60ca694168c1dbc2af187dc03d8b441abe", "parents": [ "58a7fca67a9a6c7dccff727f16826f811ca59127" ], "author": { "name": "Kautuk Consul", "email": "consul.kautuk@gmail.com", "time": "Fri Dec 23 16:52:42 2011 +0530" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Feb 20 18:33:19 2012 +0100" }, "message": "MIPS: fault.c: Port OOM changes to do_page_fault\n\nCommit d065bd810b6deb67d4897a14bfe21f8eb526ba99\n(mm: retry page fault when blocking on disk transfer) and\ncommit 37b23e0525d393d48a7d59f870b3bc061a30ccdb\n(x86,mm: make pagefault killable)\n\nThe above commits introduced changes into the x86 pagefault handler\nfor making the page fault handler retryable as well as killable.\n\nThese changes reduce the mmap_sem hold time, which is crucial\nduring OOM killer invocation.\n\nPort these changes to MIPS.\n\nWithout these changes, my MIPS board encounters many hang and livelock\nscenarios.\nAfter applying this patch, OOM feature performance improves according to\nmy testing.\n\nSigned-off-by: Mohd. Faris \u003cmohdfarisq2010@gmail.com\u003e\nSigned-off-by: Kautuk Consul \u003cconsul.kautuk@gmail.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/3217/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7bf6612e8a9d6a0b3b82e8e2611942be1258b307", "tree": "5bc1e695e6f2d95cb49cbb8b47e89274eb8b13c7", "parents": [ "7a5c3b8c5c27211846efe7029a3d2ee7087425e3", "f77138e8d53a7a4a539f8d931107991d91727afd", "b606d5ae905f5e560021298307ab7b9ef69a60f1", "b15a6d62b5482966d0605e24c728bea8f7f876eb", "df0ac8a406718360aa08e632a73a805a6cc4cb27", "876f1166189bcb9493e02a35fd38d143e1b26eee", "d7a887a73dec6c387b02a966a71aac767bbd9ce6", "6457a396bbc20656009eaf950ca165912a943520", "5611cc4572e889b62a7b4c72a413536bf6a9c416", "ff5d7265cfb88e8f8943a55afde90255fc5deacb", "b3ea581834c1e36cc76589e63dedcd99fd6abf51" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:42:31 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:42:31 2012 +0100" }, "message": "Merge branches \u0027next/ar7\u0027, \u0027next/ath79\u0027, \u0027next/bcm63xx\u0027, \u0027next/bmips\u0027, \u0027next/cavium\u0027, \u0027next/generic\u0027, \u0027next/kprobes\u0027, \u0027next/lantiq\u0027, \u0027next/perf\u0027 and \u0027next/raza\u0027 into mips-for-linux-next\n" }, { "commit": "39b741431af7f6f46b2e0e7f7f13ea2351fb4a5f", "tree": "89355f4ae7bbb874537bb65f71ba0d19b3d468e1", "parents": [ "5b0ec2efb7d373faa7b1a7632c459b93895d45cd", "d7a887a73dec6c387b02a966a71aac767bbd9ce6" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:41:47 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:41:47 2012 +0100" }, "message": "Merge branch \u0027next/generic\u0027 into mips-for-linux-next\n" }, { "commit": "d7a887a73dec6c387b02a966a71aac767bbd9ce6", "tree": "f32a5f2151b9fe4de1491b601db2e3587d3d52c0", "parents": [ "c539ef7d355219c7b0e16cc302bf179fcad936b3" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:37:16 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:37:16 2012 +0100" }, "message": "MIPS: Delete unused function add_temporary_entry.\n\nOnly available for R4000 style TLBs anyway and proper ordering of\ninitialization code made this crude interface unncecessary.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f467e4bfb50ca6af042f1b19b3556bd4aca854c3", "tree": "0c8f1d7bc8ac30ee10d7edbb8463f496a75082b2", "parents": [ "8b5690f8847490c1e3ea47266819833a13621253" ], "author": { "name": "Hillf Danton", "email": "dhillf@gmail.com", "time": "Wed Jan 11 15:37:13 2012 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Jan 11 15:37:13 2012 +0100" }, "message": "MIPS: Flush huge TLB\n\nWhen flushing TLB, if @vma is backed by huge page, we could flush huge\nTLB, due to that huge page is defined to be far from normal page.\n\nSigned-off-by: Hillf Danton \u003cdhillf@gmail.com\u003e\nAcked-by: David Daney \u003cdavid.daney@cavium.com\u003e\nCc: linux-mips@linux-mips.org\nCc: \"Jayachandran C.\" \u003cjayachandranc@netlogicmicro.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2825/\nSigned-off-by: David Daney \u003cdavid.daney@cavium.com\u003e\nAcked-by: Hillf Danton \u003cdhillf@gmail.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/3114/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1c773ea4dceff889c2f872343609a87ae0cfbf56", "tree": "1c1cf2ed935426739d83ed41d8045968d0865202", "parents": [ "65040e224e5b214a93fa0c790add5d69b054ecae" ], "author": { "name": "Jayachandran C", "email": "jayachandranc@netlogicmicro.com", "time": "Wed Nov 16 00:21:28 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:04:56 2011 +0000" }, "message": "MIPS: Netlogic: Add XLP makefiles and config\n\n- Add CPU_XLP and NLM_XLR_BOARD to arch/mips/Kconfig for Netlogic XLP boards\n- Update mips Makefiles to add XLP\n\nSigned-off-by: Jayachandran C \u003cjayachandranc@netlogicmicro.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2968/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "a3d4fb2d2a4c52b22cde90049a78e323cde187e5", "tree": "e5ed7235b8f8a0b29b9aad11b4d1f57ef2f59809", "parents": [ "0be3d9bb1460a87170a1b78b9ab12cb0ac02c2dc" ], "author": { "name": "Jayachandran C", "email": "jayachandranc@netlogicmicro.com", "time": "Wed Nov 16 00:21:20 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:04:55 2011 +0000" }, "message": "MIPS: Netlogic: XLP CPU support.\n\nAdd support for Netlogic\u0027s XLP MIPS SoC. This patch adds:\n* XLP processor ID in cpu_probe.c and asm/cpu.h\n* XLP case to asm/module.h\n* CPU_XLP case to mm/tlbex.c\n* minor change to r4k cache handling to ignore XLP secondary cache\n* XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h\n\nSigned-off-by: Jayachandran C \u003cjayachandranc@netlogicmicro.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2966/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "43064c0c8ee2ada8edd421520c633584d648e100", "tree": "3621ac70a6d96a872942c205f03f9fda18826588", "parents": [ "b1c10bea620f79109b5cc9935267bea4f6f29ac6" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Tue Nov 22 14:38:03 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:03:45 2011 +0000" }, "message": "MIPS: Handle initmem in systems with kernel not in add_memory_region() mem\n\nThis patch addresses a couple of related problems:\n\n1) The kernel may reside in physical memory outside of the ranges set\n by plat_mem_setup(). If this is the case, init mem cannot be\n reused as it resides outside of the range of pages that the kernel\n memory allocators control.\n\n2) initrd images might be loaded in physical memory outside of the\n ranges set by plat_mem_setup(). The memory likewise cannot be\n reused. The patch doesn\u0027t handle this specific case, but the\n infrastructure is useful for future patches that do.\n\nThe crux of the problem is that there are memory regions that need be\nmemory_present(), but that cannot be free_bootmem() at the time of\narch_mem_init(). We create a new type of memory (BOOT_MEM_INIT_RAM)\nfor use with add_memory_region(). Then arch_mem_init() adds the init\nmem with this type if the init mem is not already covered by existing\nranges.\n\nWhen memory is being freed into the bootmem allocator, we skip the\nBOOT_MEM_INIT_RAM ranges so they are not clobbered, but we do signal\nthem as memory_present(). This way when they are later freed, the\nnecessary memory manager structures have initialized and the Sparse\nallocater is prevented from crashing.\n\nThe Octeon specific code that handled this case is removed, because\nthe new general purpose code handles the case.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1988/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b1c10bea620f79109b5cc9935267bea4f6f29ac6", "tree": "2b529b61862b6f5b3834a174c246a18b0255f28a", "parents": [ "5639bc4a64786c94eba3d2ba6a4ff4b290da1fb1" ], "author": { "name": "Hillf Danton", "email": "dhillf@gmail.com", "time": "Tue Nov 22 14:38:03 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:03:45 2011 +0000" }, "message": "MIPS: Add fast get_user_pages\n\nGup is used in a few cases, say futex.\n\nThis work is derived from the x86 version, and operations of pte and pmd are\nadapted to the defines of MIPS in straight forward manner.\n\n[ralf@linux-mips.org: Fixed up reject in arch/mips/mm/Makefile due to\nwhitespace formatting differences. Fixed build error in gup.c due to\nconflicting changes elsewhere in the kernel.]\n\nSigned-off-by: Hillf Danton \u003cdhillf@gmail.com\u003e\nCc: David Daney \u003cdavid.daney@cavium.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2859/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3d18c98367eac23555ea4887c4f570423474eeaf", "tree": "4f9e12003a5acf46c1aea74e7835b4e72814bf93", "parents": [ "ab75dc02c151c9d2a2fd446334d740b097a3b9db" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Nov 28 16:11:28 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:01:45 2011 +0000" }, "message": "MIPS: Fix Jazz 64-bit build error.\n\nMove add_wired_entry to its own header file from where it will be\nalways included. Patch up other users of add_wired_entry to also include\nthe header as needed.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "ab75dc02c151c9d2a2fd446334d740b097a3b9db", "tree": "45270931b489a1260e2d2aa3b9ffb1ef7347cfb6", "parents": [ "864c6c22e9a5742b0f43c983b6c405d52817bacd" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Nov 17 15:07:31 2011 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Dec 07 22:01:45 2011 +0000" }, "message": "MIPS: Fix up inconsistency in panic() string argument.\n\nPanic() invokes printk() to add a \\n internally, so panic arguments should\nnot themselves end in \\n. Panic invocations in arch/mips and elsewhere\nare inconsistently sometimes terminating in \\n, sometimes not.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "694b8c35e95078bfe1cb1388bf0cf7942e32f009", "tree": "48bee7be04d87d7c42a27f44cba579e7022159e8", "parents": [ "1177d99df2a0712764c03d13a3dda6f4e2b23725" ], "author": { "name": "Manuel Lauss", "email": "manuel.lauss@googlemail.com", "time": "Tue Aug 02 19:51:08 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Oct 24 23:34:23 2011 +0100" }, "message": "MIPS: Remove __init from add_wired_entry()\n\nFor Alchemy-PCI I need to add a wired entry after resuming from RAM;\nremove the __init from add_wired_entry() so that this actually works.\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@googlemail.com\u003e\nTo: Linux-MIPS \u003clinux-mips@linux-mips.org\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2684/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d9cdc901af0f92da7f90c750d8c187f5500be067", "tree": "1b5e11202d86081253ab1422e302b45902a346a3", "parents": [ "2e5db86dd4166fd88a042bbb229dfc7081df3e92" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Jun 17 16:20:28 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Oct 20 15:00:18 2011 +0100" }, "message": "MIPS: cache: Provide cache flush operations for XFS\n\nUntil now flush_kernel_vmap_range() and invalidate_kernel_vmap_range() did\nnot exist on MIPS resulting in heavy cache corruption on XFS filesystems.\n\nLeft for the post-3.0 time: optimization and make this work with highmem,\ntoo. Since the combination of highmem + cache aliases atm doesn\u0027t work\nthis isn\u0027t a regression.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/2505/\n" }, { "commit": "0f4ccbc835036cbcc2513585bb2e93ee62e12674", "tree": "f70b98675abd1d6dbdd28c30863d9ea09e31d8db", "parents": [ "d968275921f9fa7fbc602ac6618ffec6a062ee3c" ], "author": { "name": "David Daney", "email": "david.daney@cavium.com", "time": "Fri Sep 16 18:06:02 2011 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Sep 21 17:54:07 2011 +0200" }, "message": "MIPS: No branches in delay slots for huge pages in handle_tlbl\n\nFor the case PM_DEFAULT_MASK \u003d\u003d 0, we were placing a branch in the\ndelay slot of another branch. This leads to undefined behavior.\n\nSigned-off-by: David Daney \u003cdavid.daney@cavium.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2775/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d954ffe34a606d4ec34cd3c2b0b5974779759f25", "tree": "fcf273c3a924ab816a2263d959abe2aa4bf17c5c", "parents": [ "870168a031b3c5b78191d719d375221f01e98e11" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Aug 02 22:52:48 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Sep 21 17:53:07 2011 +0200" }, "message": "MIPS: tlbex: Fix build error in R3000 code.\n\nOnly some GCC versions such as gcc 4.2 notice that the variable wr in\nbuild_r3000_tlb_modify_handler is used uninitialized. When using one\nof those GCCs the build will fail due to -Werror. GCC 4.6 does not\nwarn about the uninitialized use of wr.\n\nThis issue was introduced by 7211f4d7a3dcbe57c5d396c334dca525315dceb2\n[MIPS: Close races in TLB modify handlers.]\n\nReported-by: Ganesan Ramalingam \u003cganesan18@gmail.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "16650107579aed81e0b0534a60400f9ba911fe9b", "tree": "a0628e1f814556334ef8300651e6c47e07bd792c", "parents": [ "fe0b030cf016ee9a4b0ae4adb0095c46d0e461cc" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Sat Jun 18 11:28:48 2011 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Sep 17 02:37:04 2011 +0200" }, "message": "MIPS: Trivial style cleanups in mmap.c\n\nFix checkpatch warnings. Rename arch_get_unmapped_area_foo() to\narch_get_unmapped_area_common(). Make indentations and spacing more\nconsistent. Add \u003clinux/compiler.h\u003e for likely/unlikely.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: Jian Peng \u003cjipeng2005@gmail.com\u003e\nCc: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2506/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "6fd4ce886440c7a1b08b6642e606ee19097829df", "tree": "cd12dc0ec7e40e9d9a26e942999de93a5e673b4d", "parents": [ "ba5b56cb3e3d2cab73d4fee9a022bb69462a8cd9", "bf28607fbe529e20180080c4a0295b0a47834fde" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jul 26 14:17:28 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jul 26 14:17:28 2011 -0700" }, "message": "Merge branch \u0027upstream\u0027 of git://git.linux-mips.org/pub/scm/upstream-linus\n\n* \u0027upstream\u0027 of git://git.linux-mips.org/pub/scm/upstream-linus: (31 commits)\n MIPS: Close races in TLB modify handlers.\n MIPS: Add uasm UASM_i_SRL_SAFE macro.\n MIPS: RB532: Use hex_to_bin()\n MIPS: Enable cpu_has_clo_clz for MIPS Technologies\u0027 platforms\n MIPS: PowerTV: Provide cpu-feature-overrides.h\n MIPS: Remove pointless return statement from empty void functions.\n MIPS: Limit fixrange_init() to the FIXMAP region\n MIPS: Install handlers for software IRQs\n MIPS: Move FIXADDR_TOP into spaces.h\n MIPS: Add SYNC after cacheflush\n MIPS: pfn_valid() is broken on low memory HIGHMEM systems\n MIPS: HIGHMEM DMA on noncoherent MIPS32 processors\n MIPS: topdown mmap support\n MIPS: Remove redundant addr_limit assignment on exec.\n MIPS: AR7: Replace __attribute__((__packed__)) with __packed\n MIPS: AR7: Remove \u0027space before tabs\u0027 in platform.c\n MIPS: Lantiq: Add missing clk_enable and clk_disable functions.\n MIPS: AR7: Fix trailing semicolon bug in clock.c\n MAINTAINERS: Update MIPS entry.\n MIPS: BCM63xx: Remove duplicate PERF_IRQSTAT_REG definition\n ...\n" }, { "commit": "bf28607fbe529e20180080c4a0295b0a47834fde", "tree": "101ca3c89186e1feb07ceb61ba91a9150d19218f", "parents": [ "f0daaaf5236297ea81ec7732cd0df5dbd84a5042" ], "author": { "name": "David Daney", "email": "david.daney@cavium.com", "time": "Tue Jul 05 16:34:46 2011 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jul 26 06:47:47 2011 +0100" }, "message": "MIPS: Close races in TLB modify handlers.\n\nPage table entries are made invalid by writing a zero into the the PTE\nslot in a page table. This creates a race condition with the TLB\nmodify handlers when they are updating the PTE.\n\nCPU0 CPU1\n\nTest for _PAGE_PRESENT\n. set to not _PAGE_PRESENT (zero)\nSet to _PAGE_VALID\n\nSo now the page not present value (zero) is suddenly valid and user\nspace programs have access to physical page zero.\n\nWe close the race by putting the test for _PAGE_PRESENT and setting of\n_PAGE_VALID into an atomic LL/SC section. This requires more registers\nthan just K0 and K1 in the handlers, so we need to save some registers\nto a save area and then restore them when we are done.\n\nThe save area is an array of cacheline aligned structures that should\nnot suffer cache line bouncing as they are CPU private.\n\n[ralf@linux-mips.org: Fix !defined(CONFIG_MIPS_PGD_C0_CONTEXT) build error.]\n\nSigned-off-by: David Daney \u003cdavid.daney@cavium.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2577/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "464fd83e841a16f4ea1325b33eb08170ef5cd1f4", "tree": "2e182c5da3bf09701e048ec7edef90665feb9f44", "parents": [ "273f2d7e64f9fd22192b4cd31e7408284a721e69" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Wed Jan 05 23:31:30 2011 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Jul 25 17:26:54 2011 +0100" }, "message": "MIPS: Limit fixrange_init() to the FIXMAP region\n\nfixrange_init() allocates page tables for all addresses higher than\nFIXADDR_TOP. On processors that override the default FIXADDR_TOP\naddress of 0xfffe_0000, this can consume up to 4 pages (1 page per 4MB)\nfor pgd\u0027s that are never used.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1980/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d0023c4a0af1ff16fe183257682025bfcc068e85", "tree": "3773ba49525c135e13423ec5fc5df0bf80bbdd9f", "parents": [ "b6da0ffb09ad4468e6749488909f04f1efac5de3" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Mon Sep 06 21:03:46 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Jul 25 17:26:53 2011 +0100" }, "message": "MIPS: Add SYNC after cacheflush\n\nOn processors with deep write buffers, it is likely that many cycles\nwill pass between a CACHE instruction and the time the data actually\ngets written out to DRAM. Add a SYNC instruction to ensure that the\nbuffers get emptied before the flush functions return.\n\nActual problem seen in the wild:\n\n1) dma_alloc_coherent() allocates cached memory\n\n2) memset() is called to clear the new pages\n\n3) dma_cache_wback_inv() is called to flush the zero data out to memory\n\n4) dma_alloc_coherent() returns an uncached (kseg1) pointer to the\nfreshly allocated pages\n\n5) Caller writes data through the kseg1 pointer\n\n6) Buffered writeback data finally gets flushed out to DRAM\n\n7) Part of caller\u0027s data is inexplicably zeroed out\n\nThis patch adds SYNC between steps 3 and 4, which fixed the problem.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: \nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b6da0ffb09ad4468e6749488909f04f1efac5de3", "tree": "c2c3f5f2a00531809c309fffb9ee9ab28bce44a8", "parents": [ "e36863a550da44595b155c6b86ff46b50cbff5c0" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Sun May 30 00:32:51 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Jul 25 17:26:52 2011 +0100" }, "message": "MIPS: pfn_valid() is broken on low memory HIGHMEM systems\n\npfn_valid() compares the PFN to max_mapnr:\n\n __pfn \u003e\u003d min_low_pfn \u0026\u0026 __pfn \u003c max_mapnr;\n\nOn HIGHMEM kernels, highend_pfn is used to set the value of max_mapnr.\nUnfortunately, highend_pfn is left at zero if the system does not\nactually have enough RAM to reach into the HIGHMEM range. This causes\npfn_valid() to always return false, and when debug checks are enabled\nthe kernel will fail catastrophically:\n\nMemory: 22432k/32768k available (2249k kernel code, 10336k reserved, 653k data, 1352k init, 0k highmem)\nNR_IRQS:128\nkfree_debugcheck: out of range ptr 81c02900h.\nKernel bug detected[#1]:\nCpu 0\n$ 0 : 00000000 10008400 00000034 00000000\n$ 4 : 8003e160 802a0000 8003e160 00000000\n$ 8 : 00000000 0000003e 00000747 00000747\n...\n\nOn such a configuration, max_low_pfn should be used to set max_mapnr.\n\nThis was seen on 2.6.34.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nTo: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1992/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e36863a550da44595b155c6b86ff46b50cbff5c0", "tree": "62afb6746e304136bddec487a1361de22c48cc21", "parents": [ "d0be89f6c2570a63ac44ccdd12473a54243cd296" ], "author": { "name": "Dezhong Diao", "email": "dediao@cisco.com", "time": "Wed Oct 13 16:57:35 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Jul 25 17:26:52 2011 +0100" }, "message": "MIPS: HIGHMEM DMA on noncoherent MIPS32 processors\n\n[v4: Patch applies to linux-queue.git with kmap_atomic patches:\n https://patchwork.kernel.org/patch/189932/\n https://patchwork.kernel.org/patch/194552/\n https://patchwork.kernel.org/patch/189912/ ]\n\nThe MIPS DMA coherency functions do not work properly (i.e. kernel oops)\nwhen HIGHMEM pages are passed in as arguments. Use kmap_atomic() to\ntemporarily map high pages for cache maintenance operations.\n\nTested on a 2.6.36-rc7 1GB HIGHMEM SMP no-alias system.\n\nSigned-off-by: Dezhong Diao \u003cdediao@cisco.com\u003e\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: Dezhong Diao \u003cdediao@cisco.com\u003e\nCc: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: David VomLehn \u003cdvomlehn@cisco.com\u003e\nCc: Sergei Shtylyov \u003csshtylyov@mvista.com\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1695/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d0be89f6c2570a63ac44ccdd12473a54243cd296", "tree": "3ba987eb48751ab94b75bb2e74e4e33b89192b34", "parents": [ "3a7136602b6fcb27073a241006cd5d029cacfafa" ], "author": { "name": "Jian Peng", "email": "jipeng2005@gmail.com", "time": "Tue May 17 12:27:49 2011 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Jul 25 17:26:51 2011 +0100" }, "message": "MIPS: topdown mmap support\n\nThis patch introduced topdown mmap support in user process address\nspace allocation policy.\n\nRecently, we ran some large applications that use mmap heavily and\nlead to OOM due to inflexible mmap allocation policy on MIPS32.\n\nSince most other major archs supported it for years, it is reasonable\nto follow the trend and reduce the pain of porting applications.\n\nDue to cache aliasing concern, arch_get_unmapped_area_topdown() and\nother helper functions are implemented in arch/mips/kernel/syscall.c.\n\nSigned-off-by: Jian Peng \u003cjipeng2005@gmail.com\u003e\nCc: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2389/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "a8b0ca17b80e92faab46ee7179ba9e99ccb61233", "tree": "a4a6282139f26458f80dcbe21c709a9290e84143", "parents": [ "1880c4ae182afb5650c5678949ecfe7ff66a724e" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Mon Jun 27 14:41:57 2011 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Jul 01 11:06:35 2011 +0200" }, "message": "perf: Remove the nmi parameter from the swevent and overflow interface\n\nThe nmi parameter indicated if we could do wakeups from the current\ncontext, if not, we would set some state and self-IPI and let the\nresulting interrupt do the wakeup.\n\nFor the various event classes:\n\n - hardware: nmi\u003d0; PMI is in fact an NMI or we run irq_work_run from\n the PMI-tail (ARM etc.)\n - tracepoint: nmi\u003d0; since tracepoint could be from NMI context.\n - software: nmi\u003d[0,1]; some, like the schedule thing cannot\n perform wakeups, and hence need 0.\n\nAs one can see, there is very little nmi\u003d1 usage, and the down-side of\nnot using it is that on some platforms some software events can have a\njiffy delay in wakeup (when arch_irq_work_raise isn\u0027t implemented).\n\nThe up-side however is that we can remove the nmi parameter and save a\nbunch of conditionals in fast paths.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Michael Cree \u003cmcree@orcon.net.nz\u003e\nCc: Will Deacon \u003cwill.deacon@arm.com\u003e\nCc: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nCc: Anton Blanchard \u003canton@samba.org\u003e\nCc: Eric B Munson \u003cemunson@mgebm.net\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: David S. Miller \u003cdavem@davemloft.net\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Jason Wessel \u003cjason.wessel@windriver.com\u003e\nCc: Don Zickus \u003cdzickus@redhat.com\u003e\nLink: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.org\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "1c395176962176660bb108f90e97e1686cfe0d85", "tree": "dc3b91d8d0d9b00a59f26677cce0f9eb90b1772f", "parents": [ "ff075d605511784c79cbf0ae73d90e07238267b3" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Tue May 24 17:11:58 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 25 08:39:16 2011 -0700" }, "message": "mm: now that all old mmu_gather code is gone, remove the storage\n\nFold all the mmu_gather rework patches into one for submission\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nReported-by: Hugh Dickins \u003chughd@google.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Richard Weinberger \u003crichard@nod.at\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nCc: Mel Gorman \u003cmel@csn.ul.ie\u003e\nCc: KOSAKI Motohiro \u003ckosaki.motohiro@jp.fujitsu.com\u003e\nCc: Nick Piggin \u003cnpiggin@kernel.dk\u003e\nCc: Namhyung Kim \u003cnamhyung@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "57d19e80f459dd845fb3cfeba8e6df8471bac142", "tree": "8254766715720228db3d50f1ef3c7fe003c06d65", "parents": [ "ee9ec4f82049c678373a611ce20ac67fe9ad836e", "e64851f5a0ad6ec991f74ebb3108c35aa0323d5f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 23 09:12:26 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 23 09:12:26 2011 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)\n b43: fix comment typo reqest -\u003e request\n Haavard Skinnemoen has left Atmel\n cris: typo in mach-fs Makefile\n Kconfig: fix copy/paste-ism for dell-wmi-aio driver\n doc: timers-howto: fix a typo (\"unsgined\")\n perf: Only include annotate.h once in tools/perf/util/ui/browsers/annotate.c\n md, raid5: Fix spelling error in comment (\u0027Ofcourse\u0027 --\u003e \u0027Of course\u0027).\n treewide: fix a few typos in comments\n regulator: change debug statement be consistent with the style of the rest\n Revert \"arm: mach-u300/gpio: Fix mem_region resource size miscalculations\"\n audit: acquire creds selectively to reduce atomic op overhead\n rtlwifi: don\u0027t touch with treewide double semicolon removal\n treewide: cleanup continuations and remove logging message whitespace\n ath9k_hw: don\u0027t touch with treewide double semicolon removal\n include/linux/leds-regulator.h: fix syntax in example code\n tty: fix typo in descripton of tty_termios_encode_baud_rate\n xtensa: remove obsolete BKL kernel option from defconfig\n m68k: fix comment typo \u0027occcured\u0027\n arch:Kconfig.locks Remove unused config option.\n treewide: remove extra semicolons\n ...\n" }, { "commit": "6f6c3c33c027f2c83d53e8562cd9daa73fe8108b", "tree": "51cff15bb4f6e4f8263833c74aec6cda4782d4d5", "parents": [ "9c1e8a9138ff92a4ff816ea8a1884ad2461a993a" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu May 19 09:21:33 2011 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu May 19 09:55:49 2011 +0100" }, "message": "MIPS: Move arch_get_unmapped_area and gang to new file.\n\nIt never really belonged into syscall.c and it\u0027s about to become well more\ncomplex.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7f058e852b229ec77b37676b2b78baf2e78ffee8", "tree": "5c0415b6fdeae671c4bbac77e7660d3588cc15f0", "parents": [ "5c642506740ecbf20fb7a9e482287e4e5c639e5c" ], "author": { "name": "Jayachandran C", "email": "jayachandranc@netlogicmicro.com", "time": "Sat May 07 01:36:57 2011 +0530" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu May 19 09:55:40 2011 +0100" }, "message": "MIPS: Kconfig and Makefile update for Netlogic XLR/XLS\n\nAdd NLM_XLR_BOARD, CPU_XLR and other config options\nMakefile updates, mostly based on r4k\n\nSigned-off-by: Jayachandran C \u003cjayachandranc@netlogicmicro.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2334/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "efa0f81c11021c95b1e72c65868115b6fb4ecc6a", "tree": "493e0d3db7107e3aafc66bb44f8d5df751395e33", "parents": [ "3c595a515dbb61ae96e8f5607d895820aa06e870" ], "author": { "name": "Jayachandran C", "email": "jayachandranc@netlogicmicro.com", "time": "Sat May 07 01:36:21 2011 +0530" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu May 19 09:55:40 2011 +0100" }, "message": "MIPS: Netlogic: Cache, TLB support and feature overrides for XLR\n\nCPU_XLR case added to mm/tlbex.c\nCPU_XLR case added to mm/c-r4k.c for PINDEX attribute\nFeature overrides for XLR cpu.\n\nSigned-off-by: Jayachandran C \u003cjayachandranc@netlogicmicro.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2333/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4a9040f451c32cd62971ecda1cb5bc4aed444c78", "tree": "29f5f9eb2be8cb0a3be20d7d7f35422c200c659a", "parents": [ "71271aab8cbdeb9612761db3230fe8dadb9a01c3" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Mar 29 10:54:54 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 10 18:15:22 2011 +0100" }, "message": "MIPS: tlbex: Fix GCC 4.6.0 build error\n\n CC arch/mips/mm/tlbex.o\narch/mips/mm/tlbex.c: In function \u0027build_r4000_tlb_refill_handler\u0027:\narch/mips/mm/tlbex.c:1155:22: error: variable \u0027vmalloc_mode\u0027 set but not used [-Werror\u003dunused-but-set-variable]\narch/mips/mm/tlbex.c:1154:28: error: variable \u0027htlb_info\u0027 set but not used [-Werror\u003dunused-but-set-variable]\ncc1: all warnings being treated as errors\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "71271aab8cbdeb9612761db3230fe8dadb9a01c3", "tree": "3a520edc32df6024158e7441a45003404a87f402", "parents": [ "c54794d19e61472156e37263c074225574c80df1" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Mar 29 10:50:38 2011 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue May 10 18:15:22 2011 +0100" }, "message": "MIPS: c-r4k: Fix GCC 4.6.0 build error\n\n CC arch/mips/mm/c-r4k.o\narch/mips/mm/c-r4k.c: In function \u0027probe_scache\u0027:\narch/mips/mm/c-r4k.c:1078:6: error: variable \u0027tmp\u0027 set but not used [-Werror\u003dunused-but-set-variable]\ncc1: all warnings being treated as errors\n\nOlder GCC versions didn\u0027t warn about the unused variable tmp because it was\ngetting initialized.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "07f9479a40cc778bc1462ada11f95b01360ae4ff", "tree": "0676cf38df3844004bb3ebfd99dfa67a4a8998f5", "parents": [ "9d5e6bdb3013acfb311ab407eeca0b6a6a3dedbf", "cd2e49e90f1cae7726c9a2c54488d881d7f1cd1c" ], "author": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Tue Apr 26 10:22:15 2011 +0200" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Tue Apr 26 10:22:59 2011 +0200" }, "message": "Merge branch \u0027master\u0027 into for-next\n\nFast-forwarded to current state of Linus\u0027 tree as there are patches to be\napplied for files that didn\u0027t exist on the old branch.\n" }, { "commit": "79add6277396b91c638f16eb2f1338badc47760d", "tree": "3de04567ab87ed968db0c1be1f7a2c01a11ae31d", "parents": [ "8d1a7ed9d0ce3556a962a7472a3d09a8332d030a" ], "author": { "name": "Justin P. Mattock", "email": "justinmattock@gmail.com", "time": "Mon Apr 04 14:15:29 2011 -0700" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Wed Apr 06 06:19:38 2011 -0700" }, "message": "update David Miller\u0027s old email address\n\nSigned-off-by: Justin P. Mattock \u003cjustinmattock@gmail.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "25985edcedea6396277003854657b5f3cb31a628", "tree": "f026e810210a2ee7290caeb737c23cb6472b7c38", "parents": [ "6aba74f2791287ec407e0f92487a725a25908067" ], "author": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Wed Mar 30 22:57:33 2011 -0300" }, "committer": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Thu Mar 31 11:26:23 2011 -0300" }, "message": "Fix common misspellings\n\nFixes generated by \u0027codespell\u0027 and manually reviewed.\n\nSigned-off-by: Lucas De Marchi \u003clucas.demarchi@profusion.mobi\u003e\n" }, { "commit": "d3ce0e98b7fe17bb1dec9f6d7c50213db01e7189", "tree": "7be0c825c8f8e894c4bec17762046d1f774bb4e9", "parents": [ "91b51f30084911754aed004bd3792f71f7bf0843" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Mon Jan 24 14:51:37 2011 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Mar 14 21:07:26 2011 +0100" }, "message": "MIPS: Fix GCC-4.6 \u0027set but not used\u0027 warning in arch/mips/mm/init.c\n\nUnder some combinations of CONFIG_*, lastpfn in page_is_ram is \u0027set\nbut not used\u0027. Mark it as __maybe_unused to quiet the warning/error.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2033/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e1c87d2a5567c7940d129a6045efadc4b8c0f888", "tree": "d5f224e735c2e6f2fdda82e56f9e0a4bc0e2fcf0", "parents": [ "b9f07eb2f25a64098e2ba223c1a2fe2a8f249e01" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Jan 19 15:24:42 2011 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Mar 14 21:07:24 2011 +0100" }, "message": "MIPS: Add an unreachable return statement to satisfy buggy GCCs.\n\nIt was reported that GCC-4.3.3 (with CodeSourcery extensions) fails\nwithout this.\n\nReported-by: Jonas Gorski \u003cjonas.gorski@gmail.com\u003e\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2010/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "8d662c8d34a05e8e47deaa9e22fe770dc557c2d3", "tree": "96f8ee1bcbda6aded36a9f551f4df8179e33782c", "parents": [ "2c8c53e28f178577dfdf3a69731b998b7e3df8ae" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Mon Dec 27 18:18:29 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:24 2011 +0100" }, "message": "MIPS: Use WARN() in uasm for better diagnostics.\n\nOn the off chance that uasm ever warns about overflow, there is no way\nto know what the offending instruction is.\n\nChange the printks to WARNs, so we can get a nice stack trace. It has\nthe added benefit of being much more noticeable than the short single\nline warning message, so is less likely to be ignored.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1905/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "2c8c53e28f178577dfdf3a69731b998b7e3df8ae", "tree": "0b65ff7fa0ac67795698be7a50559d77d3bc72db", "parents": [ "bb3d68c30a00918d4c9fa02a5c17a5aacf597977" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Mon Dec 27 18:07:57 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:23 2011 +0100" }, "message": "MIPS: Optimize TLB handlers for Octeon CPUs\n\nOcteon can use scratch registers in the TLB handlers. Octeon II can\nuse LDX instructions.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1904/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "bb3d68c30a00918d4c9fa02a5c17a5aacf597977", "tree": "6d6db066452de4a2ec28f24bc7b0c287eabd9967", "parents": [ "cc33ae437975416a1b78f99e2715e91ab643526a" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Mon Dec 27 18:07:56 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:23 2011 +0100" }, "message": "MIPS: Add LDX and LWX instructions to uasm.\n\nNeeded by Octeon II optimized TLB handlers.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPachwork: https://patchwork.linux-mips.org/patch/1903/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "cc33ae437975416a1b78f99e2715e91ab643526a", "tree": "958e4165ddcd45bf6ba9c498fa8f736dcbcbe770", "parents": [ "afc7c9864a2d1b0c398425aac84b8a095c8dfa7c" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Mon Dec 20 15:54:50 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:23 2011 +0100" }, "message": "MIPS: Use BBIT instructions in TLB handlers\n\nIf the CPU supports BBIT0 and BBIT1, use them in TLB handlers as they\nare more efficient than an AND followed by an branch and then\nrestoring the clobbered register.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1873/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3d8bfdd0307223de678962f1c1907a7cec549136", "tree": "007146d1452d054e5e676b5a930d48292b0ae4b6", "parents": [ "c42aef0947d717849f31965ecc0778707839bfe0" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Tue Dec 21 14:19:11 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:22 2011 +0100" }, "message": "MIPS: Use C0_KScratch (if present) to hold PGD pointer.\n\nDecide at runtime to use either Context or KScratch to hold the PGD\npointer.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1876/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "c42aef0947d717849f31965ecc0778707839bfe0", "tree": "7ce30dcb07e85b2af44045bb9be3e4da99074ae8", "parents": [ "e77c32fe284a4da1b4e0994890a4d3527812eb61" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Tue Dec 21 14:19:10 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 18 19:30:22 2011 +0100" }, "message": "MIPS: Add DINSM to uasm.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1875/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "081d835fa4ce70ad1e42ac76de850a49e23a1557", "tree": "8d76d9a5276d3eb8f6fc4a0ab3555f3234a48022", "parents": [ "c15524a40a1603dc56a8691c4f50172fb86c23d8" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Tue Nov 02 22:28:01 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Dec 17 19:44:35 2010 +0000" }, "message": "MIPS: Fix build errors in sc-mips.c\n\nSeen with malta_defconfig on Linus\u0027 tree:\n\n CC arch/mips/mm/sc-mips.o\narch/mips/mm/sc-mips.c: In function \u0027mips_sc_is_activated\u0027:\narch/mips/mm/sc-mips.c:77: error: \u0027config2\u0027 undeclared (first use in this function)\narch/mips/mm/sc-mips.c:77: error: (Each undeclared identifier is reported only once\narch/mips/mm/sc-mips.c:77: error: for each function it appears in.)\narch/mips/mm/sc-mips.c:81: error: \u0027tmp\u0027 undeclared (first use in this function)\nmake[2]: *** [arch/mips/mm/sc-mips.o] Error 1\nmake[1]: *** [arch/mips/mm] Error 2\nmake: *** [arch/mips] Error 2\n\n[Ralf: Cosmetic changes to minimize the number of arguments passed to\nmips_sc_is_activated]\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1752/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "a3aad4aaf871045ab1dd9c99be6c1ace881d8eb0", "tree": "17fa5ace3d47ef500b0c8e1e1fc2d5adcf02ba03", "parents": [ "d002aaadf84c081623a0a8502c122d1492fbd47c" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Dec 09 19:14:09 2010 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Dec 16 18:11:01 2010 +0000" }, "message": "MIPS: Rename mips_dma_cache_sync back to dma_cache_sync\n\nThis fixes IP22 and IP28 build errors.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "ea31a6b203710c03d1fc025377a19572e620588a", "tree": "b9a39c79e7080b9790936618a704439d057cb78a", "parents": [ "af231172634b5c0923fa7484a043fadcc07e899e" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Wed Oct 20 20:05:42 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:52 2010 +0100" }, "message": "MIPS: Honor L2 bypass bit\n\nOn many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates\nthat the L2 cache is disabled and therefore Linux should not attempt\nto use it.\n\n[Ralf: Moved the code added by Kevin\u0027s original patch into a separate\nfunction that can easily be replaced for platforms that need more a\ndifferent probe.]\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: linux-mips@linux-mips.org\u003e\nCc: \u003clinux-kernel@vger.kernel.org\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1723/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "602977b0d672687909b0cb0542ede134ed6ef858", "tree": "8f40b3cfbf2cc32a445a69a548837521fcdfd7d6", "parents": [ "3a9ab99e0341558e451327fbbfc39b0d3cff7e9a" ], "author": { "name": "Kevin Cernekee", "email": "cernekee@gmail.com", "time": "Sat Oct 16 14:22:30 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:50 2010 +0100" }, "message": "MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code\n\nBMIPS processor cores are used in 50+ different chipsets spread across\n5+ product lines. In many cases the chipsets do not share the same\nperipheral register layouts, the same register blocks, the same\ninterrupt controllers, the same memory maps, or much of anything else.\n\nBut, across radically different SoCs that share nothing more than the\nsame BMIPS CPU, a few things are still mostly constant:\n\nSMP operations\nAccess to performance counters\nDMA cache coherency quirks\nCache and memory bus configuration\n\nSo, it makes sense to treat each BMIPS processor type as a generic\n\"building block,\" rather than tying it to a specific SoC. This makes it\neasier to support a large number of BMIPS-based chipsets without\nunnecessary duplication of code, and provides the infrastructure needed\nto support BMIPS-proprietary features.\n\nSigned-off-by: Kevin Cernekee \u003ccernekee@gmail.com\u003e\nCc: mbizon@freebox.fr\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nTested-by: Florian Fainelli \u003cffainelli@freebox.fr\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1706/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\n" }, { "commit": "7f788d2d53085815d474559cd51ef1f38b0a9bb8", "tree": "32c2b6af15da818a02502a678225ff4de754b542", "parents": [ "6dbd972850c092e50e10bd14a3324e2abe88997a" ], "author": { "name": "Deng-Cheng Zhu", "email": "dengcheng.zhu@gmail.com", "time": "Tue Oct 12 19:37:21 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:48 2010 +0100" }, "message": "MIPS: add support for software performance events\n\nSoftware events are required as part of the measurable stuff by the\nLinux performance counter subsystem. Here is the list of events added by\nthis patch:\nPERF_COUNT_SW_PAGE_FAULTS\nPERF_COUNT_SW_PAGE_FAULTS_MIN\nPERF_COUNT_SW_PAGE_FAULTS_MAJ\nPERF_COUNT_SW_ALIGNMENT_FAULTS\nPERF_COUNT_SW_EMULATION_FAULTS\n\nSigned-off-by: Deng-Cheng Zhu \u003cdengcheng.zhu@gmail.com\u003e\nTo: linux-mips@linux-mips.org\nCc: a.p.zijlstra@chello.nl\nCc: paulus@samba.org\nCc: mingo@elte.hu\nCc: acme@redhat.com\nCc: jamie.iles@picochip.com\nAcked-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nReviewed-by: Matt Fleming \u003cmatt@console-pimps.org\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1686/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "c9941158fd8a539a56b0e8a4740ec1f6beb23ea3", "tree": "73e3868737061e1d5b0b61c182ea443e3ccd94e3", "parents": [ "468ffde46d429fbd291b0ef43a06afe9c837629f" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:53 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:43 2010 +0100" }, "message": "MIPS: Octeon: Apply CN63XXP1 errata workarounds.\n\nThe CN63XXP1 needs a couple of workarounds to ensure memory is not written\nin unexpected ways.\n\nAll PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We\npass a flag to the assembler to cover compiler generated code, and patch\nuasm for the dynamically generated code.\n\nThe write buffer threshold is reduced to 4.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1672/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f8bf7e688c226ba83b35a1547146e296e14b33c7", "tree": "c46c98c7cb29e3c93d4b54c5e8e991e19485b79d", "parents": [ "1584d7f2d58999c00066a4afc4ad95e07b2a04e8" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Oct 07 16:03:44 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:36 2010 +0100" }, "message": "MIPS: Octeon: Handle Octeon II caches.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1664/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "48e1fd5a81416a037f5a48120bf281102f2584e2", "tree": "c5c4bd344f50493bb1d1c36d485300e9061c5aa2", "parents": [ "43e4f7ae4b4a96b5e84f6e1592d2e9353138e88c" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Oct 01 13:27:32 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:31 2010 +0100" }, "message": "MIPS: Convert DMA to use dma-mapping-common.h\n\nUse asm-generic/dma-mapping-common.h to handle all DMA mapping operations\nand establish a default get_dma_ops() that forwards all operations to the\nexisting code.\n\nAugment dev_archdata to carry a pointer to the struct dma_map_ops, allowing\nDMA operations to be overridden on a per device basis. Currently this is\nnever filled in, so the default dma_map_ops are used. A follow-on patch\nsets this for Octeon PCI devices.\n\nAlso initialize the dma_debug system as it is now used if it is configured.\n\nIncludes fixes by Kevin Cernekee \u003ccernekee@gmail.com\u003e.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1637/\nPatchwork: http://patchwork.linux-mips.org/patch/1678/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "48a26e60c6a5adb0d2f3ba56ea7c5bbb58d2118e", "tree": "627c04e1a90ff6330c9c1e47164193eb9c2b3170", "parents": [ "c8c5f3fd9f0518cef58c9114513eee61855dec44" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:25 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:25 2010 +0100" }, "message": "MIPS: Remove wait argument of r4k_on_each_cpu\n\nAll callers were passing in 1 anyway.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "c8c5f3fd9f0518cef58c9114513eee61855dec44", "tree": "6cc8cea12b18a3409fed5e84c1afb20596ebb094", "parents": [ "7837314d141c661c70bc13c5050694413ecfe14a" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:25 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Oct 29 19:08:25 2010 +0100" }, "message": "MIPS: More detailed description of r4k_on_each_cpu\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "20273941f2129aa5a432796d98a276ed73d60782", "tree": "85da0d951ac10f239f81ad7f69559fdeb692095b", "parents": [ "a8e23a291852cd7c4fb5ca696dbb93912185ad10" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Wed Oct 27 15:32:58 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 27 18:03:05 2010 -0700" }, "message": "mm: fix race in kunmap_atomic()\n\nChristoph reported a nice splat which illustrated a race in the new stack\nbased kmap_atomic implementation.\n\nThe problem is that we pop our stack slot before we\u0027re completely done\nresetting its state -- in particular clearing the PTE (sometimes that\u0027s\nCONFIG_DEBUG_HIGHMEM). If an interrupt happens before we actually clear\nthe PTE used for the last slot, that interrupt can reuse the slot in a\ndirty state, which triggers a BUG in kmap_atomic().\n\nFix this by introducing kmap_atomic_idx() which reports the current slot\nindex without actually releasing it and use that to find the PTE and delay\nthe _pop() until after we\u0027re completely done.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nReported-by: Christoph Hellwig \u003chch@infradead.org\u003e\nAcked-by: Rik van Riel \u003criel@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "3e4d3af501cccdc8a8cca41bdbe57d54ad7e7e73", "tree": "2ce507f7ec7275563653e52f18606aba4f99b7f1", "parents": [ "61ecdb801ef2cd28e32442383106d7837d76deac" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Tue Oct 26 14:21:51 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Oct 26 16:52:08 2010 -0700" }, "message": "mm: stack based kmap_atomic()\n\nKeep the current interface but ignore the KM_type and use a stack based\napproach.\n\nThe advantage is that we get rid of crappy code like:\n\n\t#define __KM_PTE\t\t\t\\\n\t\t(in_nmi() ? KM_NMI_PTE : \t\\\n\t\t in_irq() ? KM_IRQ_PTE :\t\\\n\t\t KM_PTE0)\n\nand in general can stop worrying about what context we\u0027re in and what kmap\nslots might be appropriate for that.\n\nThe downside is that FRV kmap_atomic() gets more expensive.\n\nFor now we use a CPP trick suggested by Andrew:\n\n #define kmap_atomic(page, args...) __kmap_atomic(page)\n\nto avoid having to touch all kmap_atomic() users in a single patch.\n\n[ not compiled on:\n - mn10300: the arch doesn\u0027t actually build with highmem to begin with ]\n\n[akpm@linux-foundation.org: coding-style fixes]\n[akpm@linux-foundation.org: fix up drivers/gpu/drm/i915/intel_overlay.c]\nAcked-by: Rik van Riel \u003criel@redhat.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Hugh Dickins \u003chughd@google.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Steven Rostedt \u003crostedt@goodmis.org\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Dave Airlie \u003cairlied@linux.ie\u003e\nCc: Li Zefan \u003clizf@cn.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "a2e715a86c6dc85fb4a13c0c818637131de44cd2", "tree": "3a7cc8414c582403eb87cb573b3f685fce18414f", "parents": [ "244599469f4c5860c8a4ae8fa8c6907a10caeccf" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Sep 02 23:22:23 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Oct 04 18:33:56 2010 +0100" }, "message": "MIPS: DMA: Fix computation of DMA flags from device\u0027s coherent_dma_mask.\n\nThis only matters for ISA devices with a 24-bit DMA limit or for devices\nwith a 32-bit DMA limit on systems with ZONE_DMA32 enabled. The latter\ncurrently only affects 32-bit PCI cards on Sibyte-based systems with more\nthan 1GB RAM installed.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "543001f8d8a878c3babe4525cb16d83d25c16762", "tree": "5a20cb97445a6cf5576b319d1708f6f50fec3cb3", "parents": [ "26deda5ceedbe28df4beb3b98e3fbce281b53a07" ], "author": { "name": "Ricardo Mendoza", "email": "ricmm@gentoo.org", "time": "Fri Aug 06 11:12:57 2010 -0430" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Oct 04 18:33:54 2010 +0100" }, "message": "MIPS: RM7000: Symbol should be static\n\nSigned-off-by: Ricardo Mendoza \u003cricmm@gentoo.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1540/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3b9c6c11f519718d618f5d7c9508daf78b207f6f", "tree": "6c99992e25b9305fbe3977dff30f5eeb445f25e0", "parents": [ "d80e0d96a328cc864a1cb359f545a6ed0c61812d" ], "author": { "name": "FUJITA Tomonori", "email": "fujita.tomonori@lab.ntt.co.jp", "time": "Tue Aug 10 18:03:25 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Aug 11 08:59:21 2010 -0700" }, "message": "dma-mapping: remove dma_is_consistent API\n\nArchitectures implement dma_is_consistent() in different ways (some\nmisinterpret the definition of API in DMA-API.txt). So it hasn\u0027t been so\nuseful for drivers. We have only one user of the API in tree. Unlikely\nout-of-tree drivers use the API.\n\nEven if we fix dma_is_consistent() in some architectures, it doesn\u0027t look\nuseful at all. It was invented long ago for some old systems that can\u0027t\nallocate coherent memory at all. It\u0027s better to export only APIs that are\ndefinitely necessary for drivers.\n\nLet\u0027s remove this API.\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nCc: James Bottomley \u003cJames.Bottomley@HansenPartnership.com\u003e\nReviewed-by: Konrad Rzeszutek Wilk \u003ckonrad.wilk@oracle.com\u003e\nCc: \u003clinux-arch@vger.kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "597781f3e51f48ef8e67be772196d9e9673752c4", "tree": "6e1974bc899889da40f2fde47b04a5ece0bd3399", "parents": [ "3edd4fc9537d95e460d502987c63a90d6b9a7a82" ], "author": { "name": "Cesar Eduardo Barros", "email": "cesarb@cesarb.net", "time": "Mon Aug 09 17:18:32 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Aug 09 20:44:54 2010 -0700" }, "message": "kmap_atomic: make kunmap_atomic() harder to misuse\n\nkunmap_atomic() is currently at level -4 on Rusty\u0027s \"Hard To Misuse\"\nlist[1] (\"Follow common convention and you\u0027ll get it wrong\"), except in\nsome architectures when CONFIG_DEBUG_HIGHMEM is set[2][3].\n\nkunmap() takes a pointer to a struct page; kunmap_atomic(), however, takes\ntakes a pointer to within the page itself. This seems to once in a while\ntrip people up (the convention they are following is the one from\nkunmap()).\n\nMake it much harder to misuse, by moving it to level 9 on Rusty\u0027s list[4]\n(\"The compiler/linker won\u0027t let you get it wrong\"). This is done by\nrefusing to build if the type of its first argument is a pointer to a\nstruct page.\n\nThe real kunmap_atomic() is renamed to kunmap_atomic_notypecheck()\n(which is what you would call in case for some strange reason calling it\nwith a pointer to a struct page is not incorrect in your code).\n\nThe previous version of this patch was compile tested on x86-64.\n\n[1] http://ozlabs.org/~rusty/index.cgi/tech/2008-04-01.html\n[2] In these cases, it is at level 5, \"Do it right or it will always\n break at runtime.\"\n[3] At least mips and powerpc look very similar, and sparc also seems to\n share a common ancestor with both; there seems to be quite some\n degree of copy-and-paste coding here. The include/asm/highmem.h file\n for these three archs mention x86 CPUs at its top.\n[4] http://ozlabs.org/~rusty/index.cgi/tech/2008-03-30.html\n[5] As an aside, could someone tell me why mn10300 uses unsigned long as\n the first parameter of kunmap_atomic() instead of void *?\n\nSigned-off-by: Cesar Eduardo Barros \u003ccesarb@cesarb.net\u003e\nCc: Russell King \u003clinux@arm.linux.org.uk\u003e (arch/arm)\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e (arch/mips)\nCc: David Howells \u003cdhowells@redhat.com\u003e (arch/frv, arch/mn10300)\nCc: Koichi Yasutake \u003cyasutake.koichi@jp.panasonic.com\u003e (arch/mn10300)\nCc: Kyle McMartin \u003ckyle@mcmartin.ca\u003e (arch/parisc)\nCc: Helge Deller \u003cdeller@gmx.de\u003e (arch/parisc)\nCc: \"James E.J. Bottomley\" \u003cjejb@parisc-linux.org\u003e (arch/parisc)\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e (arch/powerpc)\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e (arch/powerpc)\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e (arch/sparc)\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e (arch/x86)\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e (arch/x86)\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e (arch/x86)\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e (include/asm-generic)\nCc: Rusty Russell \u003crusty@rustcorp.com.au\u003e (\"Hard To Misuse\" list)\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "c1bf207d6ee1eb72e9c10365edbdc7c9ff7fb9b0", "tree": "4c5875c8bd9087cd7b2193ac264c002cc384febb", "parents": [ "2ea6399f553bf9a47260723b44d50f747e310218" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Tue Aug 03 11:22:20 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:26:29 2010 +0100" }, "message": "MIPS: kprobe: Add support.\n\nThis patch is based on previous work by Sony and Himanshu Chauhan.\n\nI have done some cleanup and implemented JProbes and KRETPROBES. The\nKRETPROBES part is pretty much copied verbatim from powerpc. A possible\nfuture enhance might be to factor out the common code.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: Himanshu Chauhan \u003chschauhan@nulltrace.org\u003e\nTo: linux-mips@linux-mips.org\nTo: ananth@in.ibm.com,\nTo: anil.s.keshavamurthy@intel.com\nTo: davem@davemloft.net\nTo: masami.hiramatsu.pt@hitachi.com\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1525/\nPatchwork: https://patchwork.linux-mips.org/patch/1530/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "22b0763a2328434ac68cca884e1b7d350ca61332", "tree": "59635ba7ba3368d40defdebc07c94d61d5941491", "parents": [ "5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Jul 23 18:41:43 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:26:21 2010 +0100" }, "message": "MIPS: uasm: Add option to export uasm API.\n\nA \u0027select EXPORT_UASM\u0027 in Kconfig will cause the uasm to be exported\nfor use in modules. When it is exported, all the uasm data and code\ncease to be __init and __initdata.\n\nAlso daddiu_bug cannot be __cpuinitdata if uasm is exported. The\ncleanest thing is to just make it normal data.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nTo: wim@iguana.be\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1500/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf", "tree": "e307c9bccdf7a5dfd32fd5157b0d8b5f617a8dfc", "parents": [ "de6d5b555c1887b5b9b59854a45ebd4805fb4b39" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Jul 23 18:41:42 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:26:21 2010 +0100" }, "message": "MIPS: uasm: Add BBIT0 and BBIT1 instructions\n\nThese are OCTEON specific instructions.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nTo: wim@iguana.be\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1496/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "de6d5b555c1887b5b9b59854a45ebd4805fb4b39", "tree": "6f99e2f60a21a7ed4de851942ca4925b16ebb250", "parents": [ "ca148125e6134de334b61822539d220794d8da18" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Jul 23 18:41:41 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:26:20 2010 +0100" }, "message": "MIPS: uasm: Add drotr32 and uasm_i_drotr_safe.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nTo: wim@iguana.be\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1495/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "83ccf69d8f118306e90af703f32109edb6c1e4a1", "tree": "4fbbfdf6e9f57eeafd2b79d11b2208ba915c5f29", "parents": [ "babba4f11379fb3804de802a3d0bc6b96c59d547" ], "author": { "name": "Lars-Peter Clausen", "email": "lars@metafoo.de", "time": "Sat Jul 17 11:07:51 2010 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:26:12 2010 +0100" }, "message": "MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-Chip\n\nAdds a new cpu type for the JZ4740 to the Linux MIPS architecture code.\nIt also adds the iomem addresses for the different components found on\na JZ4740 SoC.\n\nSigned-off-by: Lars-Peter Clausen \u003clars@metafoo.de\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: https://patchwork.linux-mips.org/patch/1464/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "745aef5df1e2277ee9e34d86491084c0d6106338", "tree": "3d20535d8b5d7f1ccc2867240cf70376eb23a574", "parents": [ "58a6d45193a4f5af9d55f243779ea485656e3a22" ], "author": { "name": "Ricardo Mendoza", "email": "ricmm@gentoo.org", "time": "Mon Jul 19 05:00:00 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:26:06 2010 +0100" }, "message": "MIPS: RM7000: Add support for tertiary cache\n\nAdd support for the external T-cache interface. Allow for platform\nindependent size probing from 512KB to 8MB in powers of two.\n\nSigned-off-by: Ricardo Mendoza \u003cricmm@gentoo.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1477/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "58a6d45193a4f5af9d55f243779ea485656e3a22", "tree": "493f9cbd858c38754374a2b90e5d467e052628ec", "parents": [ "65ab2826c4185fc949c3a720186bd09d75ea14a4" ], "author": { "name": "Ricardo Mendoza", "email": "ricmm@gentoo.org", "time": "Mon Jul 19 04:59:59 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:26:06 2010 +0100" }, "message": "MIPS: RM7000: Make use of cache_op() instead of inline asm\n\nSmall cleanup of the cache code to get rid of inline asm, in preparation\nto give tertiary cache support.\n\nSigned-off-by: Ricardo Mendoza \u003cricmm@gentoo.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/1476/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "ea7a8463be6b5dd824bdf42b8f2af1d34f157877", "tree": "33db1a433e4a9a772659f3ced0b3d36f5e3ef3f5", "parents": [ "034260d6779087431a8b2f67589c68b919299e5c" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:25:59 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:25:59 2010 +0100" }, "message": "MIPS: Remove unnecessary header file inclusion from fault.c.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "66f9ba101f54bda63ab1db97f9e9e94763d0651b", "tree": "5f7f16a2fa212641a7adb259f67ac2f85bdf8bcc", "parents": [ "9aeb404b4cfed41fdfd01e6fb3cc995c327ba98e" ], "author": { "name": "Sam Ravnborg", "email": "sam@ravnborg.org", "time": "Sun May 30 16:26:40 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 05 13:25:44 2010 +0100" }, "message": "MIPS: Add -Werror to arch/mips/Kbuild\n\nAdding subdirs-ccflags-y :\u003d -Werror to arch/mips/Kbuild\nlet us in one go cover all files with -Werror.\n\nIn addition this allows us to remove the\nindividual -Werror definition in various Makefile.\n\nAdding the definition to Kbuild as a recursive\noption help us not to forget to do so.\n\nWith this change we now compile arch/mips/kernel/cpufreq with -Werror\n\nOne drawback:\nWhen specifying a subdirectory covered by the Kbuild file like this:\n\n make arch/mips/kernel/\n\nthen kbuild fails to pick up the -Werror definition.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nTo: linux-mips \u003clinux-mips@linux-mips.org\u003e\nTo: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nPatchwork: https://patchwork.linux-mips.org/patch/1301/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1ec56329ff939aba29291c0dec1a28ceed660162", "tree": "45788e1f4f0baef44d727e7ca31821c16ba6317f", "parents": [ "3be6022c27ace1e3b4ba963e7ffd2e3b60cecd8a" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Apr 28 12:16:18 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:48 2010 +0100" }, "message": "MIPS: Check for accesses beyond the end of the PGD.\n\nFor some combinations of PAGE_SIZE and vmbits, it is possible to have\nuserspace access that are beyond what is covered by the PGD, but within\nvmbits. Such an access would cause the TLB refill handler to load garbage\nvalues for PMD and PTE potentially giving userspace access to parts of the\nphysical address space to which it is not entitled.\n\nIn the TLB refill hot path, we add a single dsrl instruction so we can\ncheck if any bits outside of the range covered by the PGD are set. In\nthe vmalloc side we then separate the bad case from the normal vmalloc\ncase and call tlb_do_page_fault_0 if warranted. This slows us down a\nbit, but has the benefit of yielding deterministic behavior.\n\n[Ralf: Fixed build error for 32-bit kernels.]\n[Ralf: Folded lmo commit c8c0e22b2aa3982852b44279638ef37f9aa31b7d into this\n commit.]\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1152/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n" }, { "commit": "3be6022c27ace1e3b4ba963e7ffd2e3b60cecd8a", "tree": "617178ac2ee9395e609aef3899b56756fb701cbb", "parents": [ "26b9e547e90db6b8b409084a9d4501124ff492b3" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Apr 28 12:16:17 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:47 2010 +0100" }, "message": "MIPS: Use uasm_i_ds{r,l}l_safe() instead of uasm_i_ds{r,l}l() in tlbex.c\n\nThis makes the code somewhat cleaner while reducing the risk of shift\namount overflows when various page table related options are changed.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1154/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7b3e543ddb39b69b75c9c24bb54180eca152f541", "tree": "78e3ef45016424cdb970fe0fb136b31e202a2dfa", "parents": [ "3d45285dd1ff4d4a1361b95e2d6508579a4402b5" ], "author": { "name": "Anton Altaparmakov", "email": "aia21@cam.ac.uk", "time": "Thu Mar 25 20:48:12 2010 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:21 2010 +0100" }, "message": "MIPS: Fix __vmalloc() etc. on MIPS for non-GPL modules\n\nCommit b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (lmo) rsp.\n351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) break non-GPL modules\nthat use __vmalloc() or any of the vmap(), vm_map_ram(), etc functions on\nMIPS.\n\nAll those functions are EXPORT_SYMBOL() so are meant to be allowed to be\nused by non-GPL kernel modules. These calls all take page protection as\nan argument which is normally a constant like PAGE_KERNEL.\n\nThis commit causes all protection constants like PAGE_KERNEL to not be\nconstants and instead to contain the GPL-only symbol _page_cachable_default.\n\nThis means that all calls to __vmalloc(), vmap(), etc, cause non-GPL\nmodules to fail to link with the complaint that they are trying to use the\nGPL-only symbol _page_cachable_default...\n\nChange EXPORT_SYMBOL_GPL(_page_cachable_default) to EXPORT_SYMBOL() for\nnon-GPL modules that call __vmalloc(), vmap(), vm_map_ram() etc.\n\nSigned-off-by: Anton Altaparmakov \u003caia21@cantab.net\u003e\nCc: Chris Dearman \u003cchris@mips.com\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: http://patchwork.linux-mips.org/patch/1084/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3d45285dd1ff4d4a1361b95e2d6508579a4402b5", "tree": "8130cd7c5289983de1e622728de07eb1588a326a", "parents": [ "5e3644a95db11e2e582ae3765ffad6e0cce5376e" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Mar 23 17:56:38 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:21 2010 +0100" }, "message": "MIPS: Sibyte: Fix M3 TLB exception handler workaround.\n\nThe M3 workaround needs to cmpare the region and VPN2 fields only.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "5808184f1b2fe06ef8a54a2b7fb1596d58098acf", "tree": "1ecb3addfdc3269cf55cffe112976e97a828736e", "parents": [ "8d9df29db273ab9a330828f4f4f6669d293a730a" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Mar 23 15:54:50 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:20 2010 +0100" }, "message": "MIPS: uasm: Add OR instruction.\n\nThis is needed for the fix of the M3 workaround.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "58b9e2239fa63c7c470acb4a77e9da17e6a6fa4f", "tree": "2f94c2146e2fe9adba511c4b66c3e3dd89d669b9", "parents": [ "847253b9483f713b3797877034e0940fd45ce375" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Feb 18 16:13:03 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:14 2010 +0100" }, "message": "MIPS: Add SYSCALL to uasm.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/976/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "5a0e3ad6af8660be21ca98a971cd00f331318c05", "tree": "5bfb7be11a03176a87296a43ac6647975c00a1d1", "parents": [ "ed391f4ebf8f701d3566423ce8f17e614cde9806" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Wed Mar 24 17:04:11 2010 +0900" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Mar 30 22:02:32 2010 +0900" }, "message": "include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\npercpu.h is included by sched.h and module.h and thus ends up being\nincluded when building most .c files. percpu.h includes slab.h which\nin turn includes gfp.h making everything defined by the two files\nuniversally available and complicating inclusion dependencies.\n\npercpu.h -\u003e slab.h dependency is about to be removed. Prepare for\nthis change by updating users of gfp and slab facilities include those\nheaders directly instead of assuming availability. As this conversion\nneeds to touch large number of source files, the following script is\nused as the basis of conversion.\n\n http://userweb.kernel.org/~tj/misc/slabh-sweep.py\n\nThe script does the followings.\n\n* Scan files for gfp and slab usages and update includes such that\n only the necessary includes are there. ie. if only gfp is used,\n gfp.h, if slab is used, slab.h.\n\n* When the script inserts a new include, it looks at the include\n blocks and try to put the new include such that its order conforms\n to its surrounding. It\u0027s put in the include block which contains\n core kernel includes, in the same order that the rest are ordered -\n alphabetical, Christmas tree, rev-Xmas-tree or at the end if there\n doesn\u0027t seem to be any matching order.\n\n* If the script can\u0027t find a place to put a new include (mostly\n because the file doesn\u0027t have fitting include block), it prints out\n an error message indicating which .h file needs to be added to the\n file.\n\nThe conversion was done in the following steps.\n\n1. The initial automatic conversion of all .c files updated slightly\n over 4000 files, deleting around 700 includes and adding ~480 gfp.h\n and ~3000 slab.h inclusions. The script emitted errors for ~400\n files.\n\n2. Each error was manually checked. Some didn\u0027t need the inclusion,\n some needed manual addition while adding it to implementation .h or\n embedding .c file was more appropriate for others. This step added\n inclusions to around 150 files.\n\n3. The script was run again and the output was compared to the edits\n from #2 to make sure no file was left behind.\n\n4. Several build tests were done and a couple of problems were fixed.\n e.g. lib/decompress_*.c used malloc/free() wrappers around slab\n APIs requiring slab.h to be added manually.\n\n5. The script was run on all .h files but without automatically\n editing them as sprinkling gfp.h and slab.h inclusions around .h\n files could easily lead to inclusion dependency hell. Most gfp.h\n inclusion directives were ignored as stuff from gfp.h was usually\n wildly available and often used in preprocessor macros. Each\n slab.h inclusion directive was examined and added manually as\n necessary.\n\n6. percpu.h was updated not to include slab.h.\n\n7. Build test were done on the following configurations and failures\n were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my\n distributed build env didn\u0027t work with gcov compiles) and a few\n more options had to be turned off depending on archs to make things\n build (like ipr on powerpc/64 which failed due to missing writeq).\n\n * x86 and x86_64 UP and SMP allmodconfig and a custom test config.\n * powerpc and powerpc64 SMP allmodconfig\n * sparc and sparc64 SMP allmodconfig\n * ia64 SMP allmodconfig\n * s390 SMP allmodconfig\n * alpha SMP allmodconfig\n * um on x86_64 SMP allmodconfig\n\n8. percpu.h modifications were reverted so that it could be applied as\n a separate patch and serve as bisection point.\n\nGiven the fact that I had only a couple of failures from tests on step\n6, I\u0027m fairly confident about the coverage of this conversion patch.\nIf there is a breakage, it\u0027s likely to be something in one of the arch\nheaders which should be easily discoverable easily on most builds of\nthe specific arch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nGuess-its-ok-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Lee Schermerhorn \u003cLee.Schermerhorn@hp.com\u003e\n" }, { "commit": "46bbffad54bd48bb809f2691c1970a79a588976b", "tree": "21779a574f118b1cba5d6832bc0a0fa3bee97075", "parents": [ "85fe20bfd415af0a2e93bd1166533d4a6eb591ea", "c1fd1b43831fa20c91cdd461342af8edf2e87c2f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Feb 28 10:38:45 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Feb 28 10:38:45 2010 -0800" }, "message": "Merge branch \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, mm: Unify kernel_physical_mapping_init() API\n x86, mm: Allow highmem user page tables to be disabled at boot time\n x86: Do not reserve brk for DMI if it\u0027s not going to be used\n x86: Convert tlbstate_lock to raw_spinlock\n x86: Use the generic page_is_ram()\n x86: Remove BIOS data range from e820\n Move page_is_ram() declaration to mm.h\n Generic page_is_ram: use __weak\n resources: introduce generic page_is_ram()\n" }, { "commit": "6f329468f3086e9d8f3832930fdb09ab3769176b", "tree": "d77b274399cf101fba59b0de01fd9491b4e28fee", "parents": [ "6dd9344cfc41bcc60a01cdc828cb278be7a10e01" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Feb 10 15:12:48 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:26 2010 +0100" }, "message": "MIPS: Give Octeon+ CPUs their own cputype.\n\nThis allows us to treat them differently at runtime.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/951/\nPatchwork: http://patchwork.linux-mips.org/patch/987/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "6dd9344cfc41bcc60a01cdc828cb278be7a10e01", "tree": "9c62d563eba8f3acfd1c826a63e6999261b06f5a", "parents": [ "32546f38fab839eee6f62b3f06c2774eade4188a" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Feb 10 15:12:47 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:26 2010 +0100" }, "message": "MIPS: Implement Read Inhibit/eXecute Inhibit\n\nThe SmartMIPS ASE specifies how Read Inhibit (RI) and eXecute Inhibit\n(XI) bits in the page tables work. The upper two bits of EntryLo{0,1}\nare RI and XI when the feature is enabled in the PageGrain register.\nSmartMIPS only covers 32-bit systems. Cavium Octeon+ extends this to\n64-bit systems by continuing to place the RI and XI bits in the top of\nEntryLo even when EntryLo is 64-bits wide.\n\nBecause we need to carry the RI and XI bits in the PTE, the layout of\nthe PTE is changed. There is a two instruction overhead in the TLB\nrefill hot path to get the EntryLo bits into the proper position.\nAlso the TLB load exception has to probe the TLB to check if RI or XI\ncaused the exception.\n\nAlso of note is that the layout of the PTE bits is done at compile and\nruntime rather than statically. In the 32-bit case this allows for\nthe same number of PFN bits as before the patch as the _PAGE_HUGE is\nnot supported in 32-bit kernels (we have _PAGE_NO_EXEC and\n_PAGE_NO_READ instead of _PAGE_READ and _PAGE_HUGE).\n\nThe patch is tested on Cavium Octeon+, but should also work on 32-bit\nsystems with the Smart-MIPS ASE.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/952/\nPatchwork: http://patchwork.linux-mips.org/patch/956/\nPatchwork: http://patchwork.linux-mips.org/patch/962/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "32546f38fab839eee6f62b3f06c2774eade4188a", "tree": "582cb9fb18c8e741d24a4a27d9c2dee46bfd977f", "parents": [ "9fe2e9d6f5390d7151a0b9d8c100f0da26eaa2b7" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Feb 10 15:12:46 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:25 2010 +0100" }, "message": "MIPS: Add TLBR and ROTR to uasm.\n\nThe soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and\nROTR support in uasm. We also add a UASM_i_ROTR macro.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/953/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "9b8c38917b8e083a6343bb5a0c6bbaea78ebff7a", "tree": "7b6a8513c3335f005e6a58b06f53cf179eabeb21", "parents": [ "52d7ecd033316b0540a6ac4af70574fae4aba295" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Feb 10 15:12:44 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:25 2010 +0100" }, "message": "MIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.\n\n64-bit CPUs have 64-bit c0_entrylo{0,1} registers. We should use the\n64-bit dmtc0 instruction to set them. This becomes important if we\nwant to set the RI and XI bits present in some processors.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/954/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b66bb6090d9aa36931911e34d3f069932934b6fe", "tree": "178b1f6082ce245cf2918acbc4b1f21cc9d42172", "parents": [ "ab4ba291683d07038c7ddf1eec191d3d09e1f468" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Tue Feb 02 17:19:38 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:23 2010 +0100" }, "message": "MIPS: Remove #if 0 r4k_update_mmu_cache_hwbug\n\nThe function is #if 0ed out. There are no other occurrences of its\nname in the tree. It is safe to remove.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/936/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3482d713a91befb8c96722cb8d55aed36c212d9e", "tree": "e5b8f0e779fb64e9952765694ceaaf572aa6a0fa", "parents": [ "fcf6735e9cf08343bef9ff43205d91ef102af52f" ], "author": { "name": "Florian Fainelli", "email": "florian@openwrt.org", "time": "Thu Jan 28 15:21:24 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:19 2010 +0100" }, "message": "MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h\n\nSigned-off-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nTo: linux-mips@linux-mips.org\nTo: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/887/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e0e53dee69e07e9446eb16ceabd55a1116611696", "tree": "0f46618d019bf984e86c84c2bfd31c60869ba56d", "parents": [ "2fe062608086f9b74a80f16272c5a59a3e05722f" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:14 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:14 2010 +0100" }, "message": "MIPS: Nuke trailing blank lines\n\nRecent git versions now warn about those and they\u0027ve always been a bit of\nan annoyance.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "2a880986d899f556f5a327bc77cc8760d5bb9c64", "tree": "179032b7895ca3594c3fec96a194178ffecf4ad6", "parents": [ "f868ba29723be46e0981226d7455090d515b08ef" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Jan 22 14:41:14 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:12 2010 +0100" }, "message": "MIPS: Remove probe_tlb().\n\nThe function probe_tlb() only does anything for processors that are\nnot PRID_COMP_LEGACY. This is precisely the set of processors for\nwhich decode_configs() is called to do identical tlbsize probing\ncalculations. Therefore probe_tlb() is completely redundant and may\nbe removed.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/865/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "325f8a0a31df567dbafafc48f8e60f3c1f101a46", "tree": "b36383f4d483ecc6d057cdd41ef50b6403e89b9c", "parents": [ "ef6c1fd662d18c0e2ed92825c8837e94b5ec3a1f" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Fri Dec 04 13:52:36 2009 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:03 2010 +0100" }, "message": "MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.\n\nFor 64-bit kernels with 64KB pages and two level page tables, there are\n42 bits worth of virtual address space This is larger than the 40 bits of\nvirtual address space obtained with the default 4KB Page size and three\nlevels, so there are no draw backs for using two level tables with this\nconfiguration.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/761/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "52ab320ac560af3333191a473e56615fb48fff95", "tree": "50498055e6f0c6ef4d96c8a735772c030e7207ee", "parents": [ "627fa177a1502ad24390d945851209ac022f3a36" ], "author": { "name": "Yoichi Yuasa", "email": "yuasa@linux-mips.org", "time": "Sat Feb 20 21:23:22 2010 +0900" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Feb 22 21:42:11 2010 +0100" }, "message": "MIPS: Highmem: Fix build error\n\narch/mips/mm/highmem.c: In function \u0027kmap_init\u0027:\narch/mips/mm/highmem.c:130: error: \u0027init_mm\u0027 undeclared (first use in this function)\narch/mips/mm/highmem.c:130: error: (Each undeclared identifier is reported only once\narch/mips/mm/highmem.c:130: error: for each function it appears in.)\n\nSigned-off-by: Yoichi Yuasa \u003cyuasa@linux-mips.org\u003e\nCc: linux-mips \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/980/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b7e56edba4b02f2079042c326a8cd72a44635817", "tree": "b5042002e9747cd8fb1278d61f86d8b92a74c018", "parents": [ "13ca0fcaa33f6b1984c4111b6ec5df42689fea6f", "b0483e78e5c4c9871fc5541875b3bc006846d46b" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Wed Feb 17 18:27:37 2010 +0100" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Wed Feb 17 18:28:05 2010 +0100" }, "message": "Merge branch \u0027linus\u0027 into x86/mm\n\nx86/mm is on 32-rc4 and missing the spinlock namespace changes which\nare needed for further commits into this topic.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "63731c964d6cd9de4800891bd33b6f9e47a249bc", "tree": "32869cf37195162789b1a8d8d6041905539af9a2", "parents": [ "59d302b342e5d451c4448479e82e1105864a3112" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Feb 04 15:48:49 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Feb 10 22:15:45 2010 +0100" }, "message": "MIPS: Fix __devinit __cpuinit confusion in cpu_cache_init\n\ncpu_cache_init and the things it calls should all be __cpuinit instead\nof __devinit.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/938/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "61ef2489dbf587258526cfd4ebf4bba3b079f401", "tree": "4806ed052c73d84821d958f306699b2a27da965e", "parents": [ "ccef086454d4c97e7b722e9303390207d681cb4c" ], "author": { "name": "Wu Fengguang", "email": "fengguang.wu@intel.com", "time": "Fri Jan 22 16:16:19 2010 +0800" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon Feb 01 16:58:17 2010 -0800" }, "message": "resources: introduce generic page_is_ram()\n\nIt\u0027s based on walk_system_ram_range(), for archs that don\u0027t have\ntheir own page_is_ram().\n\nThe static verions in MIPS and SCORE are also made global.\n\nv4: prefer plain 1 instead of PAGE_IS_RAM (H. Peter Anvin)\nv3: add comment (KAMEZAWA Hiroyuki)\n \"AFAIK, this \"System RAM\" information has been used for kdump to\n grab valid memory area and seems good for the kernel itself.\"\nv2: add PAGE_IS_RAM macro (Américo Wang)\n\nCc: Chen Liqin \u003cliqin.chen@sunplusct.com\u003e\nCc: Lennox Wu \u003clennox.wu@gmail.com\u003e\nCc: Américo Wang \u003cxiyou.wangcong@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nReviewed-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nSigned-off-by: Wu Fengguang \u003cfengguang.wu@intel.com\u003e\nLKML-Reference: \u003c20100122081619.GA6431@localhost\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "abbdc3d88aa2d5c937b21044c336bcd056c1732f", "tree": "c015bc3bbffcb074439fbe4c3b25f6f645774778", "parents": [ "066000dd856709b6980123eb39b957fe26993f7b" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Dec 03 17:43:54 2009 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Jan 12 18:19:29 2010 +0100" }, "message": "MIPS: Cleanup forgotten label_module_alloc in tlbex.c\n\ncommit c8af165342e83a4eb078c9607d29a7c399d30a53 (lmo) rsp.\ne0cc87f59490d7d62a8ab2a76498dc8a2b64927a (kernel.org) left\nlabel_module_alloc unused. Remove it now.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/752/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4b529401c5089cf33f7165607cbc2fde43357bfb", "tree": "0e559e77e9a2c837cd7c25f3a48e83ee788d7d4b", "parents": [ "50f411e34d623efbf4e4b4b0c1a4a20e04c5cc9e" ], "author": { "name": "Andreas Fenkart", "email": "andreas.fenkart@streamunlimited.com", "time": "Fri Jan 08 14:42:31 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 11 09:34:03 2010 -0800" }, "message": "mm: make totalhigh_pages unsigned long\n\nMakes it consistent with the extern declaration, used when CONFIG_HIGHMEM\nis set Removes redundant casts in printout messages\n\nSigned-off-by: Andreas Fenkart \u003candreas.fenkart@streamunlimited.com\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Chen Liqin \u003cliqin.chen@sunplusct.com\u003e\nCc: Lennox Wu \u003clennox.wu@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "13e79b462212ac46a046932af06117eaf7a9f77b", "tree": "711fe1984506c22d241a2bdccd9a7b9bd0b1778e", "parents": [ "a9e8641f4c252f93875cf30cb28c0f333539f0bf" ], "author": { "name": "Akinobu Mita", "email": "akinobu.mita@gmail.com", "time": "Fri Nov 13 16:04:53 2009 +0900" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Dec 17 01:57:16 2009 +0000" }, "message": "MIPS: Sibyte: Use hweight8 instead of counting bits\n\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/637/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "82622284dd2f8791f9759f3cef601520a8bc63b2", "tree": "ee47f43af373d0c021cc83ff9e22925942e9d001", "parents": [ "92078e0618f525e22945040b5daea21d4b6d4a16" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Oct 14 12:16:56 2009 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Dec 17 01:57:01 2009 +0000" }, "message": "MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.\n\nProcessors that support the mips64r2 ISA can in four instructions\nconvert a shifted PGD pointer stored in the upper bits of c0_context\ninto a usable pointer. By doing this we save a memory load and\nassociated potential cache miss in the TLB exception handlers.\n\nSince the upper bits of c0_context were holding the CPU number, we\nmove this to the upper bits of c0_xcontext which doesn\u0027t have enough\nbits to hold the PGD pointer, but has plenty for the CPU number.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" } ], "next": "92078e0618f525e22945040b5daea21d4b6d4a16" }