)]}' { "log": [ { "commit": "ce53044c68cf4fb6c50a2a0d88786be65fae7235", "tree": "19c21da7d261412192e189ef3fd1a9ff4e7ba5c2", "parents": [ "0877aa3908aaeeae8fc2850691668c4315d3db56", "046fae440d32cc6dec8148c7e06a8b4b987f8a2f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat May 26 12:22:27 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat May 26 12:22:27 2012 -0700" }, "message": "Merge tag \u0027drivers\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc\n\nPull arm-soc driver specific updates from Olof Johansson:\n \"These changes are specific to some driver that may be used by multiple\n boards or socs. The most significant change in here is the move of\n the samsung iommu code from a platform specific in-kernel interface to\n the generic iommu subsystem.\"\n\nFix up trivial conflicts in arch/arm/mach-exynos/Kconfig\n\n* tag \u0027drivers\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits)\n mmc: dt: Consolidate DT bindings\n iommu/exynos: Add iommu driver for EXYNOS Platforms\n ARM: davinci: optimize the DMA ISR\n ARM: davinci: implement DEBUG_LL port choice\n ARM: tegra: Add SMMU enabler in AHB\n ARM: tegra: Add Tegra AHB driver\n Input: pxa27x_keypad add choice to set direct_key_mask\n Input: pxa27x_keypad direct key may be low active\n Input: pxa27x_keypad bug fix for direct_key_mask\n Input: pxa27x_keypad keep clock on as wakeup source\n ARM: dt: tegra: pinmux changes for USB ULPI\n ARM: tegra: add USB ULPI PHY reset GPIO to device tree\n ARM: tegra: don\u0027t hard-code USB ULPI PHY reset_gpio\n ARM: tegra: change pll_p_out4\u0027s rate to 24MHz\n ARM: tegra: fix pclk rate\n ARM: tegra: reparent sclk to pll_c_out1\n ARM: tegra: Add pllc clock init table\n ARM: dt: tegra cardhu: basic audio support\n ARM: dt: tegra30.dtsi: Add audio-related nodes\n ARM: tegra: add AUXDATA required for audio\n ...\n" }, { "commit": "c49314fa6c7d2c130d850b30980cffab53a40592", "tree": "9c7597ad98a42ef8ba1e18e897106c2cb29e52e6", "parents": [ "21b7f153dd0d7366197c37e7a630c7585db0b8ea", "7f217794ffa72f208a250b79ab0b7ea3de19677f" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Mon May 14 21:48:45 2012 +0200" }, "committer": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Tue May 15 13:31:11 2012 +0200" }, "message": "Merge branch \u0027drivers/mmc\u0027 into next/drivers\n\n* drivers/mmc:\n mmc: dt: Consolidate DT bindings\n\nAlso pulls in the omap/dt-missed-3.4 branch as a dependency.\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "7f217794ffa72f208a250b79ab0b7ea3de19677f", "tree": "e158792f6662bc7cad4e55a62f4efe7426215141", "parents": [ "e6511df4f25607e2e6d60062eb69c28c057329fa" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Sun May 13 00:14:24 2012 -0400" }, "committer": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Tue May 15 13:29:42 2012 +0200" }, "message": "mmc: dt: Consolidate DT bindings\n\nThis patch unifies the current DT MMC bindings documentation and code,\nadds generic MMC DT bindings documentation, and updates .dts files for\nconsistency.\n\n[cjb: typo fixes, addition of max-frequency property]\nSigned-off-by: Chris Ball \u003ccjb@laptop.org\u003e\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n" }, { "commit": "9c6b2353dfb80ae843b831c03fc53ddc5c3949ff", "tree": "02984c8364390fda669dde3b950c70ccbcfb4b06", "parents": [ "247540b03bfcbbe26b86692c9424195d76eb67f0" ], "author": { "name": "Mai La", "email": "mla@apm.com", "time": "Thu Mar 08 17:18:45 2012 +0000" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@gmail.com", "time": "Thu May 03 08:58:21 2012 -0400" }, "message": "powerpc/44x: Add PCI MSI node for Maui APM821xx SoC and Bluestone board in DTS\n\nSigned-off-by: Mai La \u003cmla@apm.com\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@gmail.com\u003e\n" }, { "commit": "4351f30a35b8c6a6b6d4d36e5c2dc8ec0262b2ca", "tree": "883a3c34cc71444fec7eb07c91508ba1e6c57eea", "parents": [ "dea58bd1cab8f6687a784cdacca242b6cac95ede" ], "author": { "name": "Mingkai Hu", "email": "Mingkai.hu@freescale.com", "time": "Mon Apr 16 10:05:08 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Apr 19 15:10:08 2012 -0500" }, "message": "powerpc/mpc85xx: add MPIC message dts node\n\nSigned-off-by: Mingkai Hu \u003cMingkai.hu@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "8a57d734004b8018f3d320455c1816b1e6810265", "tree": "2587de9c6f4e1ea3aa0b4564f81976df5c8c682a", "parents": [ "3b588c7efc84f15548afdda6a0d2f892fe83babc" ], "author": { "name": "Diana CRACIUN", "email": "Diana.Craciun@freescale.com", "time": "Thu Feb 09 15:41:00 2012 +0200" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Mar 29 08:14:15 2012 -0500" }, "message": "powerpc/dts: Removed fsl,msi property from dts.\n\nThe association in the decice tree between PCI and MSI\nusing fsl,msi property was an artificial one and it does\nnot reflect the actual hardware.\n\nSigned-off-by: Diana CRACIUN \u003cDiana.Craciun@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "2fc1fc0338d568723b32e2d7a79b644f6137fd00", "tree": "f17251ac13a7077ee5e2e7681e9a8f795a6e0e63", "parents": [ "72ea4d48863679911330f977144b2b2bd62dd92a" ], "author": { "name": "Jerry Huang", "email": "Chang-Ming.Huang@freescale.com", "time": "Tue Mar 20 14:24:45 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Mar 29 08:14:11 2012 -0500" }, "message": "powerpc/85xx: add the P1020UTM-PC DTS support\n\nSigned-off-by: Jerry Huang \u003cChang-Ming.Huang@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "72ea4d48863679911330f977144b2b2bd62dd92a", "tree": "230b840854bff9d234f9b3b84a33f4e087bb3b54", "parents": [ "9cb6abcb2645985a886f36459d480f5163c57623" ], "author": { "name": "Jerry Huang", "email": "Chang-Ming.Huang@freescale.com", "time": "Tue Mar 20 14:24:44 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Mar 29 08:14:09 2012 -0500" }, "message": "powerpc/85xx: add the P1020MBG-PC DTS support\n\nSigned-off-by: Jerry Huang \u003cChang-Ming.Huang@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "1d9a47315042606b4217691bcea36cfa6ccbde66", "tree": "1c60e6588e0394cc9eaebf22c377803eec1590c5", "parents": [ "7ba3e4f5877466b0f81dcd3cb78db5d75b267645" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Wed Mar 21 18:23:27 2012 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 28 11:33:23 2012 +1100" }, "message": "powerpc: Random little legacy iSeries removal tidy ups\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "5375871d432ae9fc581014ac117b96aaee3cd0c7", "tree": "be98e8255b0f927fb920fb532a598b93fa140dbe", "parents": [ "b57cb7231b2ce52d3dda14a7b417ae125fb2eb97", "dfbc2d75c1bd47c3186fa91f1655ea2f3825b0ec" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 21 18:55:10 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 21 18:55:10 2012 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\nPull powerpc merge from Benjamin Herrenschmidt:\n \"Here\u0027s the powerpc batch for this merge window. It is going to be a\n bit more nasty than usual as in touching things outside of\n arch/powerpc mostly due to the big iSeriesectomy :-) We finally got\n rid of the bugger (legacy iSeries support) which was a PITA to\n maintain and that nobody really used anymore.\n\n Here are some of the highlights:\n\n - Legacy iSeries is gone. Thanks Stephen ! There\u0027s still some bits\n and pieces remaining if you do a grep -ir series arch/powerpc but\n they are harmless and will be removed in the next few weeks\n hopefully.\n\n - The \u0027fadump\u0027 functionality (Firmware Assisted Dump) replaces the\n previous (equivalent) \"pHyp assisted dump\"... it\u0027s a rewrite of a\n mechanism to get the hypervisor to do crash dumps on pSeries, the\n new implementation hopefully being much more reliable. Thanks\n Mahesh Salgaonkar.\n\n - The \"EEH\" code (pSeries PCI error handling \u0026 recovery) got a big\n spring cleaning, motivated by the need to be able to implement a\n new backend for it on top of some new different type of firwmare.\n\n The work isn\u0027t complete yet, but a good chunk of the cleanups is\n there. Note that this adds a field to struct device_node which is\n not very nice and which Grant objects to. I will have a patch soon\n that moves that to a powerpc private data structure (hopefully\n before rc1) and we\u0027ll improve things further later on (hopefully\n getting rid of the need for that pointer completely). Thanks Gavin\n Shan.\n\n - I dug into our exception \u0026 interrupt handling code to improve the\n way we do lazy interrupt handling (and make it work properly with\n \"edge\" triggered interrupt sources), and while at it found \u0026 fixed\n a wagon of issues in those areas, including adding support for page\n fault retry \u0026 fatal signals on page faults.\n\n - Your usual random batch of small fixes \u0026 updates, including a bunch\n of new embedded boards, both Freescale and APM based ones, etc...\"\n\nI fixed up some conflicts with the generalized irq-domain changes from\nGrant Likely, hopefully correctly.\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (141 commits)\n powerpc/ps3: Do not adjust the wrapper load address\n powerpc: Remove the rest of the legacy iSeries include files\n powerpc: Remove the remaining CONFIG_PPC_ISERIES pieces\n init: Remove CONFIG_PPC_ISERIES\n powerpc: Remove FW_FEATURE ISERIES from arch code\n tty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable\n powerpc/spufs: Fix double unlocks\n powerpc/5200: convert mpc5200 to use of_platform_populate()\n powerpc/mpc5200: add options to mpc5200_defconfig\n powerpc/mpc52xx: add a4m072 board support\n powerpc/mpc5200: update mpc5200_defconfig to fit for charon board\n Documentation/powerpc/mpc52xx.txt: Checkpatch cleanup\n powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board\n powerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone board\n MAINTAINERS: Update PowerPC 4xx tree\n powerpc/44x: The bug fixed support for APM821xx SoC and Bluestone board\n powerpc: document the FSL MPIC message register binding\n powerpc: add support for MPIC message register API\n powerpc/fsl: Added aliased MSIIR register address to MSI node in dts\n powerpc/85xx: mpc8548cds - add 36-bit dts\n ...\n" }, { "commit": "dfbc2d75c1bd47c3186fa91f1655ea2f3825b0ec", "tree": "fcf40239b8b08b1072d14e0ec8f336be30fa0ae2", "parents": [ "a6626ffe09d379bad4d0e49885f9195946ac875d" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Tue Mar 20 14:13:51 2012 +1100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 21 11:16:13 2012 +1100" }, "message": "powerpc/ps3: Do not adjust the wrapper load address\n\nCommit c55aef0e5bc6 \"powerpc/boot: Change the load address for the wrapper\nto fit the kernel\" adjusted the laod address if the uncompressed kernel\nwas too large. Ps3 does not compress the kernel and uses a different\nlinker script, so do not adjust the load address in that case.\n\nfixes this build error:\n\npowerpc64-linux-ld: section .text loaded at [0000000000e00000,0000000000e0721b] overlaps section .kernel:dtb loaded at [0000000000e00000,0000000000e0066f]\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "1b041885ae1d9938440fc2cf6a444b70ec0a86c9", "tree": "58feb1eb3e72df19161845d418cf9ca714c702d5", "parents": [ "bc58450b023c5815e5bc54e6d43edbd1e3576fe6" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Thu Mar 15 18:20:13 2012 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 21 11:16:12 2012 +1100" }, "message": "powerpc: Remove the remaining CONFIG_PPC_ISERIES pieces\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "4286f84ef6d7f44de1e70b904706bdc3e1f7af01", "tree": "1fd5fc121f508525d62b0bdf7cc22f16c18b110d", "parents": [ "2d87e06e7477fa1467e730087b68c2f518c0fff6", "e96dde2b5edbc0d385ccced05fb5db68c070b0d4" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 21 10:56:04 2012 +1100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 21 10:56:04 2012 +1100" }, "message": "Merge remote-tracking branch \u0027kumar/next\u0027 into next\n" }, { "commit": "2d87e06e7477fa1467e730087b68c2f518c0fff6", "tree": "ee8e45580ae0304a3f22c715c0b88b870b5774b3", "parents": [ "ff651516683421d773802707652207d4036244cc", "b5594a7760fa048730db64c501cf4534df06b3b3" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 21 10:56:00 2012 +1100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 21 10:56:00 2012 +1100" }, "message": "Merge remote-tracking branch \u0027jwb/next\u0027 into next\n" }, { "commit": "7eb64c0f25574abeb02b79088258f94ba9339075", "tree": "d934bd3971b5e45bda1534a3513953fc3fb8b398", "parents": [ "dd831916250d5d5fb536e44d3101f2c61e49f2a6" ], "author": { "name": "Heiko Schocher", "email": "hs@denx.de", "time": "Sun Mar 18 23:00:44 2012 +0100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Mar 21 10:40:26 2012 +1100" }, "message": "powerpc/mpc52xx: add a4m072 board support\n\nAdd DTS file for a4m072 board and add its name to the list\nof the supported boards.\n\nSigned-off-by: Heiko Schocher \u003chs@denx.de\u003e\ncc: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\ncc: devicetree-discuss@ozlabs.org\ncc: Wolfgang Denk \u003cwd@denx.de\u003e\ncc: Wolfram Sang \u003cw.sang@pengutronix.de\u003e\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\n" }, { "commit": "b5594a7760fa048730db64c501cf4534df06b3b3", "tree": "36d93765d99453818dacd5ae524ce8d505d8a9b4", "parents": [ "b6bb23b923048be159265004f4cd6aa272da2409" ], "author": { "name": "Vinh Nguyen Huu Tuong", "email": "vhtnguyen@apm.com", "time": "Thu Mar 15 00:56:32 2012 +0000" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@gmail.com", "time": "Sat Mar 17 08:51:55 2012 -0400" }, "message": "powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board\n\nThis patch updates the dts file for bluestone board with support:\n- UART1\n- L2 cache\n- NAND with NDFC\n- PCI-E\n\nSigned-off-by: Vinh Nguyen Huu Tuong \u003cvhtnguyen@apm.com\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@gmail.com\u003e\n" }, { "commit": "da3b6c0534c76bc08ce5524342586138687fd106", "tree": "e67ea548f1389cf8fca6aa7415451fef30645888", "parents": [ "a2279e3fe484e89f744e03421377d5c0fca9f77d" ], "author": { "name": "Diana CRACIUN", "email": "Diana.Craciun@freescale.com", "time": "Wed Feb 01 17:50:34 2012 +0200" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 16:15:19 2012 -0500" }, "message": "powerpc/fsl: Added aliased MSIIR register address to MSI node in dts\n\nThe MSIIR register for each MSI bank is aliased to a different\naddress. The MSI node reg property was updated to contain this\naddress:\n\ne.g. reg \u003d \u003c0x41600 0x200 0x44140 4\u003e;\n\nThe first region contains the address and length of the MSI\nregister set and the second region contains the address of\nthe aliased MSIIR register at 0x44140.\n\nSigned-off-by: Diana CRACIUN \u003cDiana.Craciun@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "a2279e3fe484e89f744e03421377d5c0fca9f77d", "tree": "423d9cc026e6e11c4a4927ffaac564d12d5d0bd3", "parents": [ "0d4fdd321c5a4450622841c3bd8f2e370f033813" ], "author": { "name": "Zhao Chenhui", "email": "chenhui.zhao@freescale.com", "time": "Tue Mar 06 17:06:45 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 15:58:22 2012 -0500" }, "message": "powerpc/85xx: mpc8548cds - add 36-bit dts\n\nCreate mpc8548cds_36b.dts. Support 36-bit mode.\n\nSigned-off-by: Zhao Chenhui \u003cchenhui.zhao@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "0d4fdd321c5a4450622841c3bd8f2e370f033813", "tree": "291d5e733ff332d36925fb0057510b314bccb9d5", "parents": [ "992608ff56b9c2e987f706da94ceca991b7886a4" ], "author": { "name": "Zhao Chenhui", "email": "chenhui.zhao@freescale.com", "time": "Tue Mar 06 17:06:44 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 15:58:21 2012 -0500" }, "message": "powerpc/85xx: Refactor mpc8548cds device tree\n\n* Create mpc8548cds.dtsi\n* Move lbc, soc and pci0 nodes to mpc8548cds_32b.dtsi\n* Change cuImage.mpc8548cds to cuImage.mpc8548cds_32b\n* Rename mpc8548cds.dts to mpc8548cds_32b.dts\n\nSigned-off-by: Zhao Chenhui \u003cchenhui.zhao@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "992608ff56b9c2e987f706da94ceca991b7886a4", "tree": "bba9a79a788a8945a9920f888fcbb724885454be", "parents": [ "96939e79b0d8571f557bf4d7f0f933282401342b" ], "author": { "name": "chenhui zhao", "email": "chenhui.zhao@freescale.com", "time": "Tue Mar 06 17:06:42 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 15:58:21 2012 -0500" }, "message": "powerpc/85xx: mpc8548cds - Add FPGA node to dts\n\nRemove FPGA(CADMUS) macros in code. Move it to dts.\n\nSigned-off-by: Zhao Chenhui \u003cchenhui.zhao@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nAcked-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "96939e79b0d8571f557bf4d7f0f933282401342b", "tree": "62e3648712f8abc359ec0f8c8bad6c1ac901803f", "parents": [ "8232a4de6131542058cb47a627c5e7445ad61a3b" ], "author": { "name": "Zhao Chenhui", "email": "chenhui.zhao@freescale.com", "time": "Tue Mar 06 17:06:43 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 15:58:20 2012 -0500" }, "message": "powerpc/85xx: mpc8548cds - fix alias in mpc8548si-pre.dtsi\n\nCorrect ethernet1 and add ethernet2 and ethernet3.\n\nSigned-off-by: Zhao Chenhui \u003cchenhui.zhao@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "8232a4de6131542058cb47a627c5e7445ad61a3b", "tree": "f2bec24b20a6f43607f4f805002afc373be72319", "parents": [ "bcf3302c3c5cee587e5662d7f597f99c1a93cdd1" ], "author": { "name": "chenhui zhao", "email": "chenhui.zhao@freescale.com", "time": "Tue Mar 06 17:06:41 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 15:58:20 2012 -0500" }, "message": "powerpc/85xx: mpc8548cds - Add RapidIO node to dts\n\nEnable RapidIO and add rapidio and rmu nodes to dts.\n\nSigned-off-by: Zhao Chenhui \u003cchenhui.zhao@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "bcf3302c3c5cee587e5662d7f597f99c1a93cdd1", "tree": "44be5a37caea495b393eb30c2fe027d139f7b104", "parents": [ "ad68ee016d928975161f82619410296af8eba2e8" ], "author": { "name": "chenhui zhao", "email": "chenhui.zhao@freescale.com", "time": "Tue Mar 06 17:06:40 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 15:58:20 2012 -0500" }, "message": "powerpc/85xx: mpc8548cds - Add NOR flash node to dts\n\nSigned-off-by: Zhao Chenhui \u003cchenhui.zhao@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "5d40433ee66d860f119ce2bf3181764b1fd88e2e", "tree": "c839943a6274e7de23dab07c7176e9cbaf1d3230", "parents": [ "f7bba2aaff8d034dcac3dab6df2fe6e8a3b3e81d" ], "author": { "name": "Liu Shuo", "email": "shuo.liu@freescale.com", "time": "Wed Mar 07 13:20:06 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 14:50:44 2012 -0500" }, "message": "powerpc/dts: fix the compatible string of sec 4.0\n\nFix the compatible string of sec 4.0 to match with CAAM driver according\nto Documentation/devicetree/bindings/crypto/fsl-sec4.txt\n\nSigned-off-by: Liu Shuo \u003cshuo.liu@freescale.com\u003e\nSigned-off-by: Shengzhou Liu \u003cShengzhou.Liu@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "1ee4af86fa16d636dfd1a6f2e7fc70f34b5eb9b1", "tree": "69c958a896e6ed93b527ca5b21d2b590363c4843", "parents": [ "6597c713b7a8a77ea8696a1df4bbb673f3de22aa" ], "author": { "name": "Paul Gortmaker", "email": "paul.gortmaker@windriver.com", "time": "Mon Feb 27 07:25:01 2012 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 14:34:19 2012 -0500" }, "message": "powerpc/83xx: mpc836x - fix failed phy detection for ucc ethernet on MDS\n\nThe mpc836x_mds platform has been broken since the commit\n6fe3264945ee63292cdfb27b6e95bc52c603bb09\n\n \"netdev/phy: Use mdiobus_read() so that proper locks are taken\"\n\nwhich caused the fsl_pq_mdio TBI autoprobe to oops. The oops\nwas \"fixed\" in commit 28d8ea2d568534026ccda3e8936f5ea1e04a86a1\n\n \"fsl_pq_mdio: Clean up tbi address configuration\"\n\nby simply removing the the autoscan code, and making tbi nodes\nmandatory. Some of the newer reference platforms were updated\nto have tbi nodes in 220669495bf8b68130a8218607147c7b74c28d2b\n\n \"powerpc: Add TBI PHY node to first MDIO bus\"\n\nbut the older mpc836x didn\u0027t get one and hence was just failing\nwith -EBUSY as follows:\n\n fsl-pq_mdio: probe of e0102120.mdio failed with error -16\n ...\n net eth0: Could not attach to PHY\n eth0: Cannot initialize PHY, aborting.\n\nAdd a TBI node and use the 1st free address for it.\n\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "e041013ac0df7fc7dea73c9ca73a33ab5b48d155", "tree": "223d3cc0558010519456af6caffa0df1fd4cf03f", "parents": [ "44b24b74abc37e3c0f28c8288178056f10074863" ], "author": { "name": "Martyn Welch", "email": "martyn.welch@ge.com", "time": "Mon Mar 12 17:13:00 2012 +0000" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 11:15:48 2012 -0500" }, "message": "powerpc/85xx: Board support for GE IMP3A\n\nInitial board support for the GE IMP3A, a 3U compactPCI card with a p2020\nprocessor.\n\nSigned-off-by: Martyn Welch \u003cmartyn.welch@ge.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "950740098c6745d69056b3acb5090ca9d8aa918c", "tree": "20d93f6d476f0992b63d650d72f72181057789f8", "parents": [ "7e6af144781a3ae9dff142f44dc26e585cb41b82" ], "author": { "name": "Zhicheng Fan", "email": "b32736@freescale.com", "time": "Fri Feb 10 14:48:16 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 11:03:44 2012 -0500" }, "message": "powerpc/85xx: Add dts for p1020rdb-pc board\n\nP1020RDB-PC Overview\n------------------\n1Gbyte DDR3 SDRAM\n32 Mbyte NAND flash\n10 16Mbyte NOR flash\n16 Mbyte SPI flash\nSD connector to interface with the SD memory card\nReal-time clock on I2C bus\n\nPCIe:\n- x1 PCIe slot\n- x1 mini-PCIe slot\n\n10/100/1000 BaseT Ethernet ports:\n- eTSEC1, RGMII: one 10/100/1000 port using VitesseTM VSC7385 L2 switch\n- eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221\n- eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021\n\nUSB 2.0 port:\n- Two USB2.0 Type A receptacles\n- One USB2.0 signal to Mini PCIe slot\n\nDual RJ45 UART ports:\n- DUART interface: supports two UARTs up to 115200 bps for console display\n\nSigned-off-by: Zhicheng Fan \u003cb32736@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "9df8f73c404a1160952cf0e5ba65874200eccd14", "tree": "c25d34ce9ebed297d113ca99d7fe93519e4c4c15", "parents": [ "4951896aad0b73a8163eb23d44818993237bc0cf" ], "author": { "name": "Jia Hongtao", "email": "B38951@freescale.com", "time": "Tue Feb 21 10:11:23 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:33 2012 -0500" }, "message": "powerpc/85xx: Clean up partition nodes in dts for MPC8572DS\n\nSigned-off-by: Jin Qing \u003cb24347@freescale.com\u003e\nSigned-off-by: Jia Hongtao \u003cB38951@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "4951896aad0b73a8163eb23d44818993237bc0cf", "tree": "0e30431ff99cf89620b1bb5864ccd6823a3d400b", "parents": [ "4a170d0198330b8615778f6f0e265cdaadfd54b4" ], "author": { "name": "Timur Tabi", "email": "timur@freescale.com", "time": "Wed Feb 15 18:25:47 2012 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:33 2012 -0500" }, "message": "powerpc/85xx: p1022ds: disable the NOR flash node if video is enabled\n\nThe Freescale P1022 has a unique pin muxing \"feature\" where the DIU video\ncontroller\u0027s video signals are muxed with 24 of the local bus address signals.\nWhen the DIU is enabled, the bulk of the local bus is disabled, preventing\naccess to memory-mapped devices like NOR flash and the pixis FPGA.\n\nTherefore, if the DIU is going to be enabled, then memory-mapped devices on\nthe localbus, like NOR flash, need to be disabled.\n\nThis also means that the localbus is not a \u0027simple-bus\u0027 any more, so remove\nthat string from the compatible node.\n\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "4a170d0198330b8615778f6f0e265cdaadfd54b4", "tree": "228d68a8a7d5b60867e211d215893302ae207982", "parents": [ "54a1e76573b0b2bbda193b5d42ab7e1aba7081f7" ], "author": { "name": "Timur Tabi", "email": "timur@freescale.com", "time": "Wed Feb 15 18:25:48 2012 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:33 2012 -0500" }, "message": "powerpc/85xx: create 32-bit DTS for the P1022DS\n\nCreate a 32-bit address space version of p1022ds.dts. To avoid confusion,\np1022ds.dts is renamed to p1022ds_36b.dts. We also create p1022ds.dtsi\nto store some common nodes.\n\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "54a1e76573b0b2bbda193b5d42ab7e1aba7081f7", "tree": "bdd6698d8317dc751113d64d207685a969425439", "parents": [ "955abacd983ef6f8c8bd6abcff7fab0df9f7ec11" ], "author": { "name": "Xie Xiaobo", "email": "X.Xie@freescale.com", "time": "Tue Jan 17 17:59:51 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:32 2012 -0500" }, "message": "powerpc/85xx: Add magic-packet properties for etsec\n\nThe properties indicates that the hardware supports waking up via magic\npacket.\n\nSigned-off-by: Xie Xiaobo \u003cX.Xie@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "955abacd983ef6f8c8bd6abcff7fab0df9f7ec11", "tree": "6cd9db7e4a150fdd796781856c41d20eff8e31f2", "parents": [ "b53804c70258000026d0b68b86aaecd571f2ba8b" ], "author": { "name": "Xie Xiaobo", "email": "X.Xie@freescale.com", "time": "Tue Jan 17 17:59:50 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:32 2012 -0500" }, "message": "powerpc/85xx: Add some DTS nodes and attributes for mpc8536ds\n\nAdd partitions for NOR and NAND Flash.\n\nSigned-off-by: Xie Xiaobo \u003cX.Xie@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "e131fbda56131bf85a7d66834596be603eee7720", "tree": "cb043c9cee2479e34166b31f275628e6974bfbc7", "parents": [ "564ee46fb7b3d1cb9214ab32dde60cbe044b1f16" ], "author": { "name": "Gustavo Zacarias", "email": "gustavo@zacarias.com.ar", "time": "Tue Feb 28 16:43:08 2012 -0300" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:31 2012 -0500" }, "message": "powerpc/85xx: fix typo in p1010rdb.dtsi\n\nFix typo introduced by \"powerpc: Add TBI PHY node to first MDIO bus\"\nfrom Andy Fleming.\nIt\u0027s device_type rather than device-type, which causes the mdio probe to\nfail thus making all gianfar ethernet interfaces unusable.\n\nSigned-off-by: Gustavo Zacarias \u003cgustavo@zacarias.com.ar\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "564ee46fb7b3d1cb9214ab32dde60cbe044b1f16", "tree": "7c183cfbdbfc59f9477b2137287b2bb4e7112341", "parents": [ "0c00f65653389a408dfbbee7578e671664eea26a" ], "author": { "name": "Sebastian Andrzej Siewior", "email": "bigeasy@linutronix.de", "time": "Thu Mar 15 18:40:28 2012 +0100" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:31 2012 -0500" }, "message": "powerpc/85xx: p2020rdb \u0026 p1010rdb - lower spi flash freq to 40Mhz\n\nThis is here most likely since the FSL bsp. Back in the FSL bsp it was\nset to 50Mhz and working. However the driver divided the SoC freq. only\nby 2. According to the TRM the platform clock (which the manual refers\nin its formula) is the system clock divided by two. So in the end it has\nto divide by 4 and this is what the fsl-spi driver in tree is doing.\nSince then the flash is not wokring I guess. After chaning the freq from\n50Mhz to 40Mhz like others do then I can access the flash.\n\nSigned-off-by: Sebastian Andrzej Siewior \u003cbigeasy@linutronix.de\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "0c00f65653389a408dfbbee7578e671664eea26a", "tree": "6a25b37d75fd702c2a6c9a5b9a9a0af16b0504c6", "parents": [ "2a2383dab097823d68accce65da043402bdeb57b" ], "author": { "name": "Sebastian Andrzej Siewior", "email": "bigeasy@linutronix.de", "time": "Thu Mar 15 18:40:27 2012 +0100" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:30 2012 -0500" }, "message": "powerpc/85xx: p2020rdb - move the NAND address.\n\nIt is not at 0xffa00000. According to current u-boot source the NAND\ncontroller is always at 0xff800000 and it is either at CS0 or CS1\ndepending on NAND or NAND+NOR mode. In 36bit mode it is shifted to\n0xfff800000 but it has always an eight there and never an A.\n\nSigned-off-by: Sebastian Andrzej Siewior \u003cbigeasy@linutronix.de\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "79ad57400c6f943be48711fe3478c55affc5d5cc", "tree": "35034b493df2d3a03d6682c4b8cbd02f83b5e37e", "parents": [ "6886780abf8e3e059da822ed7066c449726e2f0c" ], "author": { "name": "Zhicheng Fan", "email": "b32736@freescale.com", "time": "Mon Feb 13 22:06:23 2012 +0000" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:29 2012 -0500" }, "message": "powerpc/85xx: Add dts for p1025rdb board\n\nP1025RDB Overview\n------------------\n1Gbyte DDR3 SDRAM\n32 Mbyte NAND flash\n16Mbyte NOR flash\n16 Mbyte SPI flash\nSD connector to interface with the SD memory card\nReal-time clock on I2C bus\n\nPCIe:\n- x1 PCIe slot\n- x1 mini-PCIe slot\n\n10/100/1000 BaseT Ethernet ports:\n- eTSEC1, RGMII: one 10/100/1000 port using AtherosTM AR8021\n- eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221\n- eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021\n\nUSB 2.0 port:\n- Two USB2.0 Type A receptacles\n- One USB2.0 signal to Mini PCIe slot\n\nDual RJ45 UART ports:\n- DUART interface: supports two UARTs up to 115200 bps for console display\n\nSigned-off-by: Zhicheng Fan \u003cb32736@freescale.com\u003e\nAcked-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "465aceb832fb54b342a098143dbdc1e1ae250416", "tree": "b6db1ab2e4b76a6c8a6864c9adfa23a087e909c5", "parents": [ "05413245fb993bb4e2d54ead0675226394d8a7c8" ], "author": { "name": "Ramneek Mehresh", "email": "ramneek.mehresh@freescale.com", "time": "Wed Jan 18 11:10:48 2012 +0530" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:13 2012 -0500" }, "message": "powerpc/85xx: Add usb controller version info\n\nAdd usb controller version info for the following:\nMPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041,\nP3041, P3060, P5020\n\nSigned-off-by: Ramneek Mehresh \u003cramneek.mehresh@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "05413245fb993bb4e2d54ead0675226394d8a7c8", "tree": "17997dcaf13993c3fafa15c5ded0f352d8fd8a69", "parents": [ "35ce1b5a20be296c0f2691955dbc86fa717aa584" ], "author": { "name": "Tang Yuantian", "email": "Yuantian.Tang@freescale.com", "time": "Thu Feb 09 21:59:57 2012 +0000" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 10:46:13 2012 -0500" }, "message": "powerpc/85xx: Add p2020rdb-pc dts support\n\nSigned-off-by: Prabhakar Kushwaha \u003cprabhakar@freescale.com\u003e\nSigned-off-by: Poonam Aggrwal \u003cpoonam.aggrwal@freescale.com\u003e\nSigned-off-by: Tang Yuantian \u003cb29983@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "490bdb77b64376ead1ba0f4b011f5abea360bbc5", "tree": "0aa01c72f684a147b3c3965766d0647b0c4d676d", "parents": [ "10241842fbe900276634fee8d37ec48a7d8a762f" ], "author": { "name": "Xu Jiucheng", "email": "B37781@freescale.com", "time": "Tue Jan 17 16:01:29 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Mar 16 09:44:59 2012 -0500" }, "message": "powerpc/85xx: Added dts for P1021RDB-PC board\n\nP1021RDB-PC Overview\n-----------------\n1Gbyte DDR3 (on board DDR)\n16Mbyte NOR flash\n32Mbyte eSLC NAND Flash\n256 Kbit M24256 I2C EEPROM\n128 Mbit SPI Flash memory\nReal-time clock on I2C bus\nSD/MMC connector to interface with the SD memory card\nPCIex\n - x1 PCIe slot or x1 PCIe to dual SATA controller\n - x1 mini-PCIe slot\nUSB 2.0\n - ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic’s GL850A\n - Two USB2.0 Type A receptacles\n - One USB2.0 signal to Mini PCIe slot\neTSEC1: Connected to RGMII PHY VSC7385\neTSEC2: Connected to SGMII PHY VSC8221\neTSEC3: Connected to SGMII PHY AR8021\nDUART interface: supports two UARTs up to 115200 bps for console display\n\nSigned-off-by: Matthew McClintock \u003cmsm@freescale.com\u003e\nSigned-off-by: Xu Jiucheng \u003cB37781@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "8dfc2b45ffc722c4291f24f1f40c64e448b9b5b4", "tree": "7e4ba632fa08ed7480fbd3fbe54e034b9dbb6c26", "parents": [ "95f050bf7f64be5168ae2e2c715bb0b0ded141d1" ], "author": { "name": "Duc Dang", "email": "dhdang@apm.com", "time": "Mon Mar 05 00:57:42 2012 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Mar 06 17:06:07 2012 -0500" }, "message": "powerpc/44x: Add new compatible value for EMAC node of APM821XX dts file.\n\nThis compatible value will be used to distinguish some special features of APM821XX EMAC: no half duplex mode support, configuring jumbo frame.\n\nSigned-off-by: Duc Dang \u003cdhdang@apm.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c1b8d45db4dbc64cc6015f97922f767fdf782f64", "tree": "c23f986f6601b2f67645eca5b8744c8d753bc094", "parents": [ "5019609fce965dbdc66a7d947385fe92ca522231" ], "author": { "name": "Kyle Moffett", "email": "Kyle.D.Moffett@boeing.com", "time": "Thu Dec 22 10:19:13 2011 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Feb 23 10:50:00 2012 +1100" }, "message": "powerpc/mpic: Add \"last-interrupt-source\" property to override hardware\n\nThe FreeScale PowerQUICC-III-compatible (mpc85xx/mpc86xx) MPICs do not\ncorrectly report the number of hardware interrupt sources, so software\nneeds to override the detected value with \"256\".\n\nTo avoid needing to write custom board-specific code to detect that\nscenario, allow it to be easily overridden in the device-tree.\n\nSigned-off-by: Kyle Moffett \u003cKyle.D.Moffett@boeing.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "9ca163c8602681ad098910f48f89b97f0cb87c4f", "tree": "e2aa87c28be3b1253273b1a1e609b5d0e9d6feb7", "parents": [ "98cca250aecaf3f1b2fec003e1c0ce0bfaa4be36" ], "author": { "name": "Kyle Moffett", "email": "Kyle.D.Moffett@boeing.com", "time": "Thu Dec 22 10:19:11 2011 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Feb 23 10:49:59 2012 +1100" }, "message": "fsl/mpic: Create and document the \"single-cpu-affinity\" device-tree flag\n\nThe Freescale MPIC (and perhaps others in the future) is incapable of\nrouting non-IPI interrupts to more than once CPU at a time. Currently\nall of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to\nmpic_alloc(), but that information should really be present in the\ndevice-tree.\n\nOlder board code can\u0027t rely on the device-tree having the property set,\nbut newer platforms won\u0027t need it manually specified in the code.\n\n[BenH: Remove unrelated changes, folded in a different patch]\n\nSigned-off-by: Kyle Moffett \u003cKyle.D.Moffett@boeing.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "98cca250aecaf3f1b2fec003e1c0ce0bfaa4be36", "tree": "e87824ccffa41ac62898947a680c0c7d0f53db2e", "parents": [ "3a7a7176e840f448aae929f7761ea80cf892c665" ], "author": { "name": "Kyle Moffett", "email": "Kyle.D.Moffett@boeing.com", "time": "Thu Dec 22 10:19:10 2011 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Feb 23 10:49:58 2012 +1100" }, "message": "fsl/mpic: Document and use the \"big-endian\" device-tree flag\n\nThe MPIC code checks for a \"big-endian\" property and sets the flag\nMPIC_BIG_ENDIAN if one is present, although prior to the \"mpic-\u003eflags\"\nfixup that would never have worked anways.\n\nUnfortunately, even now that it works properly, the Freescale mpic\ndevice-node (the \"PowerQUICC-III\"-compatible one) does not specify it,\nso all of the board ports need to manually pass it to mpic_alloc().\n\nDocument the flag and add it to the pq3 device tree. Existing code will\nstill need to pass the MPIC_BIG_ENDIAN flag because their dtb may not\nhave this property, but new platforms shouldn\u0027t need to do so.\n\nSigned-off-by: Kyle Moffett \u003cKyle.D.Moffett@boeing.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "621c4b999e3e1dc6f72b0c1680029981edc03caa", "tree": "4f7ac0941d4d85277c8add554ab7f1b55f72dc1b", "parents": [ "70a0ac66869907ce3914f26fe1eba984c9eb438e" ], "author": { "name": "Ramneek Mehresh", "email": "ramneek.mehresh@freescale.com", "time": "Wed Jan 18 12:18:46 2012 +0530" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Jan 18 08:05:42 2012 -0600" }, "message": "powerpc/85xx: Add dr_mode property in USB nodes\n\nAdd usb2 controller node for P1020RDB, P2020RDB, P2020DS, P1021MDS\n\nSigned-off-by: Ramneek Mehresh \u003cramneek.mehresh@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "70a0ac66869907ce3914f26fe1eba984c9eb438e", "tree": "ec87c5e7538e001fd2a91bb16c852153ce2d4a3a", "parents": [ "f8b5a31877b93f7136ce8c22ce44930e39b41204" ], "author": { "name": "Ramneek Mehresh", "email": "ramneek.mehresh@freescale.com", "time": "Wed Jan 18 11:20:39 2012 +0530" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Jan 18 08:05:36 2012 -0600" }, "message": "powerpc/85xx: Enable USB2 controller node for P1020RDB\n\nEnable USB2 controller node for P1020RDB. USB2 controller is used only\nwhen board boots from SPI or SD as it is muxed with eLBC\n\nSigned-off-by: Ramneek Mehresh \u003cramneek.mehresh@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "f8b5a31877b93f7136ce8c22ce44930e39b41204", "tree": "ae0c2caa45a42d439557846221eaf13a2fff07ea", "parents": [ "0cf572dc00cd36250af9260377a0b5faac9b3284" ], "author": { "name": "Jerry Huang", "email": "Chang-Ming.Huang@freescale.com", "time": "Thu Jan 05 09:40:56 2012 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Jan 18 08:01:53 2012 -0600" }, "message": "powerpc/85xx: Fix cmd12 bug and add the chip compatible for eSDHC\n\nAccording to latest kernel, the auto-cmd12 property should be\n\"sdhci,auto-cmd12\", and according to the SDHC binding and the workaround for\nthe special chip, add the chip compatible for eSDHC: \"fsl,p1022-esdhc\",\n\"fsl,mpc8536-esdhc\", \"fsl,p1020-esdhc\", \"fsl,p2020-esdhc\" and\n\"fsl,p1010-esdhc\".\n\nSigned-off-by: Jerry Huang \u003cChang-Ming.Huang@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "c63dbbd5268c397f051e0e0f665799ef64a1f3a4", "tree": "3d832ca143858fd601869a1e2dbe553bd513d854", "parents": [ "53999bf34d55981328f8ba9def558d3e104d6e36", "7c43185138cf523b0810ffd2c9e18e2ecb356730" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 16 14:34:54 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 16 14:34:54 2012 -0800" }, "message": "Merge branch \u0027kbuild\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild\n\n* \u0027kbuild\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild:\n Kbuild: Use dtc\u0027s -d (dependency) option\n dtc: Implement -d option to write out a dependency file\n kbuild: Fix comment in Makefile.lib\n scripts/genksyms: clean lex/yacc generated files\n kbuild: Correctly deal with make options which contain an \"s\"\n" }, { "commit": "7c43185138cf523b0810ffd2c9e18e2ecb356730", "tree": "24deed8741857d00f5575bf8febf0c6f66357af4", "parents": [ "136ec2049fea65aed0446d04ab7cfff2ae3070f1" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Mon Jan 09 11:38:15 2012 -0700" }, "committer": { "name": "Michal Marek", "email": "mmarek@suse.cz", "time": "Sun Jan 15 00:04:35 2012 +0100" }, "message": "Kbuild: Use dtc\u0027s -d (dependency) option\n\nThis hooks dtc into Kbuild\u0027s dependency system.\n\nThus, for example, \"make dtbs\" will rebuild tegra-harmony.dtb if only\ntegra20.dtsi has changed yet tegra-harmony.dts has not. The previous\nlack of this feature recently caused me to have very confusing \"git\nbisect\" results.\n\nFor ARM, it\u0027s obvious what to add to $(targets). I\u0027m not familiar enough\nwith other architectures to know what to add there. Powerpc appears to\nalready add various .dtb files into $(targets), but the other archs may\nneed something added to $(targets) to work.\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nAcked-by: Shawn Guo \u003cshawn.guo@linaro.org\u003e\n[mmarek: Dropped arch/c6x part to avoid merging commits from the middle\nof the merge window]\nSigned-off-by: Michal Marek \u003cmmarek@suse.cz\u003e\n" }, { "commit": "e4e88f31bcb5f05f24b9ae518d4ecb44e1a7774d", "tree": "9eef6998f5bbd1a2c999011d9e0151f00c6e7297", "parents": [ "9753dfe19a85e7e45a34a56f4cb2048bb4f50e27", "ef88e3911c0e0301e73fa3b3b2567aabdbe17cc4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 17:58:22 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Jan 06 17:58:22 2012 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (185 commits)\n powerpc: fix compile error with 85xx/p1010rdb.c\n powerpc: fix compile error with 85xx/p1023_rds.c\n powerpc/fsl: add MSI support for the Freescale hypervisor\n arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree\n powerpc/fsl: Add support for Integrated Flash Controller\n powerpc/fsl: update compatiable on fsl 16550 uart nodes\n powerpc/85xx: fix PCI and localbus properties in p1022ds.dts\n powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defconfig\n powerpc/fsl: Update defconfigs to enable some standard FSL HW features\n powerpc: Add TBI PHY node to first MDIO bus\n sbc834x: put full compat string in board match check\n powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address\n powerpc: Fix unpaired probe_hcall_entry and probe_hcall_exit\n offb: Fix setting of the pseudo-palette for \u003e8bpp\n offb: Add palette hack for qemu \"standard vga\" framebuffer\n offb: Fix bug in calculating requested vram size\n powerpc/boot: Change the WARN to INFO for boot wrapper overlap message\n powerpc/44x: Fix build error on currituck platform\n powerpc/boot: Change the load address for the wrapper to fit the kernel\n powerpc/44x: Enable CRASH_DUMP for 440x\n ...\n\nFix up a trivial conflict in arch/powerpc/include/asm/cputime.h due to\nthe additional sparse-checking code for cputime_t.\n" }, { "commit": "f706bed1144e0fdad2b583549fc366afd4a1e9f1", "tree": "99a81eb38dd583b9a3be69dbb26c1f48422ee194", "parents": [ "0725696306b10e125191ae772c7f19eca88f2ca1" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Nov 28 13:58:53 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Jan 04 15:38:40 2012 -0600" }, "message": "powerpc/fsl: update compatiable on fsl 16550 uart nodes\n\nThe Freescale serial port\u0027s are pretty much a 16550, however there are\nsome FSL specific bugs and features. Add a \"fsl,ns16550\" compatiable\nstring to allow code to handle those FSL specific issues.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "0725696306b10e125191ae772c7f19eca88f2ca1", "tree": "b4a446107e2e576a3f1472bd4b329f8a206378be", "parents": [ "3900fad3d32ed3ddfb365657733a93cf46b53240" ], "author": { "name": "Timur Tabi", "email": "timur@freescale.com", "time": "Fri Dec 09 09:20:03 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Jan 04 15:33:58 2012 -0600" }, "message": "powerpc/85xx: fix PCI and localbus properties in p1022ds.dts\n\nPCI ranges, localbus reg and localbus chip-select 2 range do not match\nthe memory map setup by bootloader.\n\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "220669495bf8b68130a8218607147c7b74c28d2b", "tree": "af31ad750cf3ea770084c4020e2eaa582e2393e3", "parents": [ "dabc78403fc2ad96e6fc8b53c6c6abcc02e152ee" ], "author": { "name": "Andy Fleming", "email": "afleming@freescale.com", "time": "Wed Jan 04 15:28:31 2012 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Jan 04 15:33:51 2012 -0600" }, "message": "powerpc: Add TBI PHY node to first MDIO bus\n\nSystems which use the fsl_pq_mdio driver need to specify an\naddress for TBI PHY transactions such that the address does\nnot conflict with any PHYs on the bus (all transactions to\nthat address are directed to the onboard TBI PHY). The driver\nused to scan for a free address if no address was specified,\nhowever this ran into issues when the PHY Lib was fixed so\nthat all MDIO transactions were protected by a mutex. As it\nis, the code was meant to serve as a transitional tool until\nthe device trees were all updated to specify the TBI address.\n\nThe best fix for the mutex issue was to remove the scanning code,\nbut it turns out some of the newer SoCs have started to omit\nthe tbi-phy node when SGMII is not being used. As such, these\ndevices will now fail unless we add a tbi-phy node to the first\nmdio controller.\n\nSigned-off-by: Andy Fleming \u003cafleming@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "eba3d97db876fe6f8bad64ecd9dc20133e7708ed", "tree": "44e48f2c1cf40fa24ae97c82299e8ff39cc2f087", "parents": [ "eb975652b8fa0c4f08a52744d34bdebf66589d4b" ], "author": { "name": "Suzuki Poulose", "email": "suzuki@in.ibm.com", "time": "Tue Dec 20 21:20:38 2011 +0000" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@gmail.com", "time": "Wed Dec 21 15:09:25 2011 -0500" }, "message": "powerpc/boot: Change the WARN to INFO for boot wrapper overlap message\n\ncommit c55aef0e5bc6 (\"powerpc/boot: Change the load address\nfor the wrapper to fit the kernel\") introduced a WARNING to\ninform the user that the uncompressed kernel would overlap\nthe boot uncompressing wrapper code. Change it to an INFO.\n\nI initially thought, this would be a \u0027WARNING\u0027 for the those\nboards, where the link_address should be fixed, so that the\nuser can take actions accordingly.\n\nChanging the same to INFO.\n\nSigned-off-by: Suzuki K. Poulose \u003csuzuki@in.ibm.com\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@gmail.com\u003e\n" }, { "commit": "c55aef0e5bc61539ad5c915c1400103f1c79942e", "tree": "1d866c77c2cbf4234687dde2bbbe1dc7ec3f2b3e", "parents": [ "5b2e478da032b7d443833402fa586f832397f3be" ], "author": { "name": "Suzuki Poulose", "email": "suzuki@in.ibm.com", "time": "Wed Dec 14 22:59:57 2011 +0000" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@gmail.com", "time": "Tue Dec 20 10:22:56 2011 -0500" }, "message": "powerpc/boot: Change the load address for the wrapper to fit the kernel\n\nThe wrapper code which uncompresses the kernel in case of a \u0027ppc\u0027 boot\nis by default loaded at 0x00400000 and the kernel will be uncompressed\nto fit the location 0-0x00400000. But with dynamic relocations, the size\nof the kernel may exceed 0x00400000(4M). This would cause an overlap\nof the uncompressed kernel and the boot wrapper, causing a failure in\nboot.\n\nThe message looks like :\n\n zImage starting: loaded at 0x00400000 (sp: 0x0065ffb0)\n Allocating 0x5ce650 bytes for kernel ...\n Insufficient memory for kernel at address 0! (_start\u003d00400000, uncompressed size\u003d00591a20)\n\nThis patch shifts the load address of the boot wrapper code to the next\nhigher MB, according to the size of the uncompressed vmlinux.\n\nWith the patch, we get the following message while building the image :\n\n WARN: Uncompressed kernel (size 0x5b0344) overlaps the address of the wrapper(0x400000)\n WARN: Fixing the link_address of wrapper to (0x600000)\n\nSigned-off-by: Suzuki K. Poulose \u003csuzuki@in.ibm.com\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@gmail.com\u003e\n" }, { "commit": "1e7342e7789fa2ca9202701467428726cbcfd649", "tree": "e0ad000924e9875bd2ea17bd0e04382491765a09", "parents": [ "78c5c68a4cf4329d17abfa469345ddf323d4fd62", "228d55053397e6d5325ca179c7ffe331de2846d3" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Dec 16 11:24:25 2011 +1100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Dec 16 11:24:25 2011 +1100" }, "message": "Merge remote-tracking branch \u0027jwb/next\u0027 into next\n\nConflicts:\n\tarch/powerpc/platforms/40x/ppc40x_simple.c\n" }, { "commit": "228d55053397e6d5325ca179c7ffe331de2846d3", "tree": "d0157d2ab1113faab5884cb5f26f65cfe8f43a69", "parents": [ "df777bd39a266637d1765d48043493489418e75b" ], "author": { "name": "Tony Breeds", "email": "tony@bakeyournoodle.com", "time": "Wed Nov 30 21:39:24 2011 +0000" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@gmail.com", "time": "Fri Dec 09 07:51:40 2011 -0500" }, "message": "powerpc/47x: Add support for the new IBM currituck platform\n\nBased on original work by David \u0027Shaggy\u0027 Kleikamp.\n\nSigned-off-by: Tony Breeds \u003ctony@bakeyournoodle.com\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@gmail.com\u003e\n" }, { "commit": "075bcf5879225d0c2a119c23d8046b890e051e81", "tree": "f6b3bb02bd859cd1ff7d8603296079e011ed5033", "parents": [ "e32a03290c72773c304ffeebffed0a63c0a672ae" ], "author": { "name": "Tony Breeds", "email": "tony@bakeyournoodle.com", "time": "Wed Nov 30 21:39:22 2011 +0000" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@gmail.com", "time": "Fri Dec 09 07:49:50 2011 -0500" }, "message": "powerpc/boot: Add mfdcrx\n\nNeeded for currituck support.\n\nSigned-off-by: Tony Breeds \u003ctony@bakeyournoodle.com\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@gmail.com\u003e\n" }, { "commit": "e32a03290c72773c304ffeebffed0a63c0a672ae", "tree": "526f104f9451e97b3b9f111bde7568b9db2e6c5b", "parents": [ "ca899859f14e510854c5c8908d3ffdfcd34b16de" ], "author": { "name": "Tony Breeds", "email": "tony@bakeyournoodle.com", "time": "Wed Nov 30 21:39:21 2011 +0000" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@gmail.com", "time": "Fri Dec 09 07:49:27 2011 -0500" }, "message": "powerpc/boot: Add extended precision shifts to the boot wrapper.\n\nThe upcomming currituck patches will need to do 64-bit shifts which will\nfail with undefined symbol without this patch.\n\nI looked at linking against libgcc but we can\u0027t guarantee that libgcc\nwas compiled with soft-float. Also Using ../lib/div64.S or\n../kernel/misc_32.S, this will break the build as the .o\u0027s need to be\nbuilt with different flags for the bootwrapper vs the kernel. So for\nnow the easyest option is to just copy code from\narch/powerpc/kernel/misc_32.S I don\u0027t think this code changes too often ;P\n\nSigned-off-by: Tony Breeds \u003ctony@bakeyournoodle.com\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@gmail.com\u003e\n" }, { "commit": "11eab297f57bd6168425ae968e56c314e71b024e", "tree": "d28266a447accf2b741e20d1e605e7a045ba9e2d", "parents": [ "faa8bf8878636e40646d307e0516dbadb3b65b4f" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Dec 01 19:35:08 2011 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Dec 08 14:22:52 2011 +1100" }, "message": "powerpc: Add support for OpenBlockS 600\n\nSo I\u0027ve had one of these for a while and it looks like the vendor never\nbothered submitting the support upstream.\n\nThis adds it using ppc40x_simple and provides a device-tree.\n\nThere are some changes to the boot wrapper because the way u-boot works\non this thing, it seems to expect a multipart image with the kernel,\ninitrd and dtb in it.\n\nThe USB support is missing as it needs the yet unmerged driver for\nthe DWC OTG part and the GPIOs may need further definition in the dts.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "b3613118eb30a589d971e4eccbbb2a1314f5dfd4", "tree": "868c1ee59e1b5c19a4f2e43716400d0001a994e5", "parents": [ "7505afe28c16a8d386624930a018d0052c75d687", "5983fe2b29df5885880d7fa3b91aca306c7564ef" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Dec 02 13:49:21 2011 -0500" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Dec 02 13:49:21 2011 -0500" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net\n" }, { "commit": "fa17a019c87e2ed25b653844f668f111ee059e56", "tree": "63c00212cd9a90496fe84f6b5d8499b202d1af7a", "parents": [ "e285e44d91fe5a89e0d9fe4f5dda4f9e8c8a3c7e" ], "author": { "name": "Wolfgang Grandegger", "email": "wg@grandegger.com", "time": "Wed Nov 30 23:41:21 2011 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Thu Dec 01 13:09:32 2011 -0500" }, "message": "powerpc: tqm8548/tqm8xx: add and update CAN device nodes\n\nThis patch enables or updates support for the CC770 and AN82527\nCAN controller on the TQM8548 and TQM8xx boards.\n\nCC: devicetree-discuss@lists.ozlabs.org\nCC: linuxppc-dev@ozlabs.org\nCC: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Wolfgang Grandegger \u003cwg@grandegger.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "d5b9ee7b514ee2f3df649fe38d01494ad7a8b956", "tree": "04fa113297e8ab58e119a4141ec28de489d8e26c", "parents": [ "fa8cbaaf5a68f62db3f9a8444ecbb940b47984cb" ], "author": { "name": "Tanmay Inamdar", "email": "tinamdar@apm.com", "time": "Mon Nov 28 21:01:41 2011 +0000" }, "committer": { "name": "Josh Boyer", "email": "jwboyer@gmail.com", "time": "Wed Nov 30 10:02:15 2011 -0500" }, "message": "powerpc/40x: Add APM8018X SOC support\n\nThe AppliedMicro APM8018X embedded processor targets embedded applications that\nrequire low power and a small footprint. It features a PowerPC 405 processor\ncore built in a 65nm low-power CMOS process with a five-stage pipeline executing\nup to one instruction per cycle. The family has 128-kbytes of on-chip memory,\na 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface.\n\nSigned-off-by: Tanmay Inamdar \u003ctinamdar@apm.com\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@gmail.com\u003e\n" }, { "commit": "c0019a4d6700e22409ffeaf6dbfa0b0700d128ca", "tree": "19814cd3e8fc8e5e5415594ccbb065c75e5f29ae", "parents": [ "09cef8bd07fe473f1ba5fb5e34a1e3db3650b9a9" ], "author": { "name": "Timur Tabi", "email": "timur@freescale.com", "time": "Fri Nov 18 11:50:00 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:40 2011 -0600" }, "message": "powerpc/85xx: add pixis indirect mode device tree node\n\nThe Freescale P1022 has a unique pin muxing \"feature\" where the DIU video\ncontroller\u0027s video signals are muxed with 24 of the local bus address signals.\nWhen the DIU is enabled, the bulk of the local bus is disabled, preventing\naccess to memory-mapped devices like NOR flash and the pixis FPGA.\n\nIn this situation, the pixis supports \"indirect mode\", which allows access\nto the pixis itself by reading/writing addresses on specific local bus\nchip selects. CS0 is used to select which pixis register to access, and\nCS1 is used to read/write the value.\n\nTo support this, we introduce another board-control child node of the\nlocalbus node that contains a \u0027reg\u0027 property for CS0 and CS1. This will\nproduce the correct physical addresses for CS0 and CS1.\n\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "54986964c13c72f0a6cf58855ee376a12e21d2d7", "tree": "8f1c8f52dea198bb47f354887d333e1626138631", "parents": [ "03f4201bd44e7d3ca7dc26b30d4251a07c77e9f2" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 17 08:01:40 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:39 2011 -0600" }, "message": "powerpc/85xx: Update SRIO device tree nodes\n\nUpdate all dts files that support SRIO controllers to match the new\nfsl,srio device tree binding.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "03f4201bd44e7d3ca7dc26b30d4251a07c77e9f2", "tree": "d786c935b607b77f116e6fb0446923d93b2b97f9", "parents": [ "b9db022c62f72bc5a029f20851b012895a6ea7ca" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Nov 07 10:22:36 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:39 2011 -0600" }, "message": "powerpc/85xx: Rework P5020DS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Adding of MPIC timer blocks\n* Dropping \"fsl,p5020-IP...\" from compatibles for standard blocks\n* Removed mpic interrupt-parent from dcsr-epu node, just use top level\n* Removed mpic interrupt-parent from sec nodes, just use top level\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "b9db022c62f72bc5a029f20851b012895a6ea7ca", "tree": "fdd6987a68f4857280d9fc215ba3b0b44c2c2811", "parents": [ "8389c823b50bfb81eccdb115f486459adacf4b17" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Nov 04 09:47:49 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:39 2011 -0600" }, "message": "powerpc/85xx: Rework P4080DS device trees\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Adding of MPIC timer blocks\n* Dropping \"fsl,p4080-IP...\" from compatibles for standard blocks\n* Removed mpic interrupt-parent from dcsr-epu node, just use top level\n* Removed mpic interrupt-parent from sec nodes, just use top level\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "8389c823b50bfb81eccdb115f486459adacf4b17", "tree": "ecc7f6a98390155e717c5bc4c23add605b8ea30e", "parents": [ "b4c3804d18d37130625e1dd4d08fd9625f7eaba4" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Nov 09 13:21:57 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:39 2011 -0600" }, "message": "powerpc/85xx: Rework P3060QDS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Adding of MPIC timer blocks\n* Dropping \"fsl,p3060-IP...\" from compatibles for standard blocks\n* Removed mpic interrupt-parent from dcsr-epu node, just use top level\n* Removed mpic interrupt-parent from sec nodes, just use top level\n* Fixed l3-cache IRQs, we have 2 CPCs, so we should have IRQs for both\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "b4c3804d18d37130625e1dd4d08fd9625f7eaba4", "tree": "899604d4a8708988ad848f02ad76882a428ccddf", "parents": [ "8b8673b8502b2bebf37db6c079699f76d421abc2" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Nov 07 10:38:56 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:39 2011 -0600" }, "message": "powerpc/85xx: Rework P3041DS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Adding of MPIC timer blocks\n* Dropping \"fsl,p3041-IP...\" from compatibles for standard blocks\n* Removed mpic interrupt-parent from dcsr-epu node, just use top level\n* Fixed some dcsr compatiable typo\u0027s from \u0027p43041\u0027 to \u0027p3041\u0027\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "8b8673b8502b2bebf37db6c079699f76d421abc2", "tree": "85ae6572af4e070ce1b9e3049b29d9af2bec645f", "parents": [ "941d71c7361815c02e2b2831bbb9f06a504a3d24" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Nov 07 10:58:28 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:39 2011 -0600" }, "message": "powerpc/85xx: Rework P2041RDB device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Adding of MPIC timer blocks\n* Dropping \"fsl,p2041-IP...\" from compatibles for standard blocks\n* Removed mpic interrupt-parent from dcsr-epu node, just use top level\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "941d71c7361815c02e2b2831bbb9f06a504a3d24", "tree": "973976fa32a26369b7fcb59f5aa89a5a29875bc6", "parents": [ "7f9ce7143efe1231d66a5c91e57fce55fce6728e" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Nov 04 00:48:57 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:38 2011 -0600" }, "message": "powerpc/85xx: Rework P2020RDB device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and\n moved PCI device IRQs down to virtual bridge level\n* Updated spi node to new espi binding specification\n* Renamed \u0027sdhci\u0027 node to \u0027sdhc\u0027\n* Changed GPIO compatiable from \u0027fsl,mpc8572-gpio\u0027 to \u0027fsl,pq3-gpio\u0027 as the\n \u0027mpc8572\u0027 compatiable is to deal with a \u0027mpc8572\u0027 specific to an erratum\n* Fixed wrong reg offsets for mdio nodes associated with etsec2 \u0026\n* etsec3\n* Dropping \"fsl,p2020-IP...\" from compatibles for standard blocks\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "7f9ce7143efe1231d66a5c91e57fce55fce6728e", "tree": "148cd9eb3003efad9e6880159081aa8e02581a51", "parents": [ "b0e2f248b4ed6aea3191c3419e6f70407d53d8d8" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 26 08:35:24 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:38 2011 -0600" }, "message": "powerpc/85xx: Rework P2020DS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors)\n and moved PCI device IRQs down to virtual bridge level\n* Updated spi node to new espi binding specification\n* Renamed \u0027sdhci\u0027 node to \u0027sdhc\u0027\n* Changed GPIO compatiable from \u0027fsl,mpc8572-gpio\u0027 to \u0027fsl,pq3-gpio\u0027 as the\n \u0027mpc8572\u0027 compatiable is to deal with a \u0027mpc8572\u0027 specific to an erratum\n* Fixed wrong reg offsets for mdio nodes associated with etsec2 \u0026 etsec3\n* Dropping \"fsl,p2020-IP...\" from compatibles for standard blocks\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "b0e2f248b4ed6aea3191c3419e6f70407d53d8d8", "tree": "27e3c1d52628891fed3e06f9289d0890a14dd99a", "parents": [ "ab827d97bd5c7aa3ccf637161d22a6329fb24a02" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Nov 09 14:53:33 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:38 2011 -0600" }, "message": "powerpc/85xx: Rework P1023RDS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Dropping \"fsl,p1023-IP...\" from compatibles for standard blocks\n* Removed incorrect power/pmc node, there are no etsec on P1023\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "ab827d97bd5c7aa3ccf637161d22a6329fb24a02", "tree": "e6a3c13c666d96c35a7869d34e46e451c5dc76f8", "parents": [ "ffeb33d20c6217bb8f0ab46d3f1396021c00c24f" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 26 01:01:54 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:38 2011 -0600" }, "message": "powerpc/85xx: Rework P1022DS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors)\n and moved PCI device IRQs down to virtual bridge level\n* Changed GPIO compatiable from \u0027fsl,mpc8572-gpio\u0027 to \u0027fsl,pq3-gpio\u0027 as the\n \u0027mpc8572\u0027 compatiable is to deal with a \u0027mpc8572\u0027 specific to an erratum\n* Updated spi node to new espi binding specification\n* Renamed SDHC node from \u0027sdhci\u0027 to \u0027sdhc\u0027\n* Added usb node for 2nd usb controller\n* Dropping \"fsl,p1022-IP...\" from compatibles for standard blocks\n* Fixed bug in local bus range node for CS2, was maping to\n 0x0 0x0xffa00000 instead of 0xf 0xffa00000\n* Fixed localbus reg property should have been 0xf 0xffe05000\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nTested-by: Timur Tabi \u003ctimur@freescale.com\u003e\n" }, { "commit": "ffeb33d20c6217bb8f0ab46d3f1396021c00c24f", "tree": "cf814b306078ba3eebee9cfaf7497bd71b4c0d09", "parents": [ "3316a83c7c2335d92f924e080a2c7b9b144bc1ba" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Nov 02 10:15:30 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:38 2011 -0600" }, "message": "powerpc/85xx: Rework P1021MDS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and\n moved PCI device IRQs down to virtual bridge level\n* Renamed SDHC node from \u0027sdhci\u0027 to \u0027sdhc\u0027\n* Added usb node for 2nd usb controller\n* Dropping \"fsl,p1021-IP...\" from compatibles for standard blocks\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "3316a83c7c2335d92f924e080a2c7b9b144bc1ba", "tree": "e45010edd1edd79f1f0fe64693860175466d6239", "parents": [ "4e36afa7c5cd7d4585048263cbdc2b955117f590" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Oct 20 23:46:12 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:38 2011 -0600" }, "message": "powerpc/85xx: Add P1020RDB 36-bit address map device tree\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "4e36afa7c5cd7d4585048263cbdc2b955117f590", "tree": "ac3a4b7d60714aff2beda44c91d54dffaa9b74ad", "parents": [ "4de0e39cb883b26af667c660383ac26df525ae0b" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Oct 20 02:21:09 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:37 2011 -0600" }, "message": "powerpc/85xx: Rework P1020RDB device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Dropping \"fsl,p1020-IP...\" from compatibles for standard blocks\n* Fixed PCIe interrupt-maps to have proper number of cells\n* Added mdio node for etsec@26000\n* Added usb node for 2nd usb controller\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "4de0e39cb883b26af667c660383ac26df525ae0b", "tree": "5fb01c9fac9c5cb13973f78ca16b6171209bba8f", "parents": [ "396a5a56915e40c6aecd82afed5ef545e98cedfa" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 26 00:10:58 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:37 2011 -0600" }, "message": "powerpc/85xx: Add a P1010RDB 36-bit address map device tree\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "396a5a56915e40c6aecd82afed5ef545e98cedfa", "tree": "3d0a26cde879e4385988c75c6c3727aee6d5cc91", "parents": [ "ae744b4118d7b3399c646212d8ae8f07e44a0c4e" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Tue Oct 25 23:29:47 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:37 2011 -0600" }, "message": "powerpc/85xx: Add crypto engine to P1010 SoC device tree\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "ae744b4118d7b3399c646212d8ae8f07e44a0c4e", "tree": "d1a148509e9f7c492c821c1523bbb778af32cdb1", "parents": [ "96488746bbfb3e25a9c451e198c4d7c4b2e0731f" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Tue Oct 25 23:29:27 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:37 2011 -0600" }, "message": "powerpc/85xx: Add RTC to P1010RDB device tree\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "96488746bbfb3e25a9c451e198c4d7c4b2e0731f", "tree": "22e6300d0f89f30c3d78ed0ed0f7566a7f27f26f", "parents": [ "532919592fcfb824aad0494f54e45a0acc83a776" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Sat Oct 22 16:58:40 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:37 2011 -0600" }, "message": "powerpc/85xx: Rework P1010RDB and P1010 device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Dropping \"fsl,p1010-IP...\" from compatibles for standard blocks\n* PCI interrupt map - wrong IRQs for PCI-0 controller\n* SDHC interrupt sense was wrong\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "532919592fcfb824aad0494f54e45a0acc83a776", "tree": "53054fb7bc0f472264db20c1399808e65413d00b", "parents": [ "e7a7b329f2001da8fbc3a35735adf32e516b9f93" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 03 01:07:56 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:37 2011 -0600" }, "message": "powerpc/85xx: Rework MPC8572DS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Removed CPU properties setup by u-boot to match other .dts\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and\n moved PCI device IRQs down to virtual bridge level\n* Moved mdio nodes up one level instead of under tsec nodes\n* Added GPIO controller node to MPC8572 SoC template\n* Dropping \"fsl,mpc8572-IP...\" from compatibles for standard blocks\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "e7a7b329f2001da8fbc3a35735adf32e516b9f93", "tree": "cb25fa2b29d6d9d1edf61d6c830c365495c32267", "parents": [ "1a23b4a64a6ede84eae820f35e02a869bdf09b77" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Nov 09 16:26:13 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:36 2011 -0600" }, "message": "powerpc/85xx: Rework MPC8569MDS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Moved to a standard 2 #address-cells \u0026 #size-cells at top-level\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Removed CPU properties setup by u-boot to match other .dts\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors)\n and moved PCI device IRQs down to virtual bridge level\n* Renamed SDHC node from \u0027sdhci\u0027 to \u0027sdhc\u0027\n* Dropping \"fsl,mpc8569-IP...\" from compatibles for standard blocks\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "1a23b4a64a6ede84eae820f35e02a869bdf09b77", "tree": "56624a67860864ba6ef5eb126490884140bc8361", "parents": [ "53e23dcb1894604ac8377fd4293d29116b9ae904" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 10 08:05:16 2011 -0600" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:36 2011 -0600" }, "message": "powerpc/85xx: Rework MPC8568MDS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Moved to a standard 2 #address-cells \u0026 #size-cells at top-level\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Removed CPU properties setup by u-boot to match other .dts\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors)\n and moved PCI device IRQs down to virtual bridge level\n* Dropping \"fsl,mpc8568-IP...\" from compatibles for standard blocks\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "53e23dcb1894604ac8377fd4293d29116b9ae904", "tree": "183bffb4703b662234606f6f76671eeca7c3cd0f", "parents": [ "b7f817547d7e1b56c1afbf4411df6fd73a0d78e9" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Fri Nov 04 00:26:10 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:36 2011 -0600" }, "message": "powerpc/85xx: Rework MPC8548CDS device trees\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Moved to a standard 2 #address-cells \u0026 #size-cells at top-level\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Moved mdio nodes up one level instead of under tsec nodes\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors)\n and moved PCI device IRQs down to virtual bridge level\n* Removed CPU properties setup by u-boot to match other .dts\n* Added localbus node, but no chipselect details at this point\n* Added MPIC / PCIe msi node\n* Dropping \"fsl,mpc8548-IP...\" from compatibles for standard blocks\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "b7f817547d7e1b56c1afbf4411df6fd73a0d78e9", "tree": "dfbf2777fd5bd86448a8f5c099886b4a5b06daa0", "parents": [ "2e8685a491c1063a4126598b10ecb78d1d20f537" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 03 23:24:12 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:36 2011 -0600" }, "message": "powerpc/85xx: Rework MPC8544DS device tree\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Moved to a standard 2 #address-cells \u0026 #size-cells at top-level\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Removed CPU properties setup by u-boot to match other .dts\n* Added localbus node, but no chipselect details at this point\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors)\n and moved PCI device IRQs down to virtual bridge level\n* Moved mdio nodes up one level instead of under tsec nodes\n* Updated ethernet \u0027model\u0027 to \u0027eTSEC\u0027 as that\u0027s what on MPC8544\n* Dropping \"fsl,mpc8544-IP...\" from compatibles for standard blocks\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "2e8685a491c1063a4126598b10ecb78d1d20f537", "tree": "2fbdb0c57360ca7864daa32febbf4cc7b4023489", "parents": [ "56525200009d79a1a2449015276dcb10b4ecbae6" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 03 16:16:07 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:36 2011 -0600" }, "message": "powerpc/85xx: Rework MPC8536DS device trees\n\nUtilize new split between board \u0026 SoC, and new SoC device trees split\ninto pre \u0026 post utilizing \u0027template\u0027 includes for SoC IP blocks.\n\nOther changes include:\n* Moved to specifying interrupt-parent for mpic at root\n* Moved to 4-cell mpic interrupt cells to support MPIC timers\n* Added localbus node, but no chipselect details at this point\n* Reworked PCIe nodes to allow supportin IRQs for controller (errors)\n* and moved\n PCI device IRQs down to virtual bridge level\n* Moved mdio nodes up one level instead of under tsec nodes\n* Added GPIO controller node to MPC8536 SoC template\n [ marked as MPC8572 compatiable to get errata handling that applies ]\n* Added missing cache-line-size \u0026 cache-size properties missing from\n L2-cache node\n* Added IP level IEEE 1588 / ptp timer node\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "56525200009d79a1a2449015276dcb10b4ecbae6", "tree": "2c364f5d295b21753b29caa5dfbc0a339356b25d", "parents": [ "ce638731136753a64b29d704118938ac992895ea" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Oct 20 02:18:53 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:36 2011 -0600" }, "message": "powerpc/85xx: create dts components to build up an SoC\n\nIntroduce some common components that we can utilize to build up the\nvarious PQ3/85xx device trees.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "ce638731136753a64b29d704118938ac992895ea", "tree": "385b167c20c2ab83dca4370e4f00d19f1d7c5888", "parents": [ "a45edbf9dc8cd7c7bfe2876b0efc2aee7bd6eb59" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 19 10:59:21 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:35 2011 -0600" }, "message": "powerpc/85xx: p1020si.dtsi update interrupt handling\n\n* set interrupt-parent at root so its not duplicate in every node\n* Add mpic timers\n* Move to 4-prop cells for mpic timer\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "a45edbf9dc8cd7c7bfe2876b0efc2aee7bd6eb59", "tree": "db84af1ab80cc7236f113ea9c6450f365ded62a5", "parents": [ "43cfddc3d9989caf53617236d57ee475da5ea81b" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 19 23:44:06 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:35 2011 -0600" }, "message": "powerpc/85xx: Add ethernet magic packet property to P1020 device tree\n\nAll eTSEC2 controllers support waking on magic packet so fixup device\ntree to report that.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "43cfddc3d9989caf53617236d57ee475da5ea81b", "tree": "5deede418a641f56630af55c687b29efb63385e8", "parents": [ "38b8f1687f732e0d54340429acd5751b8c679690" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 19 23:36:14 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:35 2011 -0600" }, "message": "powerpc/85xx: Update P1020 SEC3.3 node to match actual SoC HW\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "38b8f1687f732e0d54340429acd5751b8c679690", "tree": "dcbf4c467badd282b1317bc97f2c287d5a702038", "parents": [ "fc2478e728b252c33d9655b234584a24c524d7e3" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 19 23:16:01 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:35 2011 -0600" }, "message": "powerpc/85xx: Update SPI binding to match binding spec for P1020RDB\n\nThe SPI node is out of date with regards to the binding for fsl-espi and\ndriver support.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "fc2478e728b252c33d9655b234584a24c524d7e3", "tree": "8c6910029caa4705d7e6451bb47baa8258e3f13a", "parents": [ "1e6a9d04c2d707088f8813d6bccfd97ae9b48fd9" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 19 10:58:05 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:35 2011 -0600" }, "message": "powerpc/85xx: Rework PCI nodes on P1020RDB\n\n* Move SoC specific details like irq mapping to SoC dtsi\n* Update interrupt property to cover both error interrupt and PCIe\n runtime interrupts\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "1e6a9d04c2d707088f8813d6bccfd97ae9b48fd9", "tree": "cfedbca1ee50465139ebccc06621d27c58bcbb14", "parents": [ "077200cb5a82eff2393c0af60d0690052a862b5e" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Oct 19 10:53:44 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 24 02:01:35 2011 -0600" }, "message": "powerpc/85xx: Simplify P1020RDB CAMP dts using includes\n\nIf we include the p1020rdb.dts instead of p1020si.dts we greatly reduce\nduplication and maintenance. We can just list which devices are\ndisabled for the given core and mpic protected sources.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "c3c3ced77fd1949af753be7731bfdadae88a226b", "tree": "df760d78a12c91e7352088d79d1365ce2fa19e81", "parents": [ "caca6a03d365883564885f2c1da3e88dcf65d139" ], "author": { "name": "Roy Zang", "email": "tie-fei.zang@freescale.com", "time": "Mon Nov 07 16:32:58 2011 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed Nov 23 22:55:47 2011 -0600" }, "message": "powerpc/p1023: set IRQ[4:6,11] to active-high level sensitive for PCIe\n\nP1023 external IRQ[4:6, 11] are not pin out, but the interrupts are\nutilized by the PCIe controllers. As they are not exposed as pins we\nneed to set them as active-high (internal to the SoC these interrupts\nare pulled down).\n\nIRQs[0:3,7:10] are pulled up on the board so we have them set as\nactive-low.\n\nSigned-off-by: Roy Zang \u003ctie-fei.zang@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "f81f5e14de1203b9389aad383aa3f7b2a221efdd", "tree": "5f5b17f22eb6f1a3be65d16ff2b9f68b9a9e745f", "parents": [ "9fce85f7ff94f1a877c15ad3d6ffbaed4b5cd1a6", "6ecc07b966977bb0855db1fa52d233c39fb3cafb" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Nov 08 14:53:55 2011 +1100" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Nov 08 14:53:55 2011 +1100" }, "message": "Merge remote-tracking branch \u0027agust/next\u0027 into merge\n" }, { "commit": "1197ab2942f920f261952de0c392ac749a35796b", "tree": "4922ccc8a6061e5ece6ac7420001f3bf4524ea92", "parents": [ "ec773e99ab4abce07b1ae23117179c2861831964", "96cc017c5b7ec095ef047d3c1952b6b6bbf98943" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Nov 06 17:12:03 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Nov 06 17:12:03 2011 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (106 commits)\n powerpc/p3060qds: Add support for P3060QDS board\n powerpc/83xx: Add shutdown request support to MCU handling on MPC8349 MITX\n powerpc/85xx: Make kexec to interate over online cpus\n powerpc/fsl_booke: Fix comment in head_fsl_booke.S\n powerpc/85xx: issue 15 EOI after core reset for FSL CoreNet devices\n powerpc/8xxx: Fix interrupt handling in MPC8xxx GPIO driver\n powerpc/85xx: Add \u0027fsl,pq3-gpio\u0027 compatiable for GPIO driver\n powerpc/86xx: Correct Gianfar support for GE boards\n powerpc/cpm: Clear muram before it is in use.\n drivers/virt: add ioctl for 32-bit compat on 64-bit to fsl-hv-manager\n powerpc/fsl_msi: add support for \"msi-address-64\" property\n powerpc/85xx: Setup secondary cores PIR with hard SMP id\n powerpc/fsl-booke: Fix settlbcam for 64-bit\n powerpc/85xx: Adding DCSR node to dtsi device trees\n powerpc/85xx: clean up FPGA device tree nodes for Freecsale QorIQ boards\n powerpc/85xx: fix PHYS_64BIT selection for P1022DS\n powerpc/fsl-booke: Fix setup_initial_memory_limit to not blindly map\n powerpc: respect mem\u003d setting for early memory limit setup\n powerpc: Update corenet64_smp_defconfig\n powerpc: Update mpc85xx/corenet 32-bit defconfigs\n ...\n\nFix up trivial conflicts in:\n - arch/powerpc/configs/40x/hcu4_defconfig\n\tremoved stale file, edited elsewhere\n - arch/powerpc/include/asm/udbg.h, arch/powerpc/kernel/udbg.c:\n\tadded opal and gelic drivers vs added ePAPR driver\n - drivers/tty/serial/8250.c\n\tmoved UPIO_TSI to powerpc vs removed UPIO_DWAPB support\n" }, { "commit": "96cc017c5b7ec095ef047d3c1952b6b6bbf98943", "tree": "74f124225552f072152c54ed0241038818b422ee", "parents": [ "6ca6ca5d813845533bcaaaeb2ca59d0805a028ca" ], "author": { "name": "Shengzhou Liu", "email": "Shengzhou.Liu@freescale.com", "time": "Fri Aug 26 11:18:21 2011 +0800" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 03 13:20:47 2011 -0500" }, "message": "powerpc/p3060qds: Add support for P3060QDS board\n\nThe P3060QDS is a Freescale reference board that hosts the six-core P3060 SOC.\nThe P3060 Processor combines six e500mc Power Architecture processor cores with\nhigh-performance datapath acceleration architecture(DPAA), CoreNet fabric\ninfrastructure, as well as network and peripheral interfaces.\n\nP3060QDS Board Overview:\nMemory subsystem:\n - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)\n - 128M Bytes NOR flash single-chip memory\n - 16M Bytes SPI flash\n - 8K Bytes AT24C64 I2C EEPROM\nEthernet:\n - 4x1G + 4x1G/2.5G Ethernet controllers\n - 2xRGMII + 1xMII, three VSC8641 PHYs on board\n - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3\nPCIe: Two PCI Express 2.0 controllers/ports\nUSB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board\nI2C: Four I2C controllers\nUART: Supports up to four UARTs\nRapidIO: Supports two serial RapidIO ports\n\nSigned-off-by: Shengzhou Liu \u003cShengzhou.Liu@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "62f3de91e4cfb113bf114009c6660a7f04901288", "tree": "d648fc7abc5b1c7e2f8b5dd7d1f69c437a33d449", "parents": [ "1661e5bd550bf024b04dfa7abf2963d04ab119e3" ], "author": { "name": "Martyn Welch", "email": "martyn.welch@ge.com", "time": "Thu Nov 03 17:37:47 2011 +0000" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Nov 03 12:57:20 2011 -0500" }, "message": "powerpc/86xx: Correct Gianfar support for GE boards\n\nThe GE DTBs were not updated when the Gianfar driver was converted to an\nof_platform_driver in commit b31a1d8b41513b96e9c7ec2f68c5734cef0b26a4. Update\nthe DTBs, adding the required TBI entries.\n\nSigned-off-by: Martyn Welch \u003cmartyn.welch@ge.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "b9df02231930c01eaaf3c37b192bd75ea0d1c0bb", "tree": "6c92b1f1872311e3ae35d4e6366a6032035ae587", "parents": [ "499ccb27a89ecd08475f73710fe27fb600431a91" ], "author": { "name": "Stephen George", "email": "stephen.george@freescale.com", "time": "Fri Sep 16 10:36:34 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Tue Oct 11 23:47:29 2011 -0500" }, "message": "powerpc/85xx: Adding DCSR node to dtsi device trees\n\nAdding new device tree binding file for the DCSR node. Modifying device\ntree dtsi files to add DCSR node for P2041, P3041, P4080, \u0026 P5020.\n\nSigned-off-by: Stephen George \u003cstephen.george@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "499ccb27a89ecd08475f73710fe27fb600431a91", "tree": "149197238505f04e7291ef190295af7b70a0c1a0", "parents": [ "878e3cb5f7763f388a1fa7d2a33b66601f75b43e" ], "author": { "name": "Timur Tabi", "email": "timur@freescale.com", "time": "Thu Sep 15 13:04:13 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Tue Oct 11 23:47:24 2011 -0500" }, "message": "powerpc/85xx: clean up FPGA device tree nodes for Freecsale QorIQ boards\n\nStandarize and document the FPGA nodes used on Freescale QorIQ reference\nboards. There are different kinds of FPGAs used on the boards, but\nonly two are currently standard: \"pixis\", \"ngpixis\", and \"qixis\". Although\nthere are minor differences among the boards that have one kind of FPGA, most\nof the functionality is the same, so it makes sense to create common\ncompatibility strings.\n\nWe also need to update the P1022DS platform file, because the compatible\nstring for its PIXIS node has changed. This means that older kernels are\nnot compatible with newer device trees. This is not a real problem, however,\nsince that particular function doesn\u0027t work anyway. When the DIU is active,\nthe PIXIS is in \"indirect mode\", and so cannot be accessed as a memory-mapped\ndevice.\n\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" } ], "next": "2a05e333c2cee711c828d79300010b721c81574f" }