)]}' { "log": [ { "commit": "67384fe3fd450536342330f684ea1f7dcaef8130", "tree": "98dc7f8e8c8e2905aa15a8bd8708471a2a4d1849", "parents": [ "cb05d8dedefa3066bf5d74ef88c6ca6cf4bd1c87" ], "author": { "name": "Eugeni Dodonov", "email": "eugeni.dodonov@intel.com", "time": "Wed Jun 06 11:59:06 2012 -0300" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Wed Jun 06 17:05:29 2012 +0200" }, "message": "char/agp: add another Ironlake host bridge\n\nThis seems to come on Gigabyte H55M-S2V and was discovered through the\nhttps://bugs.freedesktop.org/show_bug.cgi?id\u003d50381 debugging.\n\nBugzilla: https://bugs.freedesktop.org/show_bug.cgi?id\u003d50381\nSigned-off-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nCc: stable@vger.kernel.org\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "c14f52860e9e8a6e6db65b7d10dfea7c8f82aa1e", "tree": "f1aa07ef70a174901ae76a51f1ee1b4e514faef0", "parents": [ "72662e103c7dd305725dcf4aabcbd8f69483dfbc" ], "author": { "name": "Eugeni Dodonov", "email": "eugeni.dodonov@intel.com", "time": "Wed May 09 15:37:32 2012 -0300" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sat May 19 22:39:52 2012 +0200" }, "message": "drm/i915: hook Haswell devices in place\n\nThis patch enables i915 driver to handle Haswell devices. It should go in\nlast, when things are working stable enough.\n\nSigned-off-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "ae85226ebe474c9ecfc257191edca184b70ffbc2", "tree": "c368d5ed14e2d30058d3f30ec2c0c19cad7a6858", "parents": [ "971ca4717830c03a50e1ad9993c85601a0496de7" ], "author": { "name": "Santosh Nayak", "email": "santoshprasadnayak@gmail.com", "time": "Thu Apr 05 11:31:44 2012 +0530" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Apr 12 17:56:21 2012 +0100" }, "message": "agp: Use u32 __iomem annotation to silence sparse warning.\n\nReplace \"void *\" by \"u32 __iomem *\" to silence sparse warning.\n\nSigned-off-by: Santosh Nayak \u003csantoshprasadnayak@gmail.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "971ca4717830c03a50e1ad9993c85601a0496de7", "tree": "92eca136e7624d96772029c648800516ad0c548b", "parents": [ "effbc4fd8e37e41d6f2bb6bcc611c14b4fbdcf9b" ], "author": { "name": "Santosh Nayak", "email": "santoshprasadnayak@gmail.com", "time": "Thu Apr 05 11:31:08 2012 +0530" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Apr 12 17:56:17 2012 +0100" }, "message": "agp: Remove \u0027break\u0027 after \u0027return\u0027 statement.\n\n\u0027break\u0027 is unnecessary after \u0027return\u0027 statement.\nRemove all such \u0027break\u0027 as clean up.\n\nSigned-off-by: Santosh Nayak \u003csantoshprasadnayak@gmail.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "effbc4fd8e37e41d6f2bb6bcc611c14b4fbdcf9b", "tree": "8bc2a6a2116f1031b0033bf1a8f9fbe92201c5c1", "parents": [ "6a7068b4ef17dfb9de3191321f1adc91fa1659ca", "ec34a01de31128e5c08e5f05c47f4a787f45a33c" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Apr 12 10:27:01 2012 +0100" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Apr 12 10:27:01 2012 +0100" }, "message": "Merge branch \u0027drm-intel-next\u0027 of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next\n\nDaniel Vetter wrote\nFirst pull request for 3.5-next, slightly large than usual because new\nthings kept coming in since the last pull for 3.4.\nHighlights:\n- first batch of hw enablement for vlv (Jesse et al) and hsw (Eugeni). pci\n ids are not yet added, and there\u0027s still quite a few patches to merge\n (mostly modesetting). To make QA easier I\u0027ve decided to merge this stuff\n in pieces.\n- loads of cleanups and prep patches spurred by the above. Especially vlv\n is a real frankenstein chip, but also hsw is stretching our driver\u0027s\n code design. Expect more to come in this area for 3.5.\n- more gmbus fixes, cleanups and improvements by Daniel Kurtz. Again,\n there are more patches needed (and some already queued up), but I wanted\n to split this a bit for better testing.\n- pwrite/pread rework and retuning. This series has been in the works for\n a few months already and a lot of i-g-t tests have been created for it.\n Now it\u0027s finally ready to be merged. Note that one patch in this series\n touches include/pagemap.h, that patch is acked-by akpm.\n- reduce mappable pressure and relocation throughput improvements from\n Chris.\n- mmap offset exhaustion mitigation by Chris Wilson.\n- a start at figuring out which codepaths in our messy dri1/ums+gem/kms\n driver we actually need to support by bailing out of unsupported case.\n The driver now refuses to load without kms on gen6+ and disallows a few\n ioctls that userspace never used in certain cases. More of this will\n definitely come.\n- More decoupling of global gtt and ppgtt.\n- Improved dual-link lvds detection by Takashi Iwai.\n- Shut up the compiler + plus fix the fallout (Ben)\n- Inverted panel brightness handling (mostly Acer manages to break things\n in this way).\n- Small fixlets and adjustements and some minor things to help debugging.\n\nRegression-wise QA reported quite a few issues on ivb, but all of them\nturned out to be hw stability issues which are already fixed in\ndrm-intel-fixes (QA runs the nightly regression tests on -next alone,\nwithout -fixes automatically merged in). There\u0027s still one issue open on\nsnb, it looks like occlusion query writes are not quite as cache coherent\nas we\u0027ve expected. With some of the pwrite adjustements we can now\nreliably hit this. Kernel workaround for it is in the works.\"\n\n* \u0027drm-intel-next\u0027 of git://people.freedesktop.org/~danvet/drm-intel: (101 commits)\n drm/i915: VCS is not the last ring\n drm/i915: Add a dual link lvds quirk for MacBook Pro 8,2\n drm/i915: make quirks more verbose\n drm/i915: dump the DMA fetch addr register on pre-gen6\n drm/i915/sdvo: Include YRPB as an additional TV output type\n drm/i915: disallow gem init ioctl on ilk\n drm/i915: refuse to load on gen6+ without kms\n drm/i915: extract gt interrupt handler\n drm/i915: use render gen to switch ring irq functions\n drm/i915: rip out old HWSTAM missed irq WA for vlv\n drm/i915: open code gen6+ ring irqs\n drm/i915: ring irq cleanups\n drm/i915: add SFUSE_STRAP registers for digital port detection\n drm/i915: add WM_LINETIME registers\n drm/i915: add WRPLL clocks\n drm/i915: add LCPLL control registers\n drm/i915: add SSC offsets for SBI access\n drm/i915: add port clock selection support for HSW\n drm/i915: add S PLL control\n drm/i915: add PIXCLK_GATE register\n ...\n\nConflicts:\n\tdrivers/char/agp/intel-agp.h\n\tdrivers/char/agp/intel-gtt.c\n\tdrivers/gpu/drm/i915/i915_debugfs.c\n" }, { "commit": "4cae9ae052fe630e63f28be6b0b115fbf52e63fb", "tree": "53ae8eee476b5e115bc15a324acd55d8cc84facf", "parents": [ "7e508a275b9425d612b845cac534e6b35a3f95e3" ], "author": { "name": "Eugeni Dodonov", "email": "eugeni.dodonov@intel.com", "time": "Thu Mar 29 12:32:18 2012 -0300" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Apr 09 18:03:58 2012 +0200" }, "message": "drm/i915: add Haswell devices and their PCI IDs\n\nThis adds product definitions for desktop, mobile and server boards.\n\nv2: split into a separate patch, add .has_pch_split feature.\n\nSigned-off-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "650dc07ec3b0eba8ff21da706d2b1876ada59fc3", "tree": "337809fc7c960a6c525f473d498c339aa7075ab3", "parents": [ "cc22a938fc1db0c8ef5e693a69b159c4b851dab3" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Apr 02 10:08:35 2012 +0200" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Apr 02 15:59:07 2012 +0200" }, "message": "drm/i915: disable ppgtt on snb when dmar is enabled\n\nTotally unexpected that this regressed. Luckily it sounds like we just\nneed to have dmar disable on the igfx, not the entire system. At least\nthat\u0027s what a few days of testing between Tony Vroon and me indicates.\n\nReported-by: Tony Vroon \u003ctony@linx.net\u003e\nCc: Tony Vroon \u003ctony@linx.net\u003e\nBugzilla: https://bugzilla.kernel.org/show_bug.cgi?id\u003d43024\nAcked-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nSigned-Off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "cc22a938fc1db0c8ef5e693a69b159c4b851dab3", "tree": "9d2e52caed1d848c267dcb33997b6fc8e6b3f739", "parents": [ "e77166b5a653728f312d07e60a80819d1c54fca4" ], "author": { "name": "Eugeni Dodonov", "email": "eugeni.dodonov@intel.com", "time": "Thu Mar 29 20:55:48 2012 -0300" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Mon Apr 02 15:58:47 2012 +0200" }, "message": "drm/i915: add Ivy Bridge GT2 Server entries\n\nThis adds PCI ID for IVB GT2 server variant which we were missing.\n\nSigned-off-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\n[danvet: fix up conflict because the patch has been diffed against next. tsk.]\nSigned-Off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "64757876215fcc515403639fa0bd19e8da7ab06b", "tree": "d0d9c58d6ea73a50181b62f431a1e517a7816643", "parents": [ "4b60d29ee00cb2114075e8b5c2c23928bbd76c28" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Mar 28 13:39:34 2012 -0700" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Mar 29 00:07:38 2012 +0200" }, "message": "agp/intel: add ValleyView AGP driver\n\n... and bind it right to the PCI id.\n\nNote that there are still a few things to fix here:\n- we need to move the tlb flush to a better place in drm/i915.\n- we need to check snoop support on vlv and implement it.\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n[danvet: squash follow-on patch and add todo items to commit msg.]\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "4b60d29ee00cb2114075e8b5c2c23928bbd76c28", "tree": "67d587028223587f89ab78f5f098a033d4cf482c", "parents": [ "90b107c8f7ea75ef55db4e0515dda86b245f8978" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Mar 28 13:39:33 2012 -0700" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Mar 29 00:02:25 2012 +0200" }, "message": "agp/intel: map more registers for use by the GTT code\n\nWe need to flush the Gunit TLB when we update GTT PTEs on VLV, but the\nregister for doing so is above the range we normally map. Map the whole\nregister space to make sure we can get it.\n\nv2: only map the larger space on gen7+ (Daniel)\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "9edd576d89a5b6d3e136d7dcab654d887c0d25b7", "tree": "d19670de2256f8187321de3a41fa4a10d3c8e402", "parents": [ "e21af88d39796c907c38648c824be3d646ffbe35", "28a4d5675857f6386930a324317281cb8ed1e5d0" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Feb 10 16:52:55 2012 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Feb 10 17:14:49 2012 +0100" }, "message": "Merge remote-tracking branch \u0027airlied/drm-fixes\u0027 into drm-intel-next-queued\n\nBack-merge from drm-fixes into drm-intel-next to sort out two things:\n\n- interlaced support: -fixes contains a bugfix to correctly clear\n interlaced configuration bits in case the bios sets up an interlaced\n mode and we want to set up the progressive mode (current kernels\n don\u0027t support interlaced). The actual feature work to support\n interlaced depends upon (and conflicts with) this bugfix.\n\n- forcewake voodoo to workaround missed IRQ issues: -fixes only enabled\n this for ivybridge, but some recent bug reports indicate that we\n need this on Sandybridge, too. But in a slightly different flavour\n and with other fixes and reworks on top. Additionally there are some\n forcewake cleanup patches heading to -next that would conflict with\n currrent -fixes.\n\nSigned-Off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "428ccb21b740f603a6a1f08cbe6d935fb3177620", "tree": "397bab4ab8906e62430be6b3c02c75e9ff6bec90", "parents": [ "50a4c4a94d24fe13167e3ab1dc1486623369c31a" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 09 17:15:45 2012 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 09 21:24:18 2012 +0100" }, "message": "agp/intel-gtt: export the gtt pagetable iomapping\n\nWe need this because ppgtt page directory entries need to be in the\nglobal gtt pagetable.\n\nReviewed-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\nTested-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nTested-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nReviewed-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nSigned-Off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "50a4c4a94d24fe13167e3ab1dc1486623369c31a", "tree": "6499c1453002d9b61dd5ab9d9d33ab2cb648111f", "parents": [ "7e3b8737e719c4de7dd79b096b80ece444b2f0ba" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 09 17:15:44 2012 +0100" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Feb 09 21:23:18 2012 +0100" }, "message": "agp/intel-gtt: export the scratch page dma address\n\nTo implement a PPGTT for drm/i915 that fully aliases the GTT, we also\nneed to properly alias the scratch page.\n\nReviewed-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\nTested-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nTested-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nReviewed-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nSigned-Off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "590dfe2f3bbbbeee806ee91bef68ba2a6afc16d2", "tree": "133e0085397d104d5a4bad8cd8afed3df6f17138", "parents": [ "c8fe74ae9a7285767cda1a053cfe806d67f77227" ], "author": { "name": "Michal Kubecek", "email": "mkubecek@suse.cz", "time": "Wed Jan 25 16:51:05 2012 +0100" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Jan 26 18:36:48 2012 +0000" }, "message": "agp: fix scratch page cleanup\n\nIn error cleanup of agp_backend_initialize() and in agp_backend_cleanup(),\nagp_destroy_page() is passed virtual address of the scratch page. This\nleads to a kernel warning if the initialization fails (or upon regular\ncleanup) as pointer to struct page should be passed instead.\n\nSigned-off-by: Michal Kubecek \u003cmkubecek@suse.cz\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "6b2d590540d219064a53638f485b75203131dfce", "tree": "e20c3b38cde1674a50db08bca8ab965b779b0404", "parents": [ "5a117db77e47e3946d1aaa7ce8deafafd9d76746" ], "author": { "name": "Ben Widawsky", "email": "ben@bwidawsk.net", "time": "Wed Jan 04 14:04:33 2012 -0800" }, "committer": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Tue Jan 17 11:06:09 2012 +0100" }, "message": "agp/intel: Add pci id for hostbridge from has/qemu\n\nThis is needed to run the simulator.\n\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\n[danvet: added a comment in case people wonder what it\u0027s for.]\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n" }, { "commit": "90ab5ee94171b3e28de6bb42ee30b527014e0be7", "tree": "fcf89889f6e881f2b231d3d20287c08174ce4b54", "parents": [ "476bc0015bf09dad39d36a8b19f76f0c181d1ec9" ], "author": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Fri Jan 13 09:32:20 2012 +1030" }, "committer": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Fri Jan 13 09:32:20 2012 +1030" }, "message": "module_param: make bool parameters really bool (drivers \u0026 misc)\n\nmodule_param(bool) used to counter-intuitively take an int. In\nfddd5201 (mid-2009) we allowed bool or int/unsigned int using a messy\ntrick.\n\nIt\u0027s time to remove the int/unsigned int option. For this version\nit\u0027ll simply give a warning, but it\u0027ll break next kernel version.\n\nAcked-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\n" }, { "commit": "e11d0b87cde80745afe4712a19cd37bca9924a5b", "tree": "e1f39d515c45546d2c65088735fce529ce3d9cd1", "parents": [ "2c05114d23c4fd2256eaf5645528c19fcefdb2c8" ], "author": { "name": "Tormod Volden", "email": "debian.tormod@gmail.com", "time": "Fri Jan 06 00:16:26 2012 +0100" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Jan 06 09:32:02 2012 +0000" }, "message": "agp: Fix multi-line warning message whitespace\n\nSigned-off-by: Tormod Volden \u003cdebian.tormod@gmail.com\u003e\nReviewed-by: Corbin Simpson \u003cMostAwesomeDude@gmail.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "a08185a3eb658854b29c05bcbfac0f85038ffe9f", "tree": "9411bc4cd2dc3dd5e4f29654b7b32669fe1434bb", "parents": [ "35b09c9bf619c4fc6040c52dcea6bd5bd6af7679" ], "author": { "name": "Keith Packard", "email": "keithp@keithp.com", "time": "Fri Oct 28 10:28:00 2011 -0700" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Nov 08 10:50:27 2011 +0000" }, "message": "agp: iommu_gfx_mapped only available if CONFIG_INTEL_IOMMU is set\n\nKernels with no iommu support cannot ever need the Ironlake\nwork-around, so never enable it in that case.\n\nMight be better to completely remove the work-around from the kernel\nin this case?\n\nSigned-off-by: Keith Packard \u003ckeithp@keithp.com\u003e\nReviewed-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\n" }, { "commit": "35b09c9bf619c4fc6040c52dcea6bd5bd6af7679", "tree": "27e9ec49a947d0a267c716a732eae58ac2b856ee", "parents": [ "1ea6b8f48918282bdca0b32a34095504ee65bab5" ], "author": { "name": "Dan Carpenter", "email": "dan.carpenter@oracle.com", "time": "Fri Oct 28 14:42:41 2011 +0300" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Nov 08 10:50:18 2011 +0000" }, "message": "drm/i915: fix if statement (bogus semi-colon)\n\nThe semi-colon is a typo here and it makes the if statement\nunconditional.\n\nSigned-off-by: Dan Carpenter \u003cdan.carpenter@oracle.com\u003e\nSigned-off-by: Keith Packard \u003ckeithp@keithp.com\u003e\n" }, { "commit": "f7e801172c53c4dc48b1f888a72eae069be6333a", "tree": "61d5243a48fe3640dbace0222054fc88dd0c6612", "parents": [ "092f4c56c1927e4b61a41ee8055005f1cb437009", "6b1c70b1ff6f800f081a6bbef662789135f7b398" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Nov 02 16:52:17 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Nov 02 16:52:17 2011 -0700" }, "message": "Merge branch \u0027misc-3.2\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux\n\n* \u0027misc-3.2\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux:\n MAINTAINERS: Update entry for IA64\n [IA64] gpio: GENERIC_GPIO default must be n\n [IA64[ add CONFIG_NET_VENDOR_INTEL\u003dy to default config files where needed\n [IA64] agp/hp-agp: Allow binding user memory to the AGP GART\n [IA64] sn2: add missing put_cpu()\n" }, { "commit": "37be944a0270402f9cda291a930b0286f6dc92f5", "tree": "6a91a9eb86450f4a18a8871f04a1ef810e7b55d6", "parents": [ "ca836a25435ef1b9914840ed0a310c9b6ac261d1", "1717c0e23f411147490c7a3312b894f0ea9a5fb1" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 28 05:54:23 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 28 05:54:23 2011 -0700" }, "message": "Merge branch \u0027drm-core-next\u0027 of git://people.freedesktop.org/~airlied/linux\n\n* \u0027drm-core-next\u0027 of git://people.freedesktop.org/~airlied/linux: (290 commits)\n Revert \"drm/ttm: add a way to bo_wait for either the last read or last write\"\n Revert \"drm/radeon/kms: add a new gem_wait ioctl with read/write flags\"\n vmwgfx: Don\u0027t pass unused arguments to do_dirty functions\n vmwgfx: Emulate depth 32 framebuffers\n drm/radeon: Lower the severity of the radeon lockup messages.\n drm/i915/dp: Fix eDP on PCH DP on CPT/PPT\n drm/i915/dp: Introduce is_cpu_edp()\n drm/i915: use correct SPD type value\n drm/i915: fix ILK+ infoframe support\n drm/i915: add DP test request handling\n drm/i915: read full receiver capability field during DP hot plug\n drm/i915/dp: Remove eDP special cases from bandwidth checks\n drm/i915/dp: Fix the math in intel_dp_link_required\n drm/i915/panel: Always record the backlight level again (but cleverly)\n i915: Move i915_read/write out of line\n drm/i915: remove transcoder PLL mashing from mode_set per specs\n drm/i915: if transcoder disable fails, say which\n drm/i915: set watermarks for third pipe on IVB\n drm/i915: export a CPT mode set verification function\n drm/i915: fix transcoder PLL select masking\n ...\n" }, { "commit": "982653009b883ef1529089e3e6f1ae2fee41cbe2", "tree": "eec3b1fe947d442ee204a2d648133bc5223e5c59", "parents": [ "37d96c28ecf0af1215bb6bbf580dbb1fabb5a6ec", "c020570138f5d9cb1fc0a853f9cf9e641178b5c5" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 26 16:11:53 2011 +0200" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Oct 26 16:11:53 2011 +0200" }, "message": "Merge branch \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\n* \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:\n x86, ioapic: Consolidate the explicit EOI code\n x86, ioapic: Restore the mask bit correctly in eoi_ioapic_irq()\n x86, kdump, ioapic: Reset remote-IRR in clear_IO_APIC\n iommu: Rename the DMAR and INTR_REMAP config options\n x86, ioapic: Define irq_remap_modify_chip_defaults()\n x86, msi, intr-remap: Use the ioapic set affinity routine\n iommu: Cleanup ifdefs in detect_intel_iommu()\n iommu: No need to set dmar_disabled in check_zero_address()\n iommu: Move IOMMU specific code to intel-iommu.c\n intr_remap: Call dmar_dev_scope_init() explicitly\n x86, x2apic: Enable the bios request for x2apic optout\n" }, { "commit": "5c0422878fcdc279ae9a8e8b66972a15b5efb67f", "tree": "13ed982427828e6a031dd5fd642f25b15c300d63", "parents": [ "f372b85463dac2fc696443d4c5063db2af5dcead" ], "author": { "name": "Ben Widawsky", "email": "ben@bwidawsk.net", "time": "Mon Oct 17 15:51:55 2011 -0700" }, "committer": { "name": "Keith Packard", "email": "keithp@keithp.com", "time": "Thu Oct 20 15:26:39 2011 -0700" }, "message": "drm/i915: ILK + VT-d workaround\n\nIdle the GPU before doing any unmaps. We know if VT-d is in use through\nan exported variable from iommu code.\n\nThis should avoid a known HW issue.\n\nSigned-off-by: Ben Widawsky \u003cben@bwidawsk.net\u003e\nReviewed-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Keith Packard \u003ckeithp@keithp.com\u003e\n" }, { "commit": "d3f138106b4b40640dc667f0222fd9f137387b32", "tree": "2c5d51deff32ec0999493bbb73cb18a7e4a455c3", "parents": [ "c39d77ffa28c6e72702193df4fa53928c1b6f3e6" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Tue Aug 23 17:05:25 2011 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Sep 21 10:22:03 2011 +0200" }, "message": "iommu: Rename the DMAR and INTR_REMAP config options\n\nChange the CONFIG_DMAR to CONFIG_INTEL_IOMMU to be consistent\nwith the other IOMMU options.\n\nRename the CONFIG_INTR_REMAP to CONFIG_IRQ_REMAP to match the\nirq subsystem name.\n\nAnd define the CONFIG_DMAR_TABLE for the common ACPI DMAR\nroutines shared by both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: yinghai@kernel.org\nCc: youquan.song@intel.com\nCc: joerg.roedel@amd.com\nCc: tony.luck@intel.com\nCc: dwmw2@infradead.org\nLink: http://lkml.kernel.org/r/20110824001456.558630224@sbsiddha-desk.sc.intel.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "8e03bd6525d3281068519d5f6059cdcc5a67af66", "tree": "12e4cecbdef7eb38c8ff4406774008509a70fc47", "parents": [ "57f3224c3f838844cdae5e4a9d63e03152013f9a" ], "author": { "name": "Joe Perches", "email": "joe@perches.com", "time": "Sat May 28 10:36:25 2011 -0700" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Thu Sep 15 13:55:03 2011 +0200" }, "message": "char: Convert vmalloc/memset to vzalloc\n\nSigned-off-by: Joe Perches \u003cjoe@perches.com\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "fc000154d7a63dee209aab1c13f2c19abdcf6b59", "tree": "1f76e42f6289fadb195e898eefec96d98017f329", "parents": [ "d5d4e02874537d65ed2f431d39bf2f6d2967bd1b" ], "author": { "name": "Émeric Maschino", "email": "emeric.maschino@gmail.com", "time": "Tue Aug 23 21:48:23 2011 +0200" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Aug 23 13:31:59 2011 -0700" }, "message": "[IA64] agp/hp-agp: Allow binding user memory to the AGP GART\n\ndmesg reports:\n[   29.365973] [TTM] AGP Bind memory failed.\n[   29.366015] radeon 0000:80:00.0: object_init failed for (4096, 0x00000002)\n[   29.366052] radeon 0000:80:00.0: (-22) create WB bo failed\n[   29.366087] radeon 0000:80:00.0: Disabling GPU acceleration\n[   29.366124] [drm] radeon: cp finalized\n[   29.366168] [drm] radeon: cp finalized\n[   29.366210] [TTM] Finalizing pool allocator.\n[   29.366924] [TTM] Zone  kernel: Used memory at exit: 0 kiB.\n[   29.366961] [TTM] Zone   dma32: Used memory at exit: 0 kiB.\n[   29.366996] [drm] radeon: ttm finalized\n[   29.367030] [drm] Forcing AGP to PCI mode\n\nThis patch allows binding user memory to the AGP GART on zx1-based\nsystems. dmesg thus no more complains about AGP bind memory failure,\ndisabled GPU acceleration or AGP mode forced to PCI.\n\nOriginal work from Francisco Jerez in agp/amd-k7\n(https://lkml.org/lkml/2010/10/15/469).\n\nTested-by: Émeric Maschino \u003cemeric.maschino@gmail.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "780d7cc44524cd396a34757127f51ecb8ccaf2da", "tree": "96675e90d59903523b282874ca77ce44aa585b50", "parents": [ "4171424e66e5525d7128a2c355215ca5c66f76d5" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Jul 12 23:38:18 2011 +0100" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Wed Jul 13 07:44:27 2011 +0100" }, "message": "agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2M\n\nKonstantin Belousov found an error in the define of G4x_GMCH_SIZE_VT_2M\nrelative to the GMCH specs, and confirmed that indeed one of his users\nwith a Q45 reports 0xb not 0xc for a 2/2MiB GATT.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: Konstantin Belousov \u003ckostikbel@gmail.com\u003e\nCc: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nAcked-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "5613beb46d54da6ef7f1c4589e9f2e60eeb10721", "tree": "caba4c382e8bb839fc527ff477836ef6aef7998f", "parents": [ "2307790f0c8dea7d8052805a8209fbd67e815e72" ], "author": { "name": "Michel Dänzer", "email": "daenzer@vmware.com", "time": "Thu May 19 16:08:39 2011 +0200" }, "committer": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Sun May 22 20:23:09 2011 +1000" }, "message": "agp/uninorth: Fix lockups with radeon KMS and \u003e1x.\n\nThis was based on a description by Ben Herrenschmidt:\n\n\u003e I\u0027ve removed that SBA reset from the normal TLB invalidation path and\n\u003e left it only once after turning AGP on.\n\nAbout six months ago, he said:\n\n\u003e I did it a bit differently, but yeah, you get the idea. I\u0027m doing a\n\u003e patch series so don\u0027t bother pushing things too hard yet.\n\nBut I haven\u0027t seen anything from him about this since then, and people are\nregularly hitting these lockups, so here we are...\n\nSigned-off-by: Michel Dänzer \u003cdaenzer@vmware.com\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Dave Airlie \u003cairlied@gmail.com\u003e\n" }, { "commit": "246d08b8f94a5545077611ab5bfb9d47014ede75", "tree": "792b6499bb3ca464ad15d638ccefefa4f4bff5d6", "parents": [ "65d3eb1e065c5e558a584fabe583daa5fdd63b75" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Feb 17 11:50:19 2011 -0800" }, "committer": { "name": "Keith Packard", "email": "keithp@keithp.com", "time": "Fri May 13 17:11:13 2011 -0700" }, "message": "agp/intel: add Ivy Bridge support\n\nJust use the Sandy Bridge routines.\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nReviewed-by: Keith Packard \u003ckeithp@keithp.com\u003e\nSigned-off-by: Keith Packard \u003ckeithp@keithp.com\u003e\n" }, { "commit": "194b3da873fd334ef183806db751473512af29ce", "tree": "cb6ac3d05ba2e0a07c02ea1cef0e41477ea29d2b", "parents": [ "b522f02184b413955f3bc952e3776ce41edc6355" ], "author": { "name": "Vasiliy Kulikov", "email": "segoon@openwall.com", "time": "Thu Apr 14 20:55:16 2011 +0400" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Apr 21 12:16:55 2011 +1000" }, "message": "agp: fix arbitrary kernel memory writes\n\npg_start is copied from userspace on AGPIOC_BIND and AGPIOC_UNBIND ioctl\ncmds of agp_ioctl() and passed to agpioc_bind_wrap(). As said in the\ncomment, (pg_start + mem-\u003epage_count) may wrap in case of AGPIOC_BIND,\nand it is not checked at all in case of AGPIOC_UNBIND. As a result, user\nwith sufficient privileges (usually \"video\" group) may generate either\nlocal DoS or privilege escalation.\n\nSigned-off-by: Vasiliy Kulikov \u003csegoon@openwall.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "b522f02184b413955f3bc952e3776ce41edc6355", "tree": "3141d04c93d5342c06e54bbba389b646a005cb04", "parents": [ "204ae24dc71f794aaad4df48a0083dfedc711afb" ], "author": { "name": "Vasiliy Kulikov", "email": "segoon@openwall.com", "time": "Thu Apr 14 20:55:19 2011 +0400" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Apr 21 11:51:04 2011 +1000" }, "message": "agp: fix OOM and buffer overflow\n\npage_count is copied from userspace. agp_allocate_memory() tries to\ncheck whether this number is too big, but doesn\u0027t take into account the\nwrap case. Also agp_create_user_memory() doesn\u0027t check whether\nalloc_size is calculated from num_agp_pages variable without overflow.\nThis may lead to allocation of too small buffer with following buffer\noverflow.\n\nAnother problem in agp code is not addressed in the patch - kernel memory\nexhaustion (AGPIOC_RESERVE and AGPIOC_ALLOCATE ioctls). It is not checked\nwhether requested pid is a pid of the caller (no check in agpioc_reserve_wrap()).\nEach allocation is limited to 16KB, though, there is no per-process limit.\nThis might lead to OOM situation, which is not even solved in case of the\ncaller death by OOM killer - the memory is allocated for another (faked) process.\n\nSigned-off-by: Vasiliy Kulikov \u003csegoon@openwall.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "25985edcedea6396277003854657b5f3cb31a628", "tree": "f026e810210a2ee7290caeb737c23cb6472b7c38", "parents": [ "6aba74f2791287ec407e0f92487a725a25908067" ], "author": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Wed Mar 30 22:57:33 2011 -0300" }, "committer": { "name": "Lucas De Marchi", "email": "lucas.demarchi@profusion.mobi", "time": "Thu Mar 31 11:26:23 2011 -0300" }, "message": "Fix common misspellings\n\nFixes generated by \u0027codespell\u0027 and manually reviewed.\n\nSigned-off-by: Lucas De Marchi \u003clucas.demarchi@profusion.mobi\u003e\n" }, { "commit": "fbf92bea68830c12da9099d7c8a60812194efc4e", "tree": "110e2c2476ac98ae298b90881de1fd015ff33739", "parents": [ "ef3242859fae47e728b50b7ce3d17b201a71779a", "c2e0eb167070a6e9dcb49c84c13c79a30d672431" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Feb 24 12:19:43 2011 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Thu Feb 24 12:19:43 2011 +1000" }, "message": "Merge branch \u0027drm-intel-fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel into drm-fixes\n\n* \u0027drm-intel-fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:\n drm/i915: fix corruptions on i8xx due to relaxed fencing\n drm/i915: skip FDI \u0026 PCH enabling for DP_A\n agp/intel: Experiment with a 855GM GWB bit\n drm/i915: don\u0027t enable FDI \u0026 transcoder interrupts after all\n drm/i915: Ignore a hung GPU when flushing the framebuffer prior to a switch\n" }, { "commit": "49495d44dfa4ba76cf7d1ed8fe84746dd9552255", "tree": "bce82f11cf9630f7774e051d557596f96fac225c", "parents": [ "45e4039c3aea597ede44a264cea322908cdedfe9" ], "author": { "name": "Florian Mickler", "email": "florian@mickler.org", "time": "Mon Feb 07 23:29:31 2011 +0100" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Wed Feb 23 18:29:17 2011 +1000" }, "message": "amd64-agp: fix crash at second module load\n\nThe module forgot to sometimes unregister some resources.\n\nThis fixes Bug #22882.\n\n[Patch updated to 2.6.38-rc3 by Randy Dunlap.]\nTested-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nSigned-off-by: Florian Mickler \u003cflorian@mickler.org\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "bdb8b975fc66e081c3f39be6267701f8226d11aa", "tree": "e4ff3068ea0844121372a3f88fa4d1f1a48edc35", "parents": [ "a36dbec57e9a665d69cd2e1a673153ddb2d62785" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Dec 22 11:37:09 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Feb 22 15:52:41 2011 +0000" }, "message": "agp/intel: Experiment with a 855GM GWB bit\n\nBugzilla: https://bugs.freedesktop.org/show_bug.cgi?id\u003d27187\nTested-by: Thorsten Vollmer \u003cthorsten@thvo.de\u003e (DFI-ACP G5M150-N w/852GME)\nTested-by: Moritz Brunner \u003c2points@gmx.org\u003e (Asus M2400N/i855GM)\nTested-by: Indan Zupancic \u003cindan@nul.nu\u003e (Thinkpad X40/855GM rev 02)\nTested-by: Eric Anholt \u003ceric@anholt.net\u003e (865G)\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "a70b95c017e8b518e1e069853355e4e497453dbb", "tree": "c4264dc861b449f83fc40d9fb942083c5d985870", "parents": [ "cecd1455bc9cbd9568036f502ee8ded0a64354a7" ], "author": { "name": "Stephen Kitt", "email": "steve@sk2.org", "time": "Mon Jan 31 14:25:43 2011 -0800" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Feb 04 09:43:57 2011 +1000" }, "message": "agp: ensure GART has an address before enabling it\n\nSome BIOSs (eg. the AMI BIOS on the Asus P4P800 motherboard) don\u0027t\ninitialise the GART address, and pcibios_assign_resources() can ignore it\nbecause it can be marked as a host bridge (see\nhttps://bugzilla.kernel.org/show_bug.cgi?id\u003d24392#c5 for details). This\nwas handled correctly up to 2.6.35, but the pci_enable_device() cleanup in\n2.6.36 96576a9e1a0cdb8 (\"agp: intel-agp: do not use PCI resources before\npci_enable_device()\") means that the kernel tries to enable the GART\nbefore assigning it an address; in such cases the GART overlaps with other\ndevice assignments and ends up being disabled.\n\nThis patch fixes https://bugzilla.kernel.org/show_bug.cgi?id\u003d24392\n\nNote that I imagine efficeon-agp.c probably has the same problem, but\nI can\u0027t test that and I\u0027d like to make sure this patch is suitable for\n-stable (since 2.6.36 and 2.6.37 are affected).\n\nSigned-off-by: Stephen Kitt \u003csteve@sk2.org\u003e\nCc: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Maciej Rutecki \u003cmaciej.rutecki@gmail.com\u003e\nCc: \"Rafael J. Wysocki\" \u003crjw@sisk.pl\u003e\nCc: Kulikov Vasiliy \u003csegooon@gmail.com\u003e\nCc: Florian Mickler \u003cflorian@mickler.org\u003e\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "cecd1455bc9cbd9568036f502ee8ded0a64354a7", "tree": "213995f8c44b3cb854e95123297c5c3b381123ad", "parents": [ "4b863b3d3e9b11bb7588b88d13faed75f7711d09" ], "author": { "name": "Matt Turner", "email": "mattst88@gmail.com", "time": "Tue Feb 01 11:54:15 2011 -0500" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Feb 04 09:42:25 2011 +1000" }, "message": "Revert \"agp: AMD AGP is used on UP1100 \u0026 UP1500 alpha boxen\"\n\nThis reverts commit f191f144079b0083c6fa7d01a4acbd7263fb5032.\n\nThe AMD 751 and 761 chipsets are used on the UP1000, UP1100, and UP1500\nOEM motherboards, but they neglect to do anything to make AGP work.\n\nAccording to Ivan Kokshaysky:\nThere is quite fundamental conflict between the Alpha architecture and\nx86 AGP implementation - Alpha is entirely cache coherent by design,\nwhile x86 AGP is not (I mean native AGP DMA transactions, not a PCI over\nAGP). There are no such things as non-cacheable mappings or software\nsupport for cache flushing/invalidation on Alpha, so x86 AGP code won\u0027t\nwork on Nautilus.\n\nSo there\u0027s no point in allowing this driver to be configured on Alpha.\n\nSigned-off-by: Matt Turner \u003cmattst88@gmail.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "4b863b3d3e9b11bb7588b88d13faed75f7711d09", "tree": "c5bae6bda0f2b494cba416224018c5cf37b724f0", "parents": [ "18ff84da29b3f0c073e0ce6e341663cc6bcb0ab7" ], "author": { "name": "Matt Turner", "email": "mattst88@gmail.com", "time": "Tue Feb 01 11:54:16 2011 -0500" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Fri Feb 04 09:42:24 2011 +1000" }, "message": "amd-k7-agp: remove non-x86 code\n\namd-k7-agp can\u0027t be built on Alpha anymore, so remove now unnecessary\ncode.\n\nSigned-off-by: Matt Turner \u003cmattst88@gmail.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "bee4a186c16bed0d7e91425ca9356c2e8c015f8d", "tree": "66d01e18c48fb0dfd9970c169d0f5baa0adaa0fe", "parents": [ "934f992c763ae1e5eefcce8af769c16444085df7" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Jan 21 10:54:32 2011 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Jan 24 18:26:25 2011 +0000" }, "message": "drm/i915,agp/intel: Do not clear stolen entries\n\nWe can only utilize the stolen portion of the GTT if we are in sole\ncharge of the hardware. This is only true if using GEM and KMS,\notherwise VESA continues to access stolen memory.\n\nReported-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nReported-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nTested-by: Jiri Olsa \u003cjolsa@redhat.com\u003e\nTested-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "53371edaef692bef7eee8070bd680401ccf65706", "tree": "a3169f2beded4d250a19e674ea5ec46b5c29cd61", "parents": [ "1591192d3a17adeebd03be0ce5888b88bddfaf89" ], "author": { "name": "Oswald Buddenhagen", "email": "ossi@kde.org", "time": "Sat Jun 19 23:08:37 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Jan 14 16:36:19 2011 +0000" }, "message": "agp/intel: Fix device names of i845 and 845G\n\nThey got mixed up when the switch was converted to a table in 2007.\n\nSigned-off-by: Oswald Buddenhagen \u003cossi@kde.org\u003e\n[ickle: minor changes for 2.6.37+]\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "d15eda5c6edff4987af6f4423af0bab0c3251e74", "tree": "87400cdc5f74d1258b6456b88beaf6fc3dc5f97a", "parents": [ "a46f3108b1cd8bf11d46ac8a5f30df6f6dbdf738" ], "author": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Wed Jan 12 11:39:48 2011 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Wed Jan 12 11:39:48 2011 +1000" }, "message": "i915/gtt: fix ordering causing DMAR errors on object teardown.\n\nPrevious to the last GTT rework we always rewrote the GTT then unmapped the\nobject, somehow this got reversed in the rework in 2.6.37-rc5 timeframe.\n\nThis fix needs to go to stable in an alternate form since the code changed.\n\nThis fixes DMAR reports on my Ironlake HP2540p.\n\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "a46f3108b1cd8bf11d46ac8a5f30df6f6dbdf738", "tree": "49d7731e7c1250f28a44aa8d3e62c43292e4bef3", "parents": [ "784fe39fa80d557847baeca2695915d17b09827f" ], "author": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Wed Jan 12 11:38:37 2011 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@gmail.com", "time": "Wed Jan 12 11:38:37 2011 +1000" }, "message": "i915/gtt: fix ordering issues with status setup and DMAR\n\nThis code was setting up the status page before setting the DMAR-is-on-bit,\nso we were getting DMAR errors on the status page. Reverse the two bits\nof init code to the correct result.\n\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "c97689d8860f086125e7ff9cd730027a0057ca4f", "tree": "019ab7330af6c975ffba0d7016e0ed6243fbf6b0", "parents": [ "55249baaa5cd188ebd9acdb047eeaed8092e4a93" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Dec 23 10:40:38 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Jan 11 20:35:41 2011 +0000" }, "message": "agp/intel: Flush the chipset write buffers when changing GTT base\n\nFlush the chipset write buffers before and after adjusting the GTT base\nregister, just in case. We only modify this value upon initialisation\n(boot and resume) so there should be no outstanding writes, however\nthere are always those persistent PGTBL_ER that keep getting reported\nupon resume.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "5b2eef966cb2ae307aa4ef1767f7307774bc96ca", "tree": "095a251e145903598dd8d90d5b2eb880f0d6ff93", "parents": [ "8adbf8d46718a8f110de55ec82c40d04d0c362cc", "56bec7c009872ef33fe452ea75fecba481351b44" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 10 17:11:39 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 10 17:11:39 2011 -0800" }, "message": "Merge branch \u0027drm-core-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6\n\n* \u0027drm-core-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (390 commits)\n drm/radeon/kms: disable underscan by default\n drm/radeon/kms: only enable hdmi features if the monitor supports audio\n drm: Restore the old_fb upon modeset failure\n drm/nouveau: fix hwmon device binding\n radeon: consolidate asic-specific function decls for pre-r600\n vga_switcheroo: comparing too few characters in strncmp()\n drm/radeon/kms: add NI pci ids\n drm/radeon/kms: don\u0027t enable pcie gen2 on NI yet\n drm/radeon/kms: add radeon_asic struct for NI asics\n drm/radeon/kms/ni: load default sclk/mclk/vddc at pm init\n drm/radeon/kms: add ucode loader for NI\n drm/radeon/kms: add support for DCE5 display LUTs\n drm/radeon/kms: add ni_reg.h\n drm/radeon/kms: add bo blit support for NI\n drm/radeon/kms: always use writeback/events for fences on NI\n drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5\n drm/radeon/kms: add backend map workaround for barts\n drm/radeon/kms: fill gpu init for NI asics\n drm/radeon/kms: add disabled vbios accessor for NI asics\n drm/radeon/kms: handle NI thermal controller\n ...\n" }, { "commit": "42cbd8efb0746b55112de45173219f76c54390da", "tree": "3be21847ac861d36897bbb41de9478ddf5142c4d", "parents": [ "dda5f0a372873bca5f0b1d1866d7784dffd8b675", "f658bcfb2607bf0808966a69cf74135ce98e5c2d" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 06 10:50:28 2011 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Jan 06 10:50:28 2011 -0800" }, "message": "Merge branch \u0027x86-amd-nb-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-amd-nb-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, cacheinfo: Cleanup L3 cache index disable support\n x86, amd-nb: Cleanup AMD northbridge caching code\n x86, amd-nb: Complete the rename of AMD NB and related code\n" }, { "commit": "9097eef024db4f1850015e837a84aca0aa40a288", "tree": "0d2cf4b9ca5e1e58aa38c1225338925e675c4a02", "parents": [ "b13c2b96bf15b9dd0f1a45fd788f3a3025c5aec6", "71f4566084eb592fe545f05f7dff41fa9aa42e0b" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Dec 14 11:34:51 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Dec 14 11:34:51 2010 +0000" }, "message": "Merge branch \u0027drm-intel-fixes\u0027 into drm-intel-next\n" }, { "commit": "71f4566084eb592fe545f05f7dff41fa9aa42e0b", "tree": "0fc813df2af7ebda8dea06b6d954eb4cc5bbccfa", "parents": [ "63abf3edaf42d0b9f278df90fe41c7ed4796b6b1" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Dec 14 11:29:23 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Dec 14 11:29:23 2010 +0000" }, "message": "agp/intel: Fix missed cached memory flags setting in i965_write_entry()\n\nThis fixes regression from a6963596a13e62f8e65b1cf3403a330ff2db407c,\nthat missed to set cached memory type in GTT entry.\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "5aa7d52aebfc11760bbc5b081ed621227bb77981", "tree": "1bb2542ff9f8f58599325a68f3861f80be27bf26", "parents": [ "382ab78c0e4866eb9a812e9ba20d0f876d9634d6", "bbf0c6b3620b3872929ef7d3c392ce436889110f" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Dec 05 10:43:39 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Dec 05 10:43:39 2010 +0000" }, "message": "Merge branch \u0027drm-intel-fixes\u0027 into drm-intel-next\n\nImmediate merge for the conflicting introduction of HAS_COHERENT_RINGS.\n\nConflicts:\n\tdrivers/gpu/drm/i915/i915_dma.c\n\tinclude/drm/i915_drm.h\n" }, { "commit": "136711be41ec97f7f1a9c3a5e8535eb7da5fea59", "tree": "3be7da8694869adbb894f02b9edc1eab298c77da", "parents": [ "49078f7d108f132582e5af46304c317b55f83948" ], "author": { "name": "Takashi Iwai", "email": "tiwai@suse.de", "time": "Sat Dec 04 16:13:06 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Dec 05 10:40:17 2010 +0000" }, "message": "agp/intel: Fix wrong kunmap in i830_cleanup()\n\nAdd a missing NULL check and fix the wrong address passed to kunmap()\nin i830_cleanup().\n\nCc: stable@kernel.org\nSigned-off-by: Takashi Iwai \u003ctiwai@suse.de\u003e\n[danvet: added cc stable]\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "7bdc9ab00b1b0fdbb490f41c5c7c2fbc66fed9ee", "tree": "148ac9c6b4c4cb6cf59c948e95d39a16f6d6a62e", "parents": [ "92b88aeb1ad67417c002fdd77409771ca7e5433a" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 09 17:53:20 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:19:13 2010 +0000" }, "message": "agp/intel: Remove duplicate const\n\ndrivers/char/agp/intel-gtt.c:340:48: warning: duplicate const\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "4080775b60cc26044e7c4aba5e76e5041b0d7004", "tree": "46ee73a35bb1c99ff7e075e1c9b441faad98dc94", "parents": [ "7c2e6fdf452cddeff6a8ee5156edba39e53246fc" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sat Nov 06 11:18:58 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:47 2010 +0000" }, "message": "intel-gtt: export api for drm/i915\n\nJust some minor shuffling to get rid of any agp traces in the\nexported functions.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "cb16b67b5cb33b7d6732e0c416d29d933eea13ce", "tree": "b9e9abd539aea42c86bbc5c44a17456291512ccb", "parents": [ "76aaf22016caa7764f40e792aaca7b4918312b22" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 05 22:27:10 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:46 2010 +0000" }, "message": "agp: kill agp_rebind_memory\n\nIts only user, intel-gtt.c is now gone.\n\nCc: Dave Airlie \u003cairlied@gmail.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "76aaf22016caa7764f40e792aaca7b4918312b22", "tree": "88ba0e64ed5c970969df5d70f2ae01fe641d6722", "parents": [ "93a37f20eabeea4039130527b07453038c07f471" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 05 22:23:30 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:46 2010 +0000" }, "message": "drm/i915: restore gtt on resume in the drm instead of in intel-gtt.ko\n\nThis still uses the agp functions to actually reinstate the mappings\n(with a gross hack to make agp cooperate), but it wires everything\nup correctly for the switchover.\n\nThe call to agp_rebind_memory can be dropped because all non-kms drivers\ndo all their rebinding on EnterVT.\n\nv2: Be more paranoid and flush the chipset cache after restoring gtt\nmappings.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "f050a8abbda0efcd597c6b1825e3b9ce4d613383", "tree": "61421f0a7355f12babff81fb25c68470f4980f82", "parents": [ "4af72e2865a23ac090884a421bd1a8b19e247a22" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 05 18:40:56 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:45 2010 +0000" }, "message": "agp: kill agp_flush_chipset and corresponding ioctl\n\nThe intel drm calls the chipset functions now directly. Userspace\nnever called the corresponding ioctl, hence it can be killed, too.\n\nCc: Dave Airlie \u003cairlied@gmail.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "40ce6575102b23e432932b5ce41c44bf7cc5023b", "tree": "c14bb9bf62a83e35f81d0aaef55536c324bdbb3b", "parents": [ "23ed992a5ebe6964ebe312b54142fbc5e8185cdc" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 05 18:12:18 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:44 2010 +0000" }, "message": "drm/i915/gtt: call chipset flush directly\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "23ed992a5ebe6964ebe312b54142fbc5e8185cdc", "tree": "c8ee2fa6f6a51fb1d0b43f19ec15dcc482b914ef", "parents": [ "ff26860fb53f2dcfaaaf1bf017b09dbdfddff5ee" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 05 18:04:52 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:43 2010 +0000" }, "message": "drm/i915|intel-gtt: consolidate intel-gtt.h headers\n\n... and a few other defines.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "ff26860fb53f2dcfaaaf1bf017b09dbdfddff5ee", "tree": "2e441a68f636f52f9c158febe23766e6841d1a75", "parents": [ "820647b97a9cbdd976c7177f1b6047fc1f6dd5c0" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 05 15:43:35 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:43 2010 +0000" }, "message": "intel-gtt: fold i81x-only dcache support into the generic driver\n\nNow the intel-gtt.c rewrite is complete!\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "820647b97a9cbdd976c7177f1b6047fc1f6dd5c0", "tree": "4d0ec4a52ac3daff3cf797b3578326bb2b27954f", "parents": [ "625dd9d331d8a1ce5ee4e9924a22f3e55b7ac615" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Nov 05 13:30:14 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:42 2010 +0000" }, "message": "intel-gtt: switch i81x to the common initialization helpers\n\nStill a separate agp_bridge_driver because of the i81x-only\ndedicated vram support.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "625dd9d331d8a1ce5ee4e9924a22f3e55b7ac615", "tree": "bad37f7ecc7ef90134ea4eb9e51e788a946a654f", "parents": [ "24a6b387af7cd5d1e0e5d15b15104644a5105de7" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Nov 04 20:07:57 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:42 2010 +0000" }, "message": "intel-gtt: switch i81x to the write_entry helpers\n\nInitialization is still done with the old code with a few\nadded things sprinkled in to make the intel_fake_agp helper\nfunctions work.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "24a6b387af7cd5d1e0e5d15b15104644a5105de7", "tree": "d8b6af7385d0667fb3469eb454217eb35dd8f50f", "parents": [ "b47cf66f315a258c458ed4345c443dba396fb787" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Nov 04 20:14:15 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:42 2010 +0000" }, "message": "intel-gtt: kill unneeded sandybridge memory types\n\nUsed for the now dead agp type_to_mask stuff.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "b47cf66f315a258c458ed4345c443dba396fb787", "tree": "1b602d3c6711e5e04922ce2d348003ff4c323cdf", "parents": [ "e384eafc1c2f4f10155fe25324afe51129ec3e6a" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Nov 04 18:41:50 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 20:14:41 2010 +0000" }, "message": "intel-gtt: drop dcache support for i830 and later\n\ni830_check_flags already disallows it, so no need to implement it\nin the write_entry function. Seems to be a remnant from i810 support.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "c64f7ba5f1006d8c20eacafecf98d4d00a6902a0", "tree": "0309e263e05be06e718d6a07169802ac026aef68", "parents": [ "1b6064d79b9a1c5e5aa6fcc6855f3da5e639ff73" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 14:24:24 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 15:43:18 2010 +0000" }, "message": "agp/intel: Remove confusion of stolen entries not stolen memory\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "1b6064d79b9a1c5e5aa6fcc6855f3da5e639ff73", "tree": "948c4ed0770504cb80482333fa708823eddc88f0", "parents": [ "fe669bf88e9108b96a847385df08c9b1e98c1420" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 12:33:54 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 23 15:42:59 2010 +0000" }, "message": "agp/intel: Remove the artificial cap on stolen size\n\nNow that the stolen memory does not also steal entries from the GTT, we\ncan use all the memory the BIOS set aside for the GPU.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "e624ae8e0d4243e71daedce7570e91290438eaca", "tree": "e2b9804379a6aab3d2471898d257fe5590feb70c", "parents": [ "c4a1d9e4dc5d5313cfec2cc0c9d630efe8a6f287", "4ab0fbd3a29067e1540f05093ae4ed07645d18c8" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Nov 22 08:51:36 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Nov 22 08:51:36 2010 +0000" }, "message": "Merge branch \u0027drm-intel-fixes\u0027 into drm-intel-next\n\nConflicts:\n\tdrivers/gpu/drm/i915/i915_gem.c\n" }, { "commit": "9653a5c76c8677b05b45b3b999d3b39988d2a064", "tree": "9224748c69296fc6ac50beae72f20e6e2ae16aca", "parents": [ "eec1d4fa00c6552ae2fdf71d59f1eded7c88dd89" ], "author": { "name": "Hans Rosenfeld", "email": "hans.rosenfeld@amd.com", "time": "Fri Oct 29 17:14:31 2010 +0200" }, "committer": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Nov 18 15:53:05 2010 +0100" }, "message": "x86, amd-nb: Cleanup AMD northbridge caching code\n\nSupport more than just the \"Misc Control\" part of the northbridges.\nSupport more flags by turning \"gart_supported\" into a single bit flag\nthat is stored in a flags member. Clean up related code by using a set\nof functions (amd_nb_num(), amd_nb_has_feature() and node_to_amd_nb())\ninstead of accessing the NB data structures directly. Reorder the\ninitialization code and put the GART flush words caching in a separate\nfunction.\n\nSigned-off-by: Hans Rosenfeld \u003chans.rosenfeld@amd.com\u003e\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\n" }, { "commit": "eec1d4fa00c6552ae2fdf71d59f1eded7c88dd89", "tree": "ee2c918694e1a01e0826e98c89b703916488bedd", "parents": [ "e53beacd23d9cb47590da6a7a7f6d417b941a994" ], "author": { "name": "Hans Rosenfeld", "email": "hans.rosenfeld@amd.com", "time": "Fri Oct 29 17:14:30 2010 +0200" }, "committer": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Nov 18 15:53:04 2010 +0100" }, "message": "x86, amd-nb: Complete the rename of AMD NB and related code\n\nNot only the naming of the files was confusing, it was even more so for\nthe function and variable names.\n\nRenamed the K8 NB and NUMA stuff that is also used on other AMD\nplatforms. This also renames the CONFIG_K8_NUMA option to\nCONFIG_AMD_NUMA and the related file k8topology_64.c to\namdtopology_64.c. No functional changes intended.\n\nSigned-off-by: Hans Rosenfeld \u003chans.rosenfeld@amd.com\u003e\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\n" }, { "commit": "451a3c24b0135bce54542009b5fde43846c7cf67", "tree": "f0fbbcc155aef2a1ffcb8aa593fe7a966d0e6900", "parents": [ "55f6561c6941713ab5ae9180525b026dd40b7d14" ], "author": { "name": "Arnd Bergmann", "email": "arnd@arndb.de", "time": "Wed Nov 17 16:26:55 2010 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Nov 17 08:59:32 2010 -0800" }, "message": "BKL: remove extraneous #include \u003csmp_lock.h\u003e\n\nThe big kernel lock has been removed from all these files at some point,\nleaving only the #include.\n\nRemove this too as a cleanup.\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "c94f28c383f58c9de74678e0f1624db9c5f8a8cb", "tree": "3281184f026cb79cee6c20fe29c994ba654cbbe4", "parents": [ "df15315899c0641412bd54b29565a70b078a6ac8", "1bb95834bbcdc969e477a9284cf96c17a4c2616f" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Nov 15 06:49:30 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Mon Nov 15 06:49:30 2010 +0000" }, "message": "Merge branch \u0027drm-intel-fixes\u0027 into drm-intel-next\n\nConflicts:\n\tdrivers/gpu/drm/i915/i915_gem.c\n\tdrivers/gpu/drm/i915/intel_ringbuffer.c\n" }, { "commit": "91839fd577abc5fb39fb2238e05e847c70c9dec3", "tree": "86238c628c368aab28e96d61de99b7d739eec1ff", "parents": [ "a7bcf21e60c73cb7f7c13fad928967d7e47c3cac", "3f8ff0e72d75fdbe7f2cba2c4015fd9fdd9e13fd" ], "author": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Nov 09 13:26:13 2010 +1000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Nov 09 13:26:13 2010 +1000" }, "message": "Merge branch \u0027drm-intel-fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel\n\n* \u0027drm-intel-fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:\n drm/i915: Fix LVDS fixed-mode regression from 219adae1\n drm/i915/ringbuffer: Use the HEAD auto-reporting mechanism\n drm/i915: Avoid might_fault during pwrite whilst holding our mutex\n agp/intel: fix cache control for sandybridge\n agp/intel: restore cache behavior on sandybridge\n drm/i915; Don\u0027t apply Ironlake FDI clock workaround to Sandybridge\n drm/i915: Fix KMS regression on Sandybridge/CPT\n i915: reprogram power monitoring registers on resume\n drm/i915: SNB BLT workaround\n drm/i915: Fix the graphics frequency clamping at init and when IPS is active.\n drm/i915: Allow powersave modparam to be adjusted at runtime.\n drm/i915: Apply big hammer to serialise buffer access between rings\n drm/i915: opregion_setup: iounmap correct address\n drm/i915: Flush read-only buffers from the active list upon idle as well\n i915: signedness bug in check_overlay_src()\n drm/i915: Fix typo from \"Enable DisplayPort Audio\"\n" }, { "commit": "16a02cf08a2de0863daf7ebb91718d7c6bbe7f9c", "tree": "8a4d083794272b7d7bf82aad75076a7722164b23", "parents": [ "8d0f56708292ca5c256ee3b7187d124afee81d93" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Tue Nov 02 17:30:46 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Nov 04 09:39:50 2010 +0000" }, "message": "agp/intel: fix cache control for sandybridge\n\nThis is broken from 97ef1bdd0bc75bce7b2058e9c432b6c277dcf4d3.\nLet\u0027s set the correct bit for LLC+MLC and LLC only.\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nCc: stable@kernel.org\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "8d0f56708292ca5c256ee3b7187d124afee81d93", "tree": "408b76c17505b7607eb0ef7a075c504239e7931f", "parents": [ "e07ac3a0b17ed9dec26b742ea41514063ef12386" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Tue Nov 02 17:30:47 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Nov 04 09:39:28 2010 +0000" }, "message": "agp/intel: restore cache behavior on sandybridge\n\nThis restores cache behavior for default AGP_USER_MEMORY as\nuncached, and leave default AGP_USER_CACHED_MEMORY as LLC only.\nI\u0027ve seen different cache behavior on one sandybridge desktop CPU vs.\nanother mobile CPU. Until we figure out how to detect the real cache\nconfig, restore back to the original behavior now.\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nCc: stable@kernel.org\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "897ef192514a6b0fc10a0ce3fe7e7aa0de09bc52", "tree": "bfa709ceb59f7afaebfa64e057a782e0f99d59a4", "parents": [ "d110852513148a7ec44fad4e036455aeb816d713" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Tue Nov 02 17:30:47 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 02 10:05:47 2010 +0000" }, "message": "agp/intel: restore cache behavior on sandybridge\n\nThis restores cache behavior for default AGP_USER_MEMORY as\nuncached, and leave default AGP_USER_CACHED_MEMORY as LLC only.\nI\u0027ve seen different cache behavior on one sandybridge desktop CPU vs.\nanother mobile CPU. Until we figure out how to detect the real cache\nconfig, restore back to the original behavior now.\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "d110852513148a7ec44fad4e036455aeb816d713", "tree": "5c72fa12fa653804a4d13658a641a713d6849acd", "parents": [ "328fc1325f144027f4a8269b11e9f8dcf1edcb97" ], "author": { "name": "Zhenyu Wang", "email": "zhenyuw@linux.intel.com", "time": "Tue Nov 02 17:30:46 2010 +0800" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Nov 02 10:05:46 2010 +0000" }, "message": "agp/intel: fix cache control for sandybridge\n\nThis is broken from 97ef1bdd0bc75bce7b2058e9c432b6c277dcf4d3.\nLet\u0027s set the correct bit for LLC+MLC and LLC only.\n\nSigned-off-by: Zhenyu Wang \u003czhenyuw@linux.intel.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "100519e2f1c20286158746f92f27c3aa14f5a893", "tree": "55f05ba1ebda006c438321bb4b7b5e23d2bca2a5", "parents": [ "5eac3ab45955b32f3a9d89e633918c4d6f133dfa" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Oct 31 10:37:02 2010 +0000" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Sun Oct 31 12:31:31 2010 +0000" }, "message": "agp/intel: the GMCH is always enabled for integrated processor graphics\n\n... and trying to set the bit is ineffectual.\n\nFixes the regression from e380f60 which detected that we were trying to\ndo undefined operations on the I830_GMCH_CTRL.\n\nReported-by: Alexey Fisher \u003cbug-track@fisher-privat.net\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "e380f60b22eddec7825224b8d788572c82b63161", "tree": "731ca9b67c0c8cc506924af26f61cf21405c364d", "parents": [ "c584fe47e4d92934c10e5d7f932ee042587dbcff" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Oct 29 18:11:26 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Oct 29 20:30:44 2010 +0100" }, "message": "agp/intel: Sandybridge doesn\u0027t require GMCH enabling\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "6a915c2bf073743dd31229f1ec2eaa7a2b13c1c3", "tree": "9e6d1497c53a3c111842c7d8864a19f19cf0c88a", "parents": [ "18cb657ca1bafe635f368346a1676fb04c512edf" ], "author": { "name": "Kyle McMartin", "email": "kyle@mcmartin.ca", "time": "Fri Oct 29 12:48:01 2010 -0400" }, "committer": { "name": "Kyle McMartin", "email": "kyle@mcmartin.ca", "time": "Fri Oct 29 13:26:48 2010 -0400" }, "message": "parisc-agp: fix missing slab.h include\n\nCommit 338e4fab added a missing kfree if the alloc_pci_dev failed\nbut forgot to include \u003clinux/slab.h\u003e for the definition of\nkfree.\n\nSigned-off-by: Kyle McMartin \u003ckyle@redhat.com\u003e\n" }, { "commit": "e430426654c6a99fb1977bae71d4844e876c4a52", "tree": "65a22a59321b6bed5579c2e58371eeb373e1db61", "parents": [ "e732ff707743e5ceba6ae2bfc7e799a0bac30ffa", "650a35f868f809aade56ef960d8a465f57ac74e2" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Oct 28 09:24:14 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Oct 28 09:24:14 2010 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:\n parisc: add tty driver to PDC console\n drivers/parisc/iosapic.c: Remove unnecessary kzalloc cast\n parisc: remove homegrown L1_CACHE_ALIGN macro\n arch/parisc: Removing undead ifdef CONFIG_PA20\n parisc: unwind - optimise linked-list searches for modules\n parisc: change to new flag variable\n drivers/char/agp/parisc-agp.c: eliminate memory leak\n parisc: kill __do_IRQ\n parisc: convert eisa interrupts to flow handlers\n parisc: convert gsc and dino pci interrupts to flow handlers\n parisc: convert suckyio interrupts to flow handlers\n parisc: convert iosapic interrupts to proper flow handlers\n parisc: convert cpu interrupts to proper flow handlers\n parisc: lay groundwork for killing __do_IRQ\n parisc: add prlimit64 syscall\n parisc: squelch warning when using dev_get_stats\n" }, { "commit": "201728429d6cf336cfd7483fcd1bce47291b2901", "tree": "162c9084104373fd587347f5b7b2e20951430d98", "parents": [ "b3eafc5af02a799650757f2c5b2b0d4835dd0a5f" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Fri Sep 24 18:25:59 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Oct 27 23:31:07 2010 +0100" }, "message": "intel-gtt: maximize ggtt size on platforms that support this\n\nOn VT-d supporting platforms the GGTT is allocated in a stolen mem\nsection separate from graphcis stolen mem. The GMCH register contains\na bitfield specifying the size of that region. Docs suggest that this\nregion can only be used for GGTT and PPGTT. Hence ensure that the\nPPGTT is disabled and use the complete area for the GGTT.\n\nUnfortunately the graphics core on G33/Pineview can\u0027t cope with really\nlarge GTTs and the BIOS usually enables the maximum of 512MB. So\ndon\u0027t bother with maximizing the GTT on these platforms.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "b3eafc5af02a799650757f2c5b2b0d4835dd0a5f", "tree": "c20558a017505974e4ef26437af480d1ff04fb21", "parents": [ "53984635a659e360f206a81ada4ae813152d72f1" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Thu Sep 23 20:04:17 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Wed Oct 27 23:31:06 2010 +0100" }, "message": "intel-gtt: save PGETBL_CTL later in the setup process\n\n... and switch to a more classical store-reg-on-suspend, restore-on-resume\nway of doing things. Obviously this is just preparation for the future,\nthe code is not there at all, yet.\n\nThis is needed because the next patch adjusts this register and everything\nin it (not just the pagetable address) needs to be restored on resume.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "c48c43e422c1404fd72c57d1d21a6f6d01e18900", "tree": "48e5d3828b4f5479361986535f71a1ae44e4f3c1", "parents": [ "520045db940a381d2bee1c1b2179f7921b40fb10", "135cba0dc399fdd47bd3ae305c1db75fcd77243f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Oct 26 18:57:59 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Oct 26 18:57:59 2010 -0700" }, "message": "Merge branch \u0027drm-core-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6\n\n* \u0027drm-core-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (476 commits)\n vmwgfx: Implement a proper GMR eviction mechanism\n drm/radeon/kms: fix r6xx/7xx 1D tiling CS checker v2\n drm/radeon/kms: properly compute group_size on 6xx/7xx\n drm/radeon/kms: fix 2D tile height alignment in the r600 CS checker\n drm/radeon/kms/evergreen: set the clear state to the blit state\n drm/radeon/kms: don\u0027t poll dac load detect.\n gpu: Add Intel GMA500(Poulsbo) Stub Driver\n drm/radeon/kms: MC vram map needs to be \u003e\u003d pci aperture size\n drm/radeon/kms: implement display watermark support for evergreen\n drm/radeon/kms/evergreen: add some additional safe regs v2\n drm/radeon/r600: fix tiling issues in CS checker.\n drm/i915: Move gpu_write_list to per-ring\n drm/i915: Invalidate the to-ring, flush the old-ring when updating domains\n drm/i915/ringbuffer: Write the value passed in to the tail register\n agp/intel: Restore valid PTE bit for Sandybridge after bdd3072\n drm/i915: Fix flushing regression from 9af90d19f\n drm/i915/sdvo: Remove unused encoding member\n i915: enable AVI infoframe for intel_hdmi.c [v4]\n drm/i915: Fix current fb blocking for page flip\n drm/i915: IS_IRONLAKE is synonymous with gen \u003d\u003d 5\n ...\n\nFix up conflicts in\n - drivers/gpu/drm/i915/{i915_gem.c, i915/intel_overlay.c}: due to the\n new simplified stack-based kmap_atomic() interface\n - drivers/gpu/drm/vmwgfx/vmwgfx_drv.c: added .llseek entry due to BKL\n removal cleanups.\n" }, { "commit": "229aebb873e29726b91e076161649cf45154b0bf", "tree": "acc02a3702215bce8d914f4c8cc3d7a1382b1c67", "parents": [ "8de547e1824437f3c6af180d3ed2162fa4b3f389", "50a23e6eec6f20d55a3a920e47adb455bff6046e" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Oct 24 13:41:39 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Oct 24 13:41:39 2010 -0700" }, "message": "Merge branch \u0027for-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\n* \u0027for-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)\n Update broken web addresses in arch directory.\n Update broken web addresses in the kernel.\n Revert \"drivers/usb: Remove unnecessary return\u0027s from void functions\" for musb gadget\n Revert \"Fix typo: configuation \u003d\u003e configuration\" partially\n ida: document IDA_BITMAP_LONGS calculation\n ext2: fix a typo on comment in ext2/inode.c\n drivers/scsi: Remove unnecessary casts of private_data\n drivers/s390: Remove unnecessary casts of private_data\n net/sunrpc/rpc_pipe.c: Remove unnecessary casts of private_data\n drivers/infiniband: Remove unnecessary casts of private_data\n drivers/gpu/drm: Remove unnecessary casts of private_data\n kernel/pm_qos_params.c: Remove unnecessary casts of private_data\n fs/ecryptfs: Remove unnecessary casts of private_data\n fs/seq_file.c: Remove unnecessary casts of private_data\n arm: uengine.c: remove C99 comments\n arm: scoop.c: remove C99 comments\n Fix typo configue \u003d\u003e configure in comments\n Fix typo: configuation \u003d\u003e configuration\n Fix typo interrest[ing|ed] \u003d\u003e interest[ing|ed]\n Fix various typos of valid in comments\n ...\n\nFix up trivial conflicts in:\n\tdrivers/char/ipmi/ipmi_si_intf.c\n\tdrivers/usb/gadget/rndis.c\n\tnet/irda/irnet/irnet_ppp.c\n" }, { "commit": "85ccc35b7e4a5e7894570fe9b4e4b56d82fc3181", "tree": "e0fdb8cf1c837c9f9365e385346d353ca0cc80d5", "parents": [ "878a3c37d36142a192bdf5b6bfcf920832f431d7" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Oct 22 14:59:29 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Oct 22 15:04:09 2010 +0100" }, "message": "agp/intel: Restore valid PTE bit for Sandybridge after bdd3072\n\nIn cleaning up the mask functions in bdd3072, the setting of the PTE\nvalid bit was dropped for Sandybridge.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "338e4fab3d41aa14264e10ce505a7c908633cdad", "tree": "66f754dfe6995eb9456c685143aa0ffc65b1735d", "parents": [ "7da1272547ebe96982a42292dfc833457708f4da" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Wed Oct 20 15:55:45 2010 -0700" }, "committer": { "name": "Kyle McMartin", "email": "kyle@mcmartin.ca", "time": "Thu Oct 21 21:03:47 2010 -0400" }, "message": "drivers/char/agp/parisc-agp.c: eliminate memory leak\n\nalloc_pci_dev allocates some memory, so that memory should be freed before\nleaving the function in an error case.\n\nA simplified version of the semantic match that finds this problem is:\n(http://coccinelle.lip6.fr/)\n\n// \u003csmpl\u003e\n@r exists@\nlocal idexpression x;\nexpression E;\nidentifier f1;\niterator I;\n@@\n\nx \u003d alloc_pci_dev(...);\n\u003c... when !\u003d x\n when !\u003d true (x \u003d\u003d NULL || ...)\n when !\u003d if (...) { \u003c+...x...+\u003e }\n when !\u003d I (...) { \u003c+...x...+\u003e }\n(\n x \u003d\u003d NULL\n|\n x \u003d\u003d E\n|\n x-\u003ef1\n)\n...\u003e\n* return ...;\n// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nDan Carpenter \u003cerror27@gmail.com\u003e\nDave Airlie \u003cairlied@linux.ie\u003e\nCc: Helge Deller \u003cdeller@gmx.de\u003e\nCc: \"James E.J. Bottomley\" \u003cjejb@parisc-linux.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Kyle McMartin \u003ckyle@redhat.com\u003e\n" }, { "commit": "2f0384e5fc4766ad909597547d0e2b716c036755", "tree": "bf965a4bee85fa09edec91772647fbc5aafa0fc4", "parents": [ "bc4016f48161454a9a8e5eb209b0693c6cde9f62", "5c80cc78de46aef6cd5e714208da05c3f7f548f8" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Oct 21 13:01:08 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Oct 21 13:01:08 2010 -0700" }, "message": "Merge branch \u0027x86-amd-nb-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-amd-nb-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, amd_nb: Enable GART support for AMD family 0x15 CPUs\n x86, amd: Use compute unit information to determine thread siblings\n x86, amd: Extract compute unit information for AMD CPUs\n x86, amd: Add support for CPUID topology extension of AMD CPUs\n x86, nmi: Support NMI watchdog on newer AMD CPU families\n x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD CPUs\n x86, k8: Rename k8.[ch] to amd_nb.[ch] and CONFIG_K8_NB to CONFIG_AMD_NB\n x86, k8-gart: Decouple handling of garts and northbridges\n x86, cacheinfo: Fix dependency of AMD L3 CID\n x86, kvm: add new AMD SVM feature bits\n x86, cpu: Fix allowed CPUID bits for KVM guests\n x86, cpu: Update AMD CPUID feature bits\n x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit\n x86, AMD: Remove needless CPU family check (for L3 cache info)\n x86, tsc: Remove CPU frequency calibration on AMD\n" }, { "commit": "3dde04b0152634d42994b34b86bbf3c70fbc6b19", "tree": "9ceaacc72ae9958fc4567020a5eb19503af6b78c", "parents": [ "4f27b75d56334f33cbccff5da8372dc4aba122ba" ], "author": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Thu Oct 14 16:30:41 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Oct 19 09:20:04 2010 +0100" }, "message": "agp/intel: Also add B43.1 to list of supported devices\n\nThis was a missing piece from 41a5142 that dropped recognition of the\nAGP module for the second B43 variant.\n\nReported-by: Stefan Bader \u003cstefan.bader@canonical.com\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: stable@kernel.org\n" }, { "commit": "f6086134d0b17b2c37f537a5429a919b3d2cced8", "tree": "05062712f62bb1ed8984889a104096fcef90622b", "parents": [ "965d38074e6eae71757a8baf9a348139e1e6894d" ], "author": { "name": "Francisco Jerez", "email": "currojerez@riseup.net", "time": "Sat Oct 16 00:45:15 2010 +0000" }, "committer": { "name": "Dave Airlie", "email": "airlied@redhat.com", "time": "Tue Oct 19 14:12:32 2010 +1000" }, "message": "agp/amd-k7: Allow binding user memory to the AGP GART.\n\nTTM-based DRM drivers need to be able to bind user memory to the AGP\naperture. This patch fixes the \"[TTM] AGP Bind memory failed.\" errors\nand the subsequent fallout seen with the nouveau driver.\n\nSigned-off-by: Francisco Jerez \u003ccurrojerez@riseup.net\u003e\nTested-by: Grzesiek Sójka \u003cpld@pfu.pl\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n" }, { "commit": "631dd1a885b6d7e9f6f51b4e5b311c2bb04c323c", "tree": "c431fa3479c1d35842fb5635ed7ccd487d063a62", "parents": [ "d7eccbbae84b2ee7dbb756e60287c4b47071444e" ], "author": { "name": "Justin P. Mattock", "email": "justinmattock@gmail.com", "time": "Mon Oct 18 11:03:14 2010 +0200" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Mon Oct 18 11:03:14 2010 +0200" }, "message": "Update broken web addresses in the kernel.\n\nThe patch below updates broken web addresses in the kernel\n\nSigned-off-by: Justin P. Mattock \u003cjustinmattock@gmail.com\u003e\nCc: Maciej W. Rozycki \u003cmacro@linux-mips.org\u003e\nCc: Geert Uytterhoeven \u003cgeert@linux-m68k.org\u003e\nCc: Finn Thain \u003cfthain@telegraphics.com.au\u003e\nCc: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nCc: Matt Turner \u003cmattst88@gmail.com\u003e\nCc: Dimitry Torokhov \u003cdmitry.torokhov@gmail.com\u003e\nCc: Mike Frysinger \u003cvapier.adi@gmail.com\u003e\nAcked-by: Ben Pfaff \u003cblp@cs.stanford.edu\u003e\nAcked-by: Hans J. Koch \u003chjk@linutronix.de\u003e\nReviewed-by: Finn Thain \u003cfthain@telegraphics.com.au\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "3d8a1a6a8af910cc2da566080d111e062a124ba6", "tree": "0c78b30a5c7aa083e215222989f982313c5141c0", "parents": [ "1b13fe6a6e9986dbc079cbb05090be75edbffa5d", "5d0d71569e671239ae0d905ced9b65cd843f99ee" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Oct 13 15:44:24 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Oct 13 15:44:24 2010 +0200" }, "message": "Merge branch \u0027amd-iommu/2.6.37\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu into core/iommu\n" }, { "commit": "e61cb0d5fd172ab95a4501917526382f25158e83", "tree": "5620faa45a505e54f61d26d34f8a4b69ad6ed80c", "parents": [ "5ceb0f9bb7bde101d8b07cb803002591dcb8c804" ], "author": { "name": "Jan Beulich", "email": "JBeulich@novell.com", "time": "Fri Sep 24 13:25:30 2010 +0100" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Fri Sep 24 14:22:12 2010 +0100" }, "message": "some clean up to intel-gtt.c\n\nIn commit e517a5e97080bbe52857bd0d7df9b66602d53c4d the call to\nmap_page_into_agp() got removed from intel_i830_setup_flush(), but the\ncounterpart call from intel_i830_fini_flush() to unmap_page_from_agp()\nwas left in place.\n\nAdditionally, the page allocated here never gets its physical address\nused for sending to hardware, so there\u0027s no need to allocate it with\nGFP_DMA32. Nor is __GFP_ZERO really necessary, as the page is used\nonly to store data to force flushing of some internal processor state.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nCc: Eric Anholt \u003ceric@anholt.net\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "ae83dd5c7d80e0f9063739a18e270da7207a91e3", "tree": "2d5e0f7538350998479957d16f4b735fa8a83a3a", "parents": [ "22533b494ff6a812b3e97248cc6c062858396182" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sun Sep 12 17:11:15 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:40:41 2010 +0100" }, "message": "intel-gtt add a cleanup function for chipset specific stuff\n\nThe old code didn\u0027t clean up the i830 chipset flush page. And it\nlooks nicer.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "22533b494ff6a812b3e97248cc6c062858396182", "tree": "5033e66110618dedbcdc6ff7cd3beab582c92984", "parents": [ "0af9e92e779602bdd6d4d19acf63b4802fab91b6" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sun Sep 12 16:38:55 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:40:28 2010 +0100" }, "message": "intel-gtt: store the dma mask size in intel_gtt_driver\n\nStoring this explicitly makes for clearer code and hopefully\nless further confusion.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "0af9e92e779602bdd6d4d19acf63b4802fab91b6", "tree": "d508f1db16ab519bc197f9691427455963562cfc", "parents": [ "aaa62591199162e6496b4f47cac4f5923bc571d1" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sun Sep 12 14:04:03 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:40:06 2010 +0100" }, "message": "intel-gtt: clean up gtt size reporting\n\nConsolidate everything in intel-gtt.c and also kill the export\nof intel_max_stolen.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "aaa62591199162e6496b4f47cac4f5923bc571d1", "tree": "1f3d74c71c3a3c914458af39890a4eb7ad2f324a", "parents": [ "e9b1cc81c2222108d866323c51f482dd6db8d689" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sun Sep 12 11:07:15 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:39:52 2010 +0100" }, "message": "agp: kill agp_(unmap|map)_memory\n\nDMA remapping was only used by the intel-gtt driver. With that\ncode now folded into the driver, kill the agp generic support for\nit.\n\nCc: Dave Airlie \u003cairlied@linux.ie\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "e9b1cc81c2222108d866323c51f482dd6db8d689", "tree": "c57efbcc2e43d878ddcac52e4c92589b841613cf", "parents": [ "1b263f246639c4777fbf6cfda932ecd1ea4bebb9" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sun Sep 12 00:29:26 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:39:19 2010 +0100" }, "message": "intel-gtt: consolidate fake_agp driver structs\n\nThey\u0027re now all the same.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "1b263f246639c4777fbf6cfda932ecd1ea4bebb9", "tree": "a93dfc23657a830015b61daffb9d1d77bfb0bb8a", "parents": [ "bdd30729b68d708c970125aab363931134698f2d" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sun Sep 12 00:27:24 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:37:31 2010 +0100" }, "message": "intel-gtt: move chipset flush to the gtt driver struct\n\nThis is the last differentiator between the different fake agp drivers.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "bdd30729b68d708c970125aab363931134698f2d", "tree": "e7db7e5d4ebfdee40687f038e67d64e14e4cc563", "parents": [ "90cb149e1a85f8296daa1989c055db18fbf4ea88" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sun Sep 12 12:34:44 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:37:18 2010 +0100" }, "message": "intel-gtt: kill mask_memory functions\n\nThat indirection mess can now go. Add a dummy i81x gtt_driver to\navoid a NULL pointer check.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "90cb149e1a85f8296daa1989c055db18fbf4ea88", "tree": "a8e4b4c7485baa9bb95dc29e6cd1adc2106dcd4a", "parents": [ "450f2b3d51025a1749b694ee13f0e4e23ed58750" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sat Sep 11 23:55:20 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:37:05 2010 +0100" }, "message": "intel-gtt: generic (insert|remove)_entries for sandybridge\n\nLike before, but now with the added bonus of being able to kill\nquite a bit of no-longer userful code (the old dmar support stuff).\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "450f2b3d51025a1749b694ee13f0e4e23ed58750", "tree": "8cd3a1920a1bf813d52a7458922d96bd40060f5d", "parents": [ "fefaa70f0c7fa406492039e35b69b83fc13e163a" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sat Sep 11 23:48:25 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:36:52 2010 +0100" }, "message": "intel-gtt: generic (insert|remove)_entries for g33/i965\n\nLike for the i915.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "fefaa70f0c7fa406492039e35b69b83fc13e163a", "tree": "c9f721ad19884c401774d926b65a6c4f8b08a037", "parents": [ "5cbecafce4ee8ab73c194911e01a77a7a07f034e" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sat Sep 11 22:12:11 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:36:38 2010 +0100" }, "message": "intel-gtt: generic (insert|remove)_entries for i915\n\nBeef up the generic version to support dmar. Otherwise like for the i830.\n\nv2: Don\u0027t try to DMA remap on resume for already remapped pages.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" }, { "commit": "5cbecafce4ee8ab73c194911e01a77a7a07f034e", "tree": "1434a04f60faec36094bad48db0f3938367df361", "parents": [ "a87aa5cc0074fea871c8c6d2660d9b6cd7699d3d" ], "author": { "name": "Daniel Vetter", "email": "daniel.vetter@ffwll.ch", "time": "Sat Sep 11 21:31:04 2010 +0200" }, "committer": { "name": "Chris Wilson", "email": "chris@chris-wilson.co.uk", "time": "Tue Sep 21 11:36:25 2010 +0100" }, "message": "intel-gtt: generic (insert|remove)_entries for i830\n\nWell, not all too generic because it does not yet support dmar.\nAdd a new function check_flags to ensure that non-gem code does\nnot try to screw us over.\n\nv2: Beautify i830_check_flags with an idea from Chris Wilson.\n\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\n" } ], "next": "a87aa5cc0074fea871c8c6d2660d9b6cd7699d3d" }