)]}'
{
  "log": [
    {
      "commit": "25cf25073a4e1e0563c288908481f10f98acb19a",
      "tree": "7a3e22eb3898b7329150620db3dcd3c2e35f5ca2",
      "parents": [
        "fd454997d6873ef7ba668200f4278e006139187e"
      ],
      "author": {
        "name": "Mathias Nyman",
        "email": "mathias.nyman@linux.intel.com",
        "time": "Tue Apr 24 11:02:49 2012 +0100"
      },
      "committer": {
        "name": "Grant Likely",
        "email": "grant.likely@secretlab.ca",
        "time": "Fri May 11 13:14:54 2012 -0600"
      },
      "message": "gpio: add MSIC gpio driver\n\nAdd gpio support for Intel MSIC chips found in Intel Medfield platforms.\nMSIC supports totally 24 GPIOs with 16 low voltage and 8 high voltage pins.\nDriver uses MSIC mfd interface for MSIC access.\n\n(Updated comment to indicate why locking is actually safe)\n\nSigned-off-by: Mathias Nyman \u003cmathias.nyman@linux.intel.com\u003e\nSigned-off-by: Alan Cox \u003calan@linux.intel.com\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n"
    }
  ]
}