)]}' { "log": [ { "commit": "c95df2db2cb5a147b42374f391858232517c0576", "tree": "eacbb643afd225a991f538690462e9b6e7e52c81", "parents": [ "4851680491f3629cd53b3a1283841deadd6db88c" ], "author": { "name": "Dong Aisheng", "email": "dong.aisheng@linaro.org", "time": "Mon May 14 19:06:36 2012 +0800" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Tue May 15 09:43:18 2012 +0200" }, "message": "pinctrl: a minor error checking improvement for pinconf\n\nAlso checking invalid num_configs when validate the pinconf map.\n\nAcked-by: Stephen Warren \u003cswarren@wwwdotorg.org\u003e\nSigned-off-by: Dong Aisheng \u003cdong.aisheng@linaro.org\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "ad6e1107baa2e7fda55c2020c25127eab9c0122b", "tree": "fab32aafbdc9f2fd53d69afcaaf0b8997beea2af", "parents": [ "02ae6da28fb7aa31d8bf1972c99e83c58b684198" ], "author": { "name": "John Crispin", "email": "blogic@openwrt.org", "time": "Thu Apr 26 16:47:11 2012 +0200" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Thu Apr 26 23:11:04 2012 +0200" }, "message": "pinctrl: enhance reporting of errors when loading from DT\n\nThere are a few places in the api where the code simply returns -EINVAL when\nit finds an error. An example is pinmux_map_to_setting() which now reports an\nerror if we try to match a group with a function that it does not support.\n\nThe reporting of errors in pinconf_check_ops and pinmux_check_ops now has the\nsame style and is located inside the according functions and not the calling\ncode.\n\nWhen the map is found in the DT but the default state can not be selected we\nget an error to know that the code at least tried.\n\nThe patch also removes a stray word from one comment and a \"-\u003e\" from another\nfor the sake of consistency.\n\nFinally we replace a few pr_err/debug() calls with dev_err/dbg().\n\nThanks go to Stephen Warren for reviewing the patch and enhancing the reporting\ninside pinmux_map_to_setting().\n\nSigned-off-by: John Crispin \u003cblogic@openwrt.org\u003e\nAcked-by: Stephen Warren \u003cswarren@wwwdotorg.org\u003e\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "2aeefe0233174015aef19dc06aac02a1119a44be", "tree": "ecd9ccbf963da23232e5bb7d2776fea8d0dfa069", "parents": [ "96593afe6d724ffca309340afa914f8e1c6719fd" ], "author": { "name": "Dong Aisheng", "email": "dong.aisheng@linaro.org", "time": "Mon Apr 16 22:07:24 2012 +0800" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Apr 18 13:53:13 2012 +0200" }, "message": "pinctrl: a minor fix of pin config debug information\n\nSigned-off-by: Dong Aisheng \u003cdong.aisheng@linaro.org\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "6cb4158757a8629e14851e7802f3b6bfaa7d6f00", "tree": "c872640d7ec45d37fac2e1978418d5a92b5ef527", "parents": [ "c736d73c9e6d9849ecb08c34c1d3917b210e8f38" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Fri Apr 13 10:49:06 2012 -0600" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Apr 18 13:53:12 2012 +0200" }, "message": "pinctrl: allow pctldevs to decode pin config in debugfs\n\nAdd a pinconf op so that pin controller drivers can decode their pin\nconfig settings for debugfs.\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "ad8bb720c23a80233e45ed31d67458f5e5b7ab31", "tree": "6b1da7d3dc99bacd03167a0235785e3f881b03b3", "parents": [ "a1d31f71e6ed2f714830df8885ec07dfe1f6632e" ], "author": { "name": "Dong Aisheng", "email": "dong.aisheng@linaro.org", "time": "Tue Apr 10 12:41:34 2012 +0800" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Apr 18 13:53:11 2012 +0200" }, "message": "pinctrl: add some error checking for user interfaces\n\nThis patch can avoid kernel oops in case the mux or config\nfunction is not supported by driver.\n\nAcked-by: Stephen Warren \u003cswarren@wwwdotorg.org\u003e\nSigned-off-by: Dong Aisheng \u003cdong.aisheng@linaro.org\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "d1e90e9e7467dbfe521b25ba79f520bf676ebc36", "tree": "2c4a2b8bfa2a984cb57a781b034a204a12fcc4b6", "parents": [ "122dbe7e58c7d064a17eefd33205227e6bce85ca" ], "author": { "name": "Viresh Kumar", "email": "viresh.kumar@st.com", "time": "Fri Mar 30 11:25:40 2012 +0530" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Apr 18 13:53:10 2012 +0200" }, "message": "pinctrl: replace list_*() with get_*_count()\n\nMost of the SoC drivers implement list_groups() and list_functions()\nroutines for pinctrl and pinmux. These routines continue returning\nzero until the selector argument is greater than total count of\navailable groups or functions.\n\nThis patch replaces these list_*() routines with get_*_count()\nroutines, which returns the number of available selection for SoC\ndriver. pinctrl layer will use this value to check the range it can\nchoose.\n\nThis patch fixes all user drivers for this change. There are other\nroutines in user drivers, which have checks to check validity of\nselector passed to them. It is also no more required and hence\nremoved.\n\nDocumentation updated as well.\n\nAcked-by: Stephen Warren \u003cswarren@wwwdotorg.org\u003e\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\n[Folded in fix and fixed a minor merge artifact manually]\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "394349f7789fdfcdc74b61afcac84046535c40b7", "tree": "20dd88e7a1f2dba0a1c227f53960013bf956fa43", "parents": [ "70b36378d44d7f5e62458a830b1a9bb1c570f28a" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Thu Nov 24 18:27:15 2011 +0100" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Mon Mar 12 22:49:02 2012 +0100" }, "message": "pinctrl: introduce generic pin config\n\nThis is a split-off from the earlier patch set which adds generic\npin configuration for the pin controllers that want it. Since\nwe may have a system with mixed generic and custom pin controllers,\nwe pass a boolean in the pin controller ops vtable to indicate\nif it is generic.\n\nChangeLog v1-\u003ev5:\n- Follow parent patch versioning number system.\n- Document the semantic meaning of return values from pin config\n get functions, so we can iterate over pins and check their\n properties from debugfs as part of the generic config code.\n- Use proper cast functions in the generic debugfs pin config\n file.\n- Expand generic config to optionally cover groups too.\nChangeLog v5-\u003ev6:\n- Update to match underlying changes.\nChangeLog v6-\u003ev7:\n- Drop DRIVE_OFF parameter, use bias high impedance for this\n- Delete argument for drive modes push-pull, od and os. These\n are now just state transitions.\n- Delete slew rate rising/falling due to discussions on on\n proper semantics\n- Drop config wakeup, struct irq_chip does this for now, add\n back if need be.\n- Set PIN_CONFIG_END to 0x7fff making room for custom config\n parameters from 0x8000 and up.\n- Prefix accessor functions with pinconf_\n" }, { "commit": "70b36378d44d7f5e62458a830b1a9bb1c570f28a", "tree": "4956186b010d0b02245ade107645f5cb712d0ef3", "parents": [ "652162d469a73450a66b6c8049b16c2b7828fa24" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Mon Mar 12 21:38:29 2012 +0100" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Mon Mar 12 22:48:43 2012 +0100" }, "message": "pinctrl: fix error path in pinconf_map_to_setting()\n\nThe code was using the union member\nsetting-\u003edata.configs.group_or_pin to store a potential\nerror code, but since that member is unsigned the\n\u003c 0 comparison was not true, letting errors pass through,\nending up as mapped to pin \"-22\". Fix this up and print\nthe error.\n\nAcked-by: Stephen Warren \u003cswarren@wwwdotorg.org\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "1e2082b520721734c358f776d34a069867214c8e", "tree": "4d11e15a4127ad69faf7555864480a6fafe5422c", "parents": [ "6e5e959dde0d92d177f035652aeaa77f9330c9c6" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Fri Mar 02 13:05:48 2012 -0700" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Mon Mar 05 11:25:11 2012 +0100" }, "message": "pinctrl: enhance mapping table to support pin config operations\n\nThe pinctrl mapping table can now contain entries to:\n* Set the mux function of a pin group\n* Apply a set of pin config options to a pin or a group\n\nThis allows pinctrl_select_state() to apply pin configs settings as well\nas mux settings.\n\nv3: Fix find_pinctrl() to iterate over the correct list.\n s/_MUX_CONFIGS_/_CONFIGS_/ in mapping table macros.\n Fix documentation to use correct mapping table macro.\nv2: Added numerous extra PIN_MAP_*() special-case macros.\n Fixed kerneldoc typo. Delete pinctrl_get_pin_id() and\n replace it with pin_get_from_name(). Various minor fixes.\n Updates due to rebase.\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nAcked-by: Dong Aisheng \u003cdong.aisheng@linaro.org\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "57b676f9c1b7cd84397fe5a86c9bd2788ac4bd32", "tree": "e07d87bba28678aa80d9325a9c48eac0f57a7fe2", "parents": [ "962bcbc57aa244eeb1176fa2e9f65ac865cca68a" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Fri Mar 02 13:05:44 2012 -0700" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Mon Mar 05 11:19:49 2012 +0100" }, "message": "pinctrl: fix and simplify locking\n\nThere are many problems with the current pinctrl locking:\n\nstruct pinctrl_dev\u0027s gpio_ranges_lock isn\u0027t effective;\npinctrl_match_gpio_range() only holds this lock while searching for a gpio\nrange, but the found range is return and manipulated after releading the\nlock. This could allow pinctrl_remove_gpio_range() for that range while it\nis in use, and the caller may very well delete the range after removing it,\ncausing pinctrl code to touch the now-free range object.\n\nSolving this requires the introduction of a higher-level lock, at least\na lock per pin controller, which both gpio range registration and\npinctrl_get()/put() will acquire.\n\nThere is missing locking on HW programming; pin controllers may pack the\nconfiguration for different pins/groups/config options/... into one\nregister, and hence have to read-modify-write the register. This needs to\nbe protected, but currently isn\u0027t. Related, a future change will add a\n\"complete\" op to the pin controller drivers, the idea being that each\nstate\u0027s programming will be programmed into the pinctrl driver followed\nby the \"complete\" call, which may e.g. flush a register cache to HW. For\nthis to work, it must not be possible to interleave the pinctrl driver\ncalls for different devices.\n\nAs above, solving this requires the introduction of a higher-level lock,\nat least a lock per pin controller, which will be held for the duration\nof any pinctrl_enable()/disable() call.\n\nHowever, each pinctrl mapping table entry may affect a different pin\ncontroller if necessary. Hence, with a per-pin-controller lock, almost\nany pinctrl API may need to acquire multiple locks, one per controller.\nTo avoid deadlock, these would need to be acquired in the same order in\nall cases. This is extremely difficult to implement in the case of\npinctrl_get(), which doesn\u0027t know which pin controllers to lock until it\nhas parsed the entire mapping table, since it contains somewhat arbitrary\ndata.\n\nThe simplest solution here is to introduce a single lock that covers all\npin controllers at once. This will be acquired by all pinctrl APIs.\n\nThis then makes struct pinctrl\u0027s mutex irrelevant, since that single lock\nwill always be held whenever this mutex is currently held.\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "f7b9006f4598dd252dca5225f3cf88179c36276f", "tree": "351e1b5aefddcf5d885069c37f844f916cae9b8f", "parents": [ "3cc70ed32cd6c5cb57de17bde615148ed7eda88f" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Sun Feb 19 23:45:58 2012 -0700" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Feb 22 18:42:00 2012 +0100" }, "message": "pinctrl: fix pinconf_groups_show() to emit newline\n\npinconf_groups_show() wrote all debug information on one line. Fix it to\nmatch pinconf_pins_show() and be legible.\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "2b694250174980382bddcb00e1de7654ecdf6f1f", "tree": "689d6ef2c9bca17f62c52b5d84bfd998dd2f044c", "parents": [ "03665e0f248d6b7542f72cd7c4ec521109f283c7" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Sun Feb 19 23:45:46 2012 -0700" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Feb 22 17:59:32 2012 +0100" }, "message": "pinctrl: Re-order pinconf.[ch] to match each-other\n\nModify the two files so that the order of function prototypes in the\nheader matches the order of implementations in the .c file.\n\nDon\u0027t prototype a couple of internal functions.\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "9dfac4fd7f8cdcdf734dff2ccc7ca467f53f1cfd", "tree": "6a9ee37b2aac4b288c85387d83310e5f9cd9108e", "parents": [ "8dc6ae4d448758a30cf5fa822d6fe6f4e15a04c6" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Feb 01 18:02:47 2012 +0100" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Feb 01 19:42:35 2012 +0100" }, "message": "pinctrl: delete raw device pointers in pinmux maps\n\nAfter discussion with Mark Brown in an unrelated thread about\nADC lookups, it came to my knowledge that the ability to pass\na struct device * in the regulator consumers is just a\nhistorical artifact, and not really recommended. Since there\nare no in-kernel users of these pointers, we just kill them\nright now, before someone starts to use them.\n\nReviewed-by: Mark Brown \u003cbroonie@opensource.wolfsonmicro.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "b9130b776ee481acbc27a7e56d98df75680de369", "tree": "b7933b4d3e562e806c3dc61544352e46f35820cb", "parents": [ "9e2551e10b5c7ba550849bd9ed519e498cc30e68" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Tue Jan 24 16:28:08 2012 -0800" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Thu Jan 26 14:13:11 2012 +0100" }, "message": "pinctrl: add checks for empty function names\n\nThis is needed as otherwise we can get the following when\ndealing with buggy data in a pinmux driver for\npinmux_search_function:\n\nUnable to handle kernel NULL pointer dereference at virtual\naddress 00000000\n...\nPC is at strcmp+0xc/0x34\nLR is at pinmux_get+0x350/0x8f4\n...\n\nAs we need pctldev initialized to call ops-\u003elist_functions,\nlet\u0027s initialize it before check_ops calls and pass the\npctldev to the check_ops functions. Do this for both pinmux\nand pinconf check_ops functions.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "546edd83abe4f03472d721c60011c5ff95e25474", "tree": "609fc1988af9b7a3ab16fb82cd985cfe0b7b31d1", "parents": [ "dcd6c92267155e70a94b3927bce681ce74b80d1f" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Fri Jan 06 13:38:31 2012 -0700" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Fri Jan 20 17:55:49 2012 +0100" }, "message": "pinctrl: fix pinconf_pins_show iteration\n\nCommit 706e852 \"pinctrl: correct a offset while enumerating pins\"\nmodified the variable used by pinconf_pin_show()\u0027s for loop, but didn\u0027t\nupdate the for loop test expression.\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "706e8520e8450a631ca6f798f8c811faf56f0a59", "tree": "68b0f77fc1f3b92be3e905e36f14e184403d0b67", "parents": [ "e6337c3c96a7ee5cfd5e7afed825f894d4576f58" ], "author": { "name": "Chanho Park", "email": "chanho61.park@samsung.com", "time": "Tue Jan 03 16:47:50 2012 +0900" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Tue Jan 03 09:10:09 2012 +0100" }, "message": "pinctrl: correct a offset while enumerating pins\n\nThis patch modifies a offset while enumerating pins to support a\npartial pin space. If we use a pin number for enumerating pins,\nthe pin space always starts with zero base. Indeed, we always check\nthe pin is in the pin space. An extreme example, there is only two pins.\nOne is 0. Another is 1000. We always enumerate whole offsets until 1000.\nFor solving this problem, we use the offset of the pin array instead\nof the zero-based pin number.\n\nSigned-off-by: Chanho Park \u003cchanho61.park@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\n[Restored sparse pin space comment]\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "43699dea1ea21a0d5786317a794cb2ba27a6f4fe", "tree": "6a1f26cce9cfe04ac93cd62005c14759722ffb74", "parents": [ "63fd5984a9b2214cba7dd7dd7b5a75cf40dde39f" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Thu Dec 15 16:57:17 2011 -0700" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Tue Jan 03 09:10:07 2012 +0100" }, "message": "pinctrl: pass name instead of device to pin_config_*\n\nObtaining a \"struct pinctrl_dev *\" is difficult for code not directly\nrelated to the pinctrl subsystem. However, the device name of the pinctrl\ndevice is fairly well known. So, modify pin_config_*() to take the device\nname instead of the \"struct pinctrl_dev *\".\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\n[rebased on top of refactoring code]\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "51cd24ee625c348654114032499914d0311e5832", "tree": "7483fbdc4db119f9a8f013035005f374e729ffd0", "parents": [ "528b78306ecf82af06c4862aa5518643fe20a440" ], "author": { "name": "Stephen Warren", "email": "swarren@nvidia.com", "time": "Fri Dec 09 16:59:05 2011 -0700" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Tue Jan 03 09:10:06 2012 +0100" }, "message": "pinctrl: don\u0027t create a device for each pin controller\n\nPin controllers should already be instantiated as a device, so there\u0027s\nno need for the pinctrl core to create a new struct device for each\ncontroller.\n\nThis allows the controller\u0027s real name to be used in the mux mapping\ntable, rather than e.g. \"pinctrl.0\", \"pinctrl.1\", etc.\n\nThis necessitates removal of the PINMUX_MAP_PRIMARY*() macros, since\ntheir sole purpose was to hard-code the .ctrl_dev_name field to be\n\"pinctrl.0\".\n\nSigned-off-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" }, { "commit": "ae6b4d8588f4fc95520b0e62c4b1f474c82191a9", "tree": "3da8e553a6374f02e89b5a6ba52b83f34c3abea2", "parents": [ "b4e3ac74d5cd4152f2ec6b3280b1ff3428952f7f" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Wed Oct 19 18:14:33 2011 +0200" }, "committer": { "name": "Linus Walleij", "email": "linus.walleij@linaro.org", "time": "Tue Jan 03 09:10:04 2012 +0100" }, "message": "pinctrl: add a pin config interface\n\nThis add per-pin and per-group pin config interfaces for biasing,\ndriving and other such electronic properties. The details of passed\nconfigurations are passed in an opaque unsigned long which may be\ndereferences to integer types, structs or lists on either side\nof the configuration interface.\n\nChangeLog v1-\u003ev2:\n- Clear split of terminology: we now have pin controllers, and\n those may support two interfaces using vtables: pin\n multiplexing and pin configuration.\n- Break out pin configuration to its own C file, controllers may\n implement only config without mux, and vice versa, so keep each\n sub-functionality of pin controllers separate. Introduce\n CONFIG_PINCONF in Kconfig.\n- Implement some core logic around pin configuration in the\n pinconf.c file.\n- Remove UNKNOWN config states, these were just surplus baggage.\n- Remove FLOAT config state - HIGH_IMPEDANCE should be enough for\n everyone.\n- PIN_CONFIG_POWER_SOURCE added to handle switching the power\n supply for the pin logic between different sources\n- Explicit DISABLE config enums to turn schmitt-trigger,\n wakeup etc OFF.\n- Update documentation to reflect all the recent reasoning.\nChangeLog v2-\u003ev3:\n- Twist API around to pass around arrays of config tuples instead\n of (param, value) pairs everywhere.\n- Explicit drive strength semantics for push/pull and similar\n drive modes, this shall be the number of drive stages vs\n nominal load impedance, which should match the actual\n electronics used in push/pull CMOS or TTY totempoles.\n- Drop load capacitance configuration - I probably don\u0027t know\n what I\u0027m doing here so leave it out.\n- Drop PIN_CONFIG_INPUT_SCHMITT_OFF, instead the argument zero to\n PIN_CONFIG_INPUT_SCHMITT turns schmitt trigger off.\n- Drop PIN_CONFIG_NORMAL_POWER_MODE and have a well defined\n argument to PIN_CONFIG_LOW_POWER_MODE to get out of it instead.\n- Drop PIN_CONFIG_WAKEUP_ENABLE/DISABLE and just use\n PIN_CONFIG_WAKEUP with defined value zero to turn wakeup off.\n- Add PIN_CONFIG_INPUT_DEBOUNCE for configuring debounce time\n on input lines.\n- Fix a bug when we tried to configure pins for pin controllers\n without pinconf support.\n- Initialized debugfs properly so it works.\n- Initialize the mutex properly and lock around config tampering\n sections.\n- Check the return value from get_initial_config() properly.\nChangeLog v3-\u003ev4:\n- Export the pin_config_get(), pin_config_set() and\n pin_config_group() functions.\n- Drop the entire concept of just getting initial config and\n keeping track of pin states internally, instead ask the pins\n what state they are in. Previous idea was plain wrong, if the\n device cannot keep track of its state, the driver should do\n it.\n- Drop the generic configuration layout, it seems this impose\n too much restriction on some pin controllers, so let them do\n things the way they want and split off support for generic\n config as an optional add-on.\nChangeLog v4-\u003ev5:\n- Introduce two symmetric driver calls for group configuration,\n .pin_config_group_[get|set] and corresponding external calls.\n- Remove generic semantic meanings of return values from config\n calls, these belong in the generic config patch. Just pass the\n return value through instead.\n- Add a debugfs entry \"pinconf-groups\" to read status from group\n configuration only, also slam in a per-group debug callback in\n the pinconf_ops so custom drivers can display something\n meaningful for their pins.\n- Fix some dangling newline.\n- Drop dangling #else clause.\n- Update documentation to match the above.\nChangeLog v5-\u003ev6:\n- Change to using a pin name as parameter for the\n [get|set]_config() functions, as suggested by Stephen Warren.\n This is more natural as names will be what a developer has\n access to in written documentation etc.\nChangeLog v6-\u003ev7:\n- Refactor out by-pin and by-name get/set functions, only expose\n the by-name functions externally, expose the by-pin functions\n internally.\n- Show supported pin control functionality in the debugfs\n pinctrl-devices file.\n\nAcked-by: Stephen Warren \u003cswarren@nvidia.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\n" } ] }