)]}' { "log": [ { "commit": "3b798a5231be15411225b99dc1217580e8d6ae1f", "tree": "848bb9a60c0c2cf733b425c31d84c9d651b9e65e", "parents": [ "228b60acaa4529c2208ee7a420f6a12b464ce285", "6afec830acc75a4dc4a7547c66fbf18152c946ef" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat May 30 07:57:44 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat May 30 07:57:44 2009 -0700" }, "message": "Merge branch \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6\n\n* \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6:\n ACPI, i915: build fix (v2)\n acpi-cpufreq: fix printk typo and indentation\n ACPI processor: remove spurious newline from warning message\n drm/i915: acpi/video.c fix section mismatch warning\n ACPI: video: DMI workaround broken Acer 5315 BIOS enabling display brightness\n ACPI: video: DMI workaround broken eMachines E510 BIOS enabling display brightness\n ACPI: sanity check _PSS frequency to prevent cpufreq crash\n i7300_idle: allow testing on i5000-series hardware w/o re-compile\n PCI/ACPI: fix wrong ref count handling in acpi_pci_bind()\n cpuidle: fix AMD C1E suspend hang\n cpuidle: makes AMD C1E work in acpi_idle\n" }, { "commit": "2f102607ac77354b02a76cf2748598ce9f270f08", "tree": "922513b874c12a9fe75bba02e94c24388f21dc35", "parents": [ "cd86a536c81e9300d984327517548ca0652eebf9" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Wed May 27 23:59:58 2009 -0400" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Thu May 28 20:52:40 2009 -0400" }, "message": "i7300_idle: allow testing on i5000-series hardware w/o re-compile\n\nTesting the i7300_idle driver on i5000-series hardware required\nan edit to i7300_idle.h to \"#define SUPPORT_I5000 1\" and a re-build\nof both i7300_idle and ioat_dma.\n\nReplace that build-time scheme with a load-time module parameter:\n\"7300_idle.forceload\u003d1\" to make it easier to test the driver\non hardware that while not officially validated, works fine\nand is much more commonly available.\n\nBy default (no modparam) the driver will continue to load\nonly on the i7300.\n\nNote that ioat_dma runs a copy of i7300_idle\u0027s probe routine\nto know to reserve an IOAT channel for i7300_idle.\nThis change makes ioat_dma do that always on the i5000,\njust like it does on the i7300.\n\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\nAcked-by: Andrew Henroid \u003candrew.d.henroid@intel.com\u003e\n" }, { "commit": "b787f2e2a37a373a045f4d9b9bed941ccff01663", "tree": "5134f57fde67dd352c8b021b4d9334dd0b2c0583", "parents": [ "2e077f8e8337e52eef3c39c24c31e103b11a0326" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Wed May 13 16:25:57 2009 -0500" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed May 27 13:40:00 2009 -0700" }, "message": "fsldma: Fix compile warnings\n\nWe we build with dma_addr_t as a 64-bit quantity we get:\n\ndrivers/dma/fsldma.c: In function \u0027fsl_chan_xfer_ld_queue\u0027:\ndrivers/dma/fsldma.c:625: warning: cast to pointer from integer of different size\ndrivers/dma/fsldma.c: In function \u0027fsl_dma_chan_do_interrupt\u0027:\ndrivers/dma/fsldma.c:737: warning: cast to pointer from integer of different size\ndrivers/dma/fsldma.c:737: warning: cast to pointer from integer of different size\ndrivers/dma/fsldma.c: In function \u0027of_fsl_dma_probe\u0027:\ndrivers/dma/fsldma.c:927: warning: cast to pointer from integer of different\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "2e077f8e8337e52eef3c39c24c31e103b11a0326", "tree": "686c9965c8304f5b6d59d3538e989674467ee129", "parents": [ "776c8943f2766f2819fafd88fdfbaf418ecd6e41" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Fri May 15 09:59:46 2009 -0700" }, "committer": { "name": "Li Yang", "email": "leoli@freescale.com", "time": "Fri May 22 16:54:42 2009 +0800" }, "message": "fsldma: fix memory leak on error path in fsl_dma_prep_memcpy()\n\nWhen preparing a memcpy operation, if the kernel fails to allocate memory\nfor a link descriptor after the first link descriptor has already been\nallocated, then some memory will never be released. Fix the problem by\nwalking the list of allocated descriptors backwards, and freeing the\nallocated descriptors back into the DMA pool.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\n" }, { "commit": "776c8943f2766f2819fafd88fdfbaf418ecd6e41", "tree": "6309f7faa86f2c0f7b843b9263ccc13bf379ec64", "parents": [ "bcfb7465c03a8c62c89da374677df56f6b894d44" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Fri May 15 11:33:20 2009 -0700" }, "committer": { "name": "Li Yang", "email": "leoli@freescale.com", "time": "Fri May 22 16:53:56 2009 +0800" }, "message": "fsldma: snooping is not enabled for last entry in descriptor chain\n\nOn the 83xx controller, snooping is necessary for the DMA controller to\nensure cache coherence with the CPU when transferring to/from RAM.\n\nThe last descriptor in a chain will always have the End-of-Chain interrupt\nbit set, so we can set the snoop bit while adding the End-of-Chain\ninterrupt bit.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\n" }, { "commit": "bcfb7465c03a8c62c89da374677df56f6b894d44", "tree": "70194cbfab5fb172bcbf7b8443082a721589f04c", "parents": [ "138ef0185177a6d221d24b6aa8f12d867fbbef90" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Fri May 15 14:27:16 2009 -0700" }, "committer": { "name": "Li Yang", "email": "leoli@freescale.com", "time": "Fri May 22 16:51:28 2009 +0800" }, "message": "fsldma: fix infinite loop on multi-descriptor DMA chain completion\n\nWhen creating a DMA transaction with multiple descriptors, the async_tx\ncookie is set to 0 for each descriptor in the chain, excluding the last\ndescriptor, whose cookie is set to -EBUSY.\n\nWhen fsl_dma_tx_submit() is run, it only assigns a cookie to the first\ndescriptor. All of the remaining descriptors keep their original value,\nincluding the last descriptor, which is set to -EBUSY.\n\nAfter the DMA completes, the driver will update the last completed cookie\nto be -EBUSY, which is an error code instead of a valid cookie. This causes\ndma_async_is_complete() to always return DMA_IN_PROGRESS.\n\nThis causes the fsldma driver to never cleanup the queue of link\ndescriptors, and the driver will re-run the DMA transaction on the hardware\neach time it receives the End-of-Chain interrupt. This causes an infinite\nloop.\n\nWith this patch, fsl_dma_tx_submit() is changed to assign a cookie to every\ndescriptor in the chain. The rest of the code then works without problems.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\n" }, { "commit": "138ef0185177a6d221d24b6aa8f12d867fbbef90", "tree": "4a48ab1154b7533dcaac831ff2dad0e10865efa1", "parents": [ "f47edc6dab11801c2e97088ba7bbce042ded867c" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Tue May 19 15:42:13 2009 -0700" }, "committer": { "name": "Li Yang", "email": "leoli@freescale.com", "time": "Fri May 22 16:49:17 2009 +0800" }, "message": "fsldma: fix \"DMA halt timeout!\" errors\n\nWhen using the DMA controller from multiple threads at the same time, it is\npossible to get lots of \"DMA halt timeout!\" errors printed to the kernel\nlog.\n\nThis occurs due to a race between fsl_dma_memcpy_issue_pending() and the\ninterrupt handler, fsl_dma_chan_do_interrupt(). Both call the\nfsl_chan_xfer_ld_queue() function, which does not protect against\nconcurrent accesses to dma_halt() and dma_start().\n\nThe existing spinlock is moved to cover the dma_halt() and dma_start()\nfunctions. Testing shows that the \"DMA halt timeout!\" errors disappear.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\n" }, { "commit": "f47edc6dab11801c2e97088ba7bbce042ded867c", "tree": "99de3f248d23b997813ba0da149359601ed281e1", "parents": [ "0899d6349c60e4021224b51c8c97f49b829dfefd" ], "author": { "name": "Roel Kluin", "email": "roel.kluin@gmail.com", "time": "Fri May 22 16:46:52 2009 +0800" }, "committer": { "name": "Li Yang", "email": "leoli@freescale.com", "time": "Fri May 22 16:46:52 2009 +0800" }, "message": "fsldma: fix check on potential fdev-\u003echan[] overflow\n\nFix the check of potential array overflow when using corrupted channel\ndevice tree nodes.\n\nSigned-off-by: Roel Kluin \u003croel.kluin@gmail.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\n" }, { "commit": "ad567ffb32f067b30606071eb568cf637fe42185", "tree": "0913e4e6cc06dd59a5a8a2367d30a2e46fad649f", "parents": [ "4f005dbe5584fe54c9f6d6d4f0acd3fb29be84da" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Tue May 12 09:16:29 2009 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue May 12 14:41:48 2009 -0700" }, "message": "dma: fix ipu_idmac.c to not discard the last queued buffer\n\nThis also fixes the case of a single queued buffer, for example, when taking a\nsingle frame snapshot with the mx3_camera driver.\n\nReported-by: Agustin Ferrin Pozuelo \u003cgatoguan-os@yahoo.com\u003e\nTested-by: Agustin Ferrin Pozuelo \u003cgatoguan-os@yahoo.com\u003e\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4f005dbe5584fe54c9f6d6d4f0acd3fb29be84da", "tree": "d9a4add9553af6c50fae59a79e9ab217945a7090", "parents": [ "ca50a51e890b0a62b44b5642c1ba5049909e5a8b" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Thu Apr 23 12:31:51 2009 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue May 12 14:41:47 2009 -0700" }, "message": "ioatdma: fix \"ioatdma frees DMA memory with wrong function\"\n\nas reported by Alexander Beregalov \u003ca.beregalov@gmail.com\u003e\n\nioatdma 0000:00:08.0: DMA-API: device driver frees DMA memory with\nwrong function [device address\u003d0x000000007f76f800] [size\u003d2000 bytes]\n[map\nped as single] [unmapped as page]\n\nThe ioatdma driver was unmapping all regions\n(either allocated as page or single) using unmap_page.\nThis patch lets dma driver recognize if unmap_single or unmap_page should be used.\nIt introduces two new dma control flags:\nDMA_COMPL_SRC_UNMAP_SINGLE and DMA_COMPL_DEST_UNMAP_SINGLE.\nThey should be set to indicate dma driver to do dma-unmapping as single\n(first one for the source, tha latter for the destination).\nIf respective flag is not set, the driver assumes dma-unmapping as page.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nReported-by: Alexander Beregalov \u003ca.beregalov@gmail.com\u003e\nTested-by: Alexander Beregalov \u003ca.beregalov@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ca50a51e890b0a62b44b5642c1ba5049909e5a8b", "tree": "d5804f7a5ab5760e996093690654df3a59e9adf8", "parents": [ "c56c81abe7e684bc6203632d807303eb765690dc" ], "author": { "name": "Ben Nizette", "email": "bn@niasdigital.com", "time": "Thu Apr 16 05:54:12 2009 +1000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue May 05 12:16:56 2009 -0700" }, "message": "ipu_idmac: Use disable_irq_nosync() from within irq handlers.\n\ndisable_irq() should wait for all running handlers to complete\nbefore returning. As such, if it\u0027s used to disable an interrupt\nfrom that interrupt\u0027s handler it will deadlock. This replaces\nthe dangerous instances with the _nosync() variant which doesn\u0027t\nhave this problem.\n\nNote the 2 handlers in question are only used #ifdef DEBUG so\nI imagine these code paths don\u0027t get hit often.\n\nSigned-off-by: Ben Nizette \u003cbn@niasdigital.com\u003e\nAcked-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c56c81abe7e684bc6203632d807303eb765690dc", "tree": "463d5d7a89c9627625070e4a829bae44243643d0", "parents": [ "577c9c456f0e1371cbade38eaf91ae8e8a308555" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Apr 08 15:08:23 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Apr 08 15:08:23 2009 -0700" }, "message": "dmatest: fix max channels handling\n\nThe check for reaching max_channels is short circuited by \u0027continuing\u0027\nafter successfully adding a channel.\n\n[ Impact: make the \u0027max_channels\u0027 module parameter actually have an effect ]\n\nCc: \u003cstable@kernel.org\u003e\nReported-by: Dan Carpenter \u003cerror27@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "284901a90a9e0b812ca3f5f852cbbfb60d10249d", "tree": "06c1b5a0f83c90cfb662f756e7781977ce739ce8", "parents": [ "6afd142fd0dfba497246d0fab236c20a7b4bf778" ], "author": { "name": "Yang Hongyang", "email": "yanghy@cn.fujitsu.com", "time": "Mon Apr 06 19:01:15 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 07 08:31:11 2009 -0700" }, "message": "dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)\n\nReplace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)\n\nSigned-off-by: Yang Hongyang\u003cyanghy@cn.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "6a35528a8346f6e6fd32ed7e51f04d1fa4ca2c01", "tree": "9caaf8645b573687bbcf3a16b5aa7dd233fed46e", "parents": [ "8a59f5d2526593c6bc1a0754c3a16ccc9ed41ce3" ], "author": { "name": "Yang Hongyang", "email": "yanghy@cn.fujitsu.com", "time": "Mon Apr 06 19:01:13 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 07 08:31:10 2009 -0700" }, "message": "dma-mapping: replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)\n\nReplace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)\n\nSigned-off-by: Yang Hongyang\u003cyanghy@cn.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "133e2a3164771454aa326859c2b293687189b553", "tree": "4e21f63be087738d7ffe7526d41e15140fc63ff0", "parents": [ "20bec8ab1458c24bed0d5492ee15d87807fc415a", "8c6db1bbf80123839ec87bdd6cb364aea384623d" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Apr 03 12:13:45 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Apr 03 12:13:45 2009 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:\n dma: Add SoF and EoF debugging to ipu_idmac.c, minor cleanup\n dw_dmac: add cyclic API to DW DMA driver\n dmaengine: Add privatecnt to revert DMA_PRIVATE property\n dmatest: add dma interrupts and callbacks\n dmatest: add xor test\n dmaengine: allow dma support for async_tx to be toggled\n async_tx: provide __async_inline for HAS_DMA\u003dn archs\n dmaengine: kill some unused headers\n dmaengine: initialize tx_list in dma_async_tx_descriptor_init\n dma: i.MX31 IPU DMA robustness improvements\n dma: improve section assignment in i.MX31 IPU DMA driver\n dma: ipu_idmac driver cosmetic clean-up\n dmaengine: fail device registration if channel registration fails\n" }, { "commit": "8c6db1bbf80123839ec87bdd6cb364aea384623d", "tree": "848b8d42f093c03a046bd9ae204b360b5174ea28", "parents": [ "d9de451989a88a2003ca06e524aca4665c0c7f06" ], "author": { "name": "Guennadi Liakhovetski", "email": "lg@denx.de", "time": "Thu Apr 02 11:36:58 2009 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 02 16:59:10 2009 -0700" }, "message": "dma: Add SoF and EoF debugging to ipu_idmac.c, minor cleanup\n\nAdd Start-of-Frame and End-of-Frame debugging to ipu_idmac.c, in the\nfuture it might also be needed for the actual video processing in\nmx3-camera, at which point, the ISRs will have to be transferred to\nmx3_camera.c, for which ipu_irq_map() and ipu_irq_unmap() functions will\nhave to be exported.\n\nAlso simplify a couple of pointer-dereferences.\n\nSigned-off-by: Guennadi Liakhovetski \u003clg@denx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d9de451989a88a2003ca06e524aca4665c0c7f06", "tree": "a926d4ff1b73da88d5112324611a579a94e28095", "parents": [ "0f571515c332e00b3515dbe0859ceaa30ab66e00" ], "author": { "name": "Hans-Christian Egtvedt", "email": "hans-christian.egtvedt@atmel.com", "time": "Wed Apr 01 15:47:02 2009 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Apr 01 15:42:34 2009 -0700" }, "message": "dw_dmac: add cyclic API to DW DMA driver\n\nThis patch adds a cyclic DMA interface to the DW DMA driver. This is\nvery useful if you want to use the DMA controller in combination with a\nsound device which uses cyclic buffers.\n\nUsing a DMA channel for cyclic DMA will disable the possibility to use\nit as a normal DMA engine until the user calls the cyclic free function\non the DMA channel. Also a cyclic DMA list can not be prepared if the\nchannel is already active.\n\nSigned-off-by: Hans-Christian Egtvedt \u003chans-christian.egtvedt@atmel.com\u003e\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ed40d0c472b136682b2fcba05f89762859c7374f", "tree": "076b83a26bcd63d6158463735dd34c10bbc591dc", "parents": [ "9e495834e59ca9b29f1a1f63b9f5533bb022ac49", "5d80f8e5a9dc9c9a94d4aeaa567e219a808b8a4a" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Mar 28 20:29:51 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Mar 28 20:29:51 2009 +0000" }, "message": "Merge branch \u0027origin\u0027 into devel\n\nConflicts:\n\tsound/soc/pxa/pxa2xx-i2s.c\n" }, { "commit": "0f571515c332e00b3515dbe0859ceaa30ab66e00", "tree": "6d67c555714264dda749e387cee6738f770abc5d", "parents": [ "e44e0aa3cfa97cddff01704751a4b25151830c72" ], "author": { "name": "Atsushi Nemoto", "email": "anemo@mba.ocn.ne.jp", "time": "Fri Mar 06 20:07:14 2009 +0900" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Mar 26 09:48:09 2009 -0700" }, "message": "dmaengine: Add privatecnt to revert DMA_PRIVATE property\n\nCurrently dma_request_channel() set DMA_PRIVATE capability but never\nclear it. So if a public channel was once grabbed by\ndma_request_channel(), the device stay PRIVATE forever. Add\nprivatecnt member to dma_device to correctly revert it.\n\n[lg@denx.de: fix bad usage of \u0027chan\u0027 in dma_async_device_register]\nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e44e0aa3cfa97cddff01704751a4b25151830c72", "tree": "9d876e5e47813101a4fc125831e0188664c486e0", "parents": [ "b54d5cb9156868fb4f27ccd46a3afb0bf3ef8e0c" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:25 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:25 2009 -0700" }, "message": "dmatest: add dma interrupts and callbacks\n\nUse the callback infrastructure to report driver/hardware hangs or\nmissed interrupts. Since this makes the test threads much more\naggressive (from: explicit 1ms sleep to: wait_for_completion) we set the\nnice value to 10 so as to not swamp legitimate tasks.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b54d5cb9156868fb4f27ccd46a3afb0bf3ef8e0c", "tree": "e825eb374b73240180d33b34be8ab10d6dffbd1a", "parents": [ "729b5d1b8ec72c28e99840b3f300ba67726e3ab9" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:25 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:25 2009 -0700" }, "message": "dmatest: add xor test\n\nExtend dmatest to launch a thread per supported operation type and add\nan xor test.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "729b5d1b8ec72c28e99840b3f300ba67726e3ab9", "tree": "8eac6444ea80bf05f461eb77243f56b008ee5083", "parents": [ "06164f3194e01ea4c76941ac60f541d656c8975f" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:25 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:25 2009 -0700" }, "message": "dmaengine: allow dma support for async_tx to be toggled\n\nProvide a config option for blocking the allocation of dma channels to\nthe async_tx api.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ccccce229c633a92c42cd1a40c0738d7b0d12644", "tree": "a954537ae73f2e03c4431b244796cdc255af7a10", "parents": [ "8d47bae004f062630f69f7f83d098424252e232d" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:24 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:24 2009 -0700" }, "message": "dmaengine: initialize tx_list in dma_async_tx_descriptor_init\n\nCentralize this common initialization (and one case where ipu_idmac is\nduplicating -\u003echan initialization).\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "8d47bae004f062630f69f7f83d098424252e232d", "tree": "68379790587eef10926d029ffce74b763175b10c", "parents": [ "234f2df56f5b05756c444edc9879145deddf69f4" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed Mar 25 09:13:24 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:24 2009 -0700" }, "message": "dma: i.MX31 IPU DMA robustness improvements\n\nAdd DMA error handling to the ISR, move common code fragments to functions, fix\nscatter-gather element queuing in the ISR, survive channel freeing and\nre-allocation in a quick succession.\n\nSigned-off-by: Guennadi Liakhovetski \u003clg@denx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "234f2df56f5b05756c444edc9879145deddf69f4", "tree": "6946d1561e3243cbb4046652d1d70b647bb7947d", "parents": [ "0149f7d5dc66dcffbb044ba005a5378a5864d2a3" ], "author": { "name": "Guennadi Liakhovetski", "email": "lg@denx.de", "time": "Wed Mar 25 09:13:24 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:24 2009 -0700" }, "message": "dma: improve section assignment in i.MX31 IPU DMA driver\n\nThe i.MX31 IPU DMA driver is a platform driver, but doesn\u0027t need hotplug, so we\ncan use __init and __exit function attributes.\n\nSigned-off-by: Guennadi Liakhovetski \u003clg@denx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0149f7d5dc66dcffbb044ba005a5378a5864d2a3", "tree": "9ba399f0c71d62d23563d74308a58cc7eb5baf62", "parents": [ "257b17ca030387cb17314cd1851507bdd1b4ddd5" ], "author": { "name": "Guennadi Liakhovetski", "email": "lg@denx.de", "time": "Wed Mar 25 09:13:23 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:23 2009 -0700" }, "message": "dma: ipu_idmac driver cosmetic clean-up\n\nRemove superfluous semicolons, update comments.\n\nSigned-off-by: Guennadi Liakhovetski \u003clg@denx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "257b17ca030387cb17314cd1851507bdd1b4ddd5", "tree": "74f88050ecfb70e6370399bc8b34843b22472f85", "parents": [ "041b62374c7fedc11a8a1eeda2868612d3d1436c" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:23 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 25 09:13:23 2009 -0700" }, "message": "dmaengine: fail device registration if channel registration fails\n\nAtsushi points out:\n\"If alloc_percpu or kzalloc failed, chan_id does not match with its\nposition in device-\u003echannels list.\n\nAnd above \"continue\" looks buggy anyway. Keeping incomplete channels\nin device-\u003echannels list looks very dangerous...\"\n\nAlso, fix up leakage of idr_ref in the idr_pre_get() and channel init\nfail cases.\n\nReported-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "dfbc90196dfb9a814e7f2e1f4c47aa425452d313", "tree": "11a043a2eb0993fd449a7def4447f14c9bdbf566", "parents": [ "9591463af7ea3a2d723c7e39c08aa05ad27e7bfc" ], "author": { "name": "Kay Sievers", "email": "kay.sievers@vrfy.org", "time": "Tue Mar 24 16:38:22 2009 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Mar 24 16:38:22 2009 -0700" }, "message": "dma: struct device - replace bus_id with dev_name(), dev_set_name()\n\nCc: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\n" }, { "commit": "9eb2eb8c40ffd30da322648c4415bae0288eb167", "tree": "b2402fd33314e4a78d11d8429c86ffe15cac8d4c", "parents": [ "9a51157bab06ab54d6ee442e34fe9574ff14c8c3" ], "author": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Wed Feb 18 11:55:33 2009 +0100" }, "committer": { "name": "Sascha Hauer", "email": "s.hauer@pengutronix.de", "time": "Fri Mar 13 10:34:32 2009 +0100" }, "message": "MX31 clkdev support\n\nThis patch adds clkdev support for i.MX31. This is done in a\nsimilar way done previously for i.MX27\n\nSigned-off-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\n" }, { "commit": "5dc18f51a2c06ddab708184e30b7967fb71c1784", "tree": "b080f2a651f694f523491487bf92d28c3c63d981", "parents": [ "fd6ec5f3acfe7e94469d83374b83ff183953fa45", "7cbd4877e5b167b56a3d6033b926a9f925186e12" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 08 10:23:05 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 08 10:23:05 2009 -0700" }, "message": "Merge branch \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:\n dmatest: fix use after free in dmatest_exit\n ipu_idmac: fix spinlock type\n iop-adma, mv_xor: fix mem leak on self-test setup failure\n fsldma: fix off by one in dma_halt\n I/OAT: fail self-test if callback test reaches timeout\n I/OAT: update driver version and copyright dates\n I/OAT: list usage cleanup\n I/OAT: set tcp_dma_copybreak to 256k for I/OAT ver.3\n I/OAT: cancel watchdog before dma remove\n I/OAT: fail initialization on zero channels detection\n I/OAT: do not set DCACTRL_CMPL_WRITE_ENABLE for I/OAT ver.3\n I/OAT: add verification for proper APICID_TAG_MAP setting by BIOS\n dmaengine: update kerneldoc\n" }, { "commit": "7cbd4877e5b167b56a3d6033b926a9f925186e12", "tree": "03dbe000fa5086d07df0fcae8d9ac1534bd3d239", "parents": [ "c74ef1f867d18171c8617519ee5fe40b02903934" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:06:03 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:06:03 2009 -0700" }, "message": "dmatest: fix use after free in dmatest_exit\n\ndmatest_cleanup_chanel will free dtc, so grab -\u003echan before it goes away\nand use it to do the release.\n\nReported-by: Thierry Reding \u003cthierry.reding@avionic-design.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c74ef1f867d18171c8617519ee5fe40b02903934", "tree": "35aacfe4325ecf38bea4ec484444fc4b04d66b6d", "parents": [ "a09b09ae51ace43d28cd9bc1c8bb97986f2b55a6" ], "author": { "name": "Luotao Fu", "email": "l.fu@pengutronix.de", "time": "Thu Feb 26 12:29:20 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:41 2009 -0700" }, "message": "ipu_idmac: fix spinlock type\n\nfix a probably accidently dropped reference operator while calling\nspin_unlock_restore to an ipu lock.\n\nSigned-off-by: Luotao Fu \u003cl.fu@pengutronix.de\u003e\nCc: Guennadi Liakhovetski \u003clg@denx.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "a09b09ae51ace43d28cd9bc1c8bb97986f2b55a6", "tree": "a70862b01fc038b92067faf13f623ce5b9492105", "parents": [ "900325a6ce33995688b7a680a34e7698f16f4d72" ], "author": { "name": "Roel Kluin", "email": "roel.kluin@gmail.com", "time": "Wed Feb 25 13:56:21 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:40 2009 -0700" }, "message": "iop-adma, mv_xor: fix mem leak on self-test setup failure\n\niop_adma_zero_sum_self_test has the brackets in the wrong place for the\nsetup failure deallocation path. This error was duplicated in\nmv_xor_xor_self_test.\n\nSigned-off-by: Roel Kluin \u003croel.kluin@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "900325a6ce33995688b7a680a34e7698f16f4d72", "tree": "8684bc969f3c355307bec56a0c55ad50a1094c0e", "parents": [ "0c33e1ca3d80647f2e72e44524fd21e79214da20" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Mar 02 15:33:46 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:40 2009 -0700" }, "message": "fsldma: fix off by one in dma_halt\n\nPrevent dev_err from firing even if we successfully detected \u0027dma-idle\u0027\nbefore the full 1ms timeout has elapsed.\n\nAcked-by: Roel Kluin \u003croel.kluin@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "0c33e1ca3d80647f2e72e44524fd21e79214da20", "tree": "672be83761daef7e927ab6479c7bfa4986b12fbf", "parents": [ "211a22ce08dbb27eb1a66df8a4bdae5e96092bc8" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Mar 02 13:31:35 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:40 2009 -0700" }, "message": "I/OAT: fail self-test if callback test reaches timeout\n\nIf we miss interrupts in the self test then fail registration of this\nchannel as it is unsuitable for use as a public channel.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "211a22ce08dbb27eb1a66df8a4bdae5e96092bc8", "tree": "34391f0ab37094ff7651f5c5a884ae42ca34004e", "parents": [ "aa2d0b8b97efa1033609ca89b9faa5d3a1232959" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Thu Feb 26 11:05:43 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:40 2009 -0700" }, "message": "I/OAT: update driver version and copyright dates\n\nTogether with new fixes update driver version\nand extend copyright dates ranges.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "aa2d0b8b97efa1033609ca89b9faa5d3a1232959", "tree": "b7fd99a540a30d8a81df75718ebdd9a16997e964", "parents": [ "5de22343b2303b278ab562e5d166ffe306566d30" ], "author": { "name": "Eric Sesterhenn", "email": "snakebyte@gmx.de", "time": "Thu Feb 26 11:05:30 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:40 2009 -0700" }, "message": "I/OAT: list usage cleanup\n\nTrivial cleanup, list_del(); list_add_tail() is equivalent\nto list_move_tail(). Semantic patch for coccinelle can be\nfound at www.cccmz.de/~snakebyte/list_move_tail.spatch\n\nSigned-off-by: Eric Sesterhenn \u003csnakebyte@gmx.de\u003e\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5de22343b2303b278ab562e5d166ffe306566d30", "tree": "6c48b83e1dc60afb6d22d3afc74058bbcfaa87d7", "parents": [ "2b8a6bf896ef47cc7d84c503079cc7b99789f9fa" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Thu Feb 26 11:05:17 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:40 2009 -0700" }, "message": "I/OAT: set tcp_dma_copybreak to 256k for I/OAT ver.3\n\nUpcoming server platforms from Intel based on the Nehalem performance\nhave significantly improved CPU based copy performance.\nHowever, the DMA engine can still be effective at higher I/O sizes\nfor TCP traffic and at this time copybreak\nshould be set to 256k for TCP traffic only.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "2b8a6bf896ef47cc7d84c503079cc7b99789f9fa", "tree": "2c742bd8b7343d0e57abc7b11fce62d914886228", "parents": [ "8b794b141c633083408d0bfb2229b3406d0ebf99" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Thu Feb 26 11:05:07 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:40 2009 -0700" }, "message": "I/OAT: cancel watchdog before dma remove\n\nChannel watchdog should be canceled before the rest of dma remove stuff.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8b794b141c633083408d0bfb2229b3406d0ebf99", "tree": "767cad4cafccce7c606003088ead281b70477fe3", "parents": [ "ea9c717d0148d4194f9bd04ecfa6b59b20fc0a08" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Thu Feb 26 11:04:54 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:39 2009 -0700" }, "message": "I/OAT: fail initialization on zero channels detection\n\nOn some systems with I/OAT ver.2 when DCA is disabled in BIOS\nsituations have been observed\nthat zero DMA channels are detected instead of four.\nTo avoid kernel panic driver should fail gracefully with appropriate message.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ea9c717d0148d4194f9bd04ecfa6b59b20fc0a08", "tree": "9a7a614443b99c697ec1ad99547167fb79736faa", "parents": [ "49bc46360d68156ce82b2b1a12badb80078453a0" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Thu Feb 26 11:04:38 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:39 2009 -0700" }, "message": "I/OAT: do not set DCACTRL_CMPL_WRITE_ENABLE for I/OAT ver.3\n\nFlag DCACTRL_CMPL_WRITE_ENABLE is valid only for I/OAT ver.2\nso it should not be set for I/OAT ver.3.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "49bc46360d68156ce82b2b1a12badb80078453a0", "tree": "df7f187e26e3443384074376f52e47e516cf1bca", "parents": [ "1d93e52eb48df986a3c4d5ad8a520bf1f6837367" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Thu Feb 26 11:04:23 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 04 16:04:39 2009 -0700" }, "message": "I/OAT: add verification for proper APICID_TAG_MAP setting by BIOS\n\nBIOS versions for systems with I/OAT ver.2 have been found\nwhich fail to program APICID_TAG_MAP for DCA.\nThe ioatdma driver should recognize incorrectly set APICID_TAG_MAP\nand disable DCA in that case.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "bdf602bd737eb07d63d6fa2da826b4751fdf9bab", "tree": "6b5478c009ce41008196abbd26961d352e056bd8", "parents": [ "b57ee99fab25dbc12150fe66fe54dc52bc6de784" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Mar 03 13:43:47 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Mar 03 21:04:04 2009 +0000" }, "message": "[ARM] fix lots of ARM __devexit sillyness\n\n`iop_adma_remove\u0027 referenced in section `.data\u0027 of drivers/built-in.o: defined in discarded section `.devexit.text\u0027 of drivers/built-in.o\n`mv_xor_remove\u0027 referenced in section `.data\u0027 of drivers/built-in.o: defined in discarded section `.devexit.text\u0027 of drivers/built-in.o\n`mv64xxx_i2c_unmap_regs\u0027 referenced in section `.devinit.text\u0027 of drivers/built-in.o: defined in discarded section `.devexit.text\u0027 of drivers/built-in.o\n`mv64xxx_i2c_remove\u0027 referenced in section `.data\u0027 of drivers/built-in.o: defined in discarded section `.devexit.text\u0027 of drivers/built-in.o\n`orion_nand_remove\u0027 referenced in section `.data\u0027 of drivers/built-in.o: defined in discarded section `.devexit.text\u0027 of drivers/built-in.o\n`pxafb_remove\u0027 referenced in section `.data\u0027 of drivers/built-in.o: defined in discarded section `.devexit.text\u0027 of drivers/built-in.o\n\nAcked-by: Uwe Kleine-König \u003cu.kleine-koenig@pengutronix.de\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "287d859222e0adbc67666a6154aaf42d7d5bbb54", "tree": "a3e00f7b42f91c0d00f9d5a8d79414939b3c566f", "parents": [ "9ccf3b5e8409927835c4d38cb2f380c9e4349e76" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Feb 18 14:48:26 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Feb 18 15:37:55 2009 -0800" }, "message": "atmel-mci: fix initialization of dma slave data\n\nThe conversion of atmel-mci to dma_request_channel missed the\ninitialization of the channel dma_slave information. The filter_fn passed\nto dma_request_channel is responsible for initializing the channel\u0027s\nprivate data. This implementation has the additional benefit of enabling\na generic client-channel data passing mechanism.\n\nReviewed-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "5296b56d1b2000b60fb966be161c1f8fb629786b", "tree": "18277748caa9ba43610f76a310d34a3b2155e1a5", "parents": [ "ef560682a97491f62ef538931a4861b57d66c52c" ], "author": { "name": "Guennadi Liakhovetski", "email": "lg@denx.de", "time": "Mon Jan 19 15:36:21 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 19 15:36:21 2009 -0700" }, "message": "i.MX31: Image Processing Unit DMA and IRQ drivers\n\ni.MX3x SoCs contain an Image Processing Unit, consisting of a Control\nModule (CM), Display Interface (DI), Synchronous Display Controller (SDC),\nAsynchronous Display Controller (ADC), Image Converter (IC), Post-Filter\n(PF), Camera Sensor Interface (CSI), and an Image DMA Controller (IDMAC).\nCM contains, among other blocks, an Interrupt Generator (IG) and a Clock\nand Reset Control Unit (CRCU). This driver serves IDMAC and IG. They are\nsupported over dmaengine and irq-chip APIs respectively.\n\nIDMAC is a specialised DMA controller, its DMA channels cannot be used for\ngeneral-purpose operations, even though it might be possible to configure\na memory-to-memory channel for memcpy operation. This driver will not work\nwith generic dmaengine clients, clients, wishing to use it must use\nrespective wrapper structures, they also must specify which channels they\nrequire, as channels are hard-wired to specific IPU functions.\n\nAcked-by: Sascha Hauer \u003cs.hauer@pengutronix.de\u003e\nSigned-off-by: Guennadi Liakhovetski \u003clg@denx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "83436a0560e9ef8af2f0796264dde4bed1415359", "tree": "ec195673813725fbfc49c6e56689682b162f42d4", "parents": [ "169d5f663759ec494aa74a552ce99486235e6e50" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 19 14:39:10 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 19 14:39:10 2009 -0700" }, "message": "dmaengine: kill some dubious WARN_ONCEs\n\ndma_find_channel and dma_issue_pending_all are good places to warn about\nimproper api usage. However, warning correctly means synchronizing with\ndma_list_mutex, i.e. too much overhead for these fast-path calls.\n\nReported-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "169d5f663759ec494aa74a552ce99486235e6e50", "tree": "af5947b705412c99a7f24d9f26104a6ee1132605", "parents": [ "6782dfe44acedf1e583d84e9e0d4f966d8e9befa" ], "author": { "name": "Peter Korsgaard", "email": "jacmet@sunsite.dk", "time": "Wed Jan 14 22:33:31 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Jan 15 23:50:22 2009 -0700" }, "message": "fsldma: print correct IRQ on mpc83xx\n\nThe mpc83xx variant uses a shared IRQ for all channels, so the individual\nchannel nodes don\u0027t have an interrupt property. Fix the code to print the\ncontroller IRQ instead if there isn\u0027t any for the channel.\n\nAcked-by: Timur Tabi \u003ctimur@freescale.com\u003e\nAcked-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Peter Korsgaard \u003cjacmet@sunsite.dk\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "6782dfe44acedf1e583d84e9e0d4f966d8e9befa", "tree": "508ec1430f22f8b099231b8c8bcd8ef26c940d8b", "parents": [ "d86be86e9aab221089d72399072511f13fe2a771" ], "author": { "name": "Peter Korsgaard", "email": "jacmet@sunsite.dk", "time": "Wed Jan 14 22:32:58 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Jan 14 22:32:58 2009 -0700" }, "message": "fsldma: check for NO_IRQ in fsl_dma_chan_remove()\n\nThere\u0027s no per-channel IRQ on mpc83xx, so only call free_irq if we have one.\n\nAcked-by: Timur Tabi \u003ctimur@freescale.com\u003e\nAcked-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Peter Korsgaard \u003cjacmet@sunsite.dk\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d86be86e9aab221089d72399072511f13fe2a771", "tree": "58da7322d8dfa58da5f03c117481df8ab93b7311", "parents": [ "6527de6d6d25ebfae7c7572cb7a4ed768e2e20a5" ], "author": { "name": "Atsushi Nemoto", "email": "anemo@mba.ocn.ne.jp", "time": "Tue Jan 13 09:22:20 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 13 09:22:20 2009 -0700" }, "message": "dmatest: Use custom map/unmap for destination buffer\n\nThe dmatest driver should use DMA_BIDIRECTIONAL on the destination buffer\nto ensure that the poison values are written to RAM and not just written\nto cache and discarded.\n\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6527de6d6d25ebfae7c7572cb7a4ed768e2e20a5", "tree": "65d5a2abb226808f9135dda8f9affb6ae8aa4e01", "parents": [ "dd59b8537f6cb53ab863fafad86a5828f1e889a2" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 12 15:18:34 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 12 15:20:42 2009 -0700" }, "message": "fsldma: use a valid \u0027device\u0027 for dma_pool_create\n\nThe dmaengine sysfs implementation was fixed to support proper\nlifetime rules which means that the current:\n\nnew_fsl_chan-\u003edev \u003d \u0026new_fsl_chan-\u003ecommon.dev-\u003edevice;\n\n...retrieves a NULL pointer because new_fsl_chan-\u003ecommon.dev has not\nbeen allocated at this point. So, set new_fsl_chan-\u003edev to a valid\ndevice.\n\nCc: Li Yang \u003cleoli@freescale.com\u003e\nCc: Zhang Wei \u003czw@zh-kernel.org\u003e\nReported-by: Ira Snyder \u003ciws@ovro.caltech.edu\u003e\nTested-by: Ira Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "dd59b8537f6cb53ab863fafad86a5828f1e889a2", "tree": "a1236a8042583813fc7b9e32688b9bc6e7858ea0", "parents": [ "c59765042f53a79a7a65585042ff463b69cb248c" ], "author": { "name": "Yuri Tikhonov", "email": "yur@emcraft.com", "time": "Mon Jan 12 15:17:20 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 12 15:19:29 2009 -0700" }, "message": "dmaengine: fix dependency chaining\n\nIn dmaengine we track the dependencies between the descriptors\nusing the \u0027next\u0027 pointers of the structure. These pointers are\nset to NULL as soon as the corresponding descriptor has been\nsubmitted to the channel (in dma_run_dependencies()).\n\nBut, the first \u0027next\u0027 in chain is still remaining set, regardless\nthe fact, that tx-\u003enext has been already submitted. This may lead to\nmultiple submissions of the same descriptor. This patch fixes this.\n\nActually, some previous implementation of the xxx_run_dependencies()\nfunction already had this fix in place. The fdb..0eaf3 commit, beside the\ncorrect things, broke this.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Yuri Tikhonov \u003cyur@emcraft.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b9bdcbba010c2e49c8f837ea7a49fe006b636f41", "tree": "030af2c964995a691d33aab19c8f07b04c5c3437", "parents": [ "652afc27b26859a0ea5f6db681d80b83d2c43cf8" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:22 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:22 2009 -0700" }, "message": "ioat: fix self test for multi-channel case\n\nIn the multiple device case we need to re-arm the completion and protect\nagainst concurrent self-tests. The printk from the test callback is\nremoved as it can arbitrarily delay completion of the test.\n\nCc: \u003cstable@kernel.org\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "652afc27b26859a0ea5f6db681d80b83d2c43cf8", "tree": "fc314e981f67470ebca307548d4cd420da717298", "parents": [ "e2346677af86150c6083974585c131e8a2c3ddcc" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:22 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:22 2009 -0700" }, "message": "dmaengine: bump initcall level to arch_initcall\n\nThere are dmaengine users that would like to register dma devices at\nsubsys_initcall time to ensure channels are available by device_initcall\ntime.\n\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nCc: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nCc: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n\n" }, { "commit": "e2346677af86150c6083974585c131e8a2c3ddcc", "tree": "2205b224c4e961ad59dc684fb4db835aaf9515a0", "parents": [ "864498aaa9fef69ee166da023d12413a7776342d" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:21 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:21 2009 -0700" }, "message": "dmaengine: advertise all channels on a device to dma_filter_fn\n\nAllow dma_filter_fn routines to disambiguate multiple channels on a device\nrather than assuming that all channels on a device are equal.\n\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nReported-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n\n" }, { "commit": "864498aaa9fef69ee166da023d12413a7776342d", "tree": "023d6bfc15ba192c1a92caab3ff7525a84e409fc", "parents": [ "41d5e59c1299f27983977bcfe3b360600996051c" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:21 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:21 2009 -0700" }, "message": "dmaengine: use idr for registering dma device numbers\n\nThis brings some predictability to dma device numbers, i.e. an rmmod/insmod\ncycle may now result in /sys/class/dma/dma0chan0 being restored rather than\n/sys/class/dma/dma1chan0 appearing.\n\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n\n" }, { "commit": "41d5e59c1299f27983977bcfe3b360600996051c", "tree": "f0e80b6fea3af04f266843af97f433198ad535c7", "parents": [ "4fac7fa57cf8001be259688468c825f836daf739" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:21 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:21 2009 -0700" }, "message": "dmaengine: add a release for dma class devices and dependent infrastructure\n\nResolves:\nWARNING: at drivers/base/core.c:122 device_release+0x4d/0x52()\nDevice \u0027dma0chan0\u0027 does not have a release() function, it is broken and must be fixed.\n\nThe dma_chan_dev object is introduced to gear-match sysfs kobject and\ndmaengine channel lifetimes. When a channel is removed access to the\nsysfs entries return -ENODEV until the kobject can be released.\n\nThe bulk of the change is updates to existing code to handle the extra\nlayer of indirection between a dma_chan and its struct device.\n\nReported-by: Alexander Beregalov \u003ca.beregalov@gmail.com\u003e\nAcked-by: Stephen Hemminger \u003cshemminger@vyatta.com\u003e\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n\n" }, { "commit": "4fac7fa57cf8001be259688468c825f836daf739", "tree": "e59ab78a86f0599416b6255569d41d2ecc0d5512", "parents": [ "630738b9a52bee40cba685f4ff43fbbc28f2e1ff" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:20 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:20 2009 -0700" }, "message": "ioat: do not perform removal actions at shutdown\n\nUnregistering services should only happen at \"remove\" time. This prevents\nthe device from being unregistered while dmaengine clients are still\nactive. Also, the comment on ioat_remove is stale since removal is prevented\nwhile a channel may be in use.\n\nReported-by: Alexander Beregalov \u003ca.beregalov@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "630738b9a52bee40cba685f4ff43fbbc28f2e1ff", "tree": "c90ac1fe356e6cdcfc332a2217246e0f319fcadc", "parents": [ "0d603f611d6515049fbceb0267ded43c33b95451" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:20 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:20 2009 -0700" }, "message": "iop-adma: enable module removal\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "0d603f611d6515049fbceb0267ded43c33b95451", "tree": "6d5468c0b0a07f100e9cbbb901fd840ebe91b89d", "parents": [ "f38822033d9eafd8a7b12dd7ad6dea26480ba339" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:20 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:20 2009 -0700" }, "message": "iop-adma: kill debug BUG_ON\n\nThis BUG_ON caught problems in early development but now it is in the\nway as it invalidly triggers when trying to remove the module.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "f38822033d9eafd8a7b12dd7ad6dea26480ba339", "tree": "b8fb09a98b52a1519a038a9623928de59ec58e7f", "parents": [ "7dd602510128d7a64b11ff3b7d4f30ac8e3946ce" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:19 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:19 2009 -0700" }, "message": "iop-adma: let devm do its job, don\u0027t duplicate free\n\nNo need to free stuff that the devm infrastructure will take care of...\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "7dd602510128d7a64b11ff3b7d4f30ac8e3946ce", "tree": "6a87f942c72b0b02d24db7144cad435211178fcc", "parents": [ "f27c580c3628d79b17f38976d842a6d7f3616e2e" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:19 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:19 2009 -0700" }, "message": "dmaengine: kill enum dma_state_client\n\nDMA_NAK is now useless. We can just use a bool instead.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "f27c580c3628d79b17f38976d842a6d7f3616e2e", "tree": "f1a1a96c1130e7e1c88f75cb5f5aab4c53fe0297", "parents": [ "aa1e6f1a385eb2b04171ec841f3b760091e4a8ee" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:18 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:18 2009 -0700" }, "message": "dmaengine: remove \u0027bigref\u0027 infrastructure\n\nReference counting is done at the module level so clients need not worry\nthat a channel will leave while they are actively using dmaengine.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "aa1e6f1a385eb2b04171ec841f3b760091e4a8ee", "tree": "1401e7f1e867e5d4a769b648605e0317d25d5ccb", "parents": [ "209b84a88fe81341b4d8d465acc4a67cb7c3feb3" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:17 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:17 2009 -0700" }, "message": "dmaengine: kill struct dma_client and supporting infrastructure\n\nAll users have been converted to either the general-purpose allocator,\ndma_find_channel, or dma_request_channel.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n\n" }, { "commit": "209b84a88fe81341b4d8d465acc4a67cb7c3feb3", "tree": "134632ed8c914f0ee497e7a22bc616d84e068119", "parents": [ "74465b4ff9ac1da503025c0a0042e023bfa6505c" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:17 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:17 2009 -0700" }, "message": "dmaengine: replace dma_async_client_register with dmaengine_get\n\nNow that clients no longer need to be notified of channel arrival\ndma_async_client_register can simply increment the dmaengine_ref_count.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "74465b4ff9ac1da503025c0a0042e023bfa6505c", "tree": "ce63f4a4b055b65cae1edaddd334931bf512c76e", "parents": [ "33df8ca068123457db56c316946a3c0e4ef787d6" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:16 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:16 2009 -0700" }, "message": "atmel-mci: convert to dma_request_channel and down-level dma_slave\n\ndma_request_channel provides an exclusive channel, so we no longer need to\npass slave data through dmaengine.\n\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "33df8ca068123457db56c316946a3c0e4ef787d6", "tree": "e594340e903ea3eb8af83906c649eeaf85cbc0b2", "parents": [ "59b5ec21446b9239d706ab237fb261d525b75e81" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:15 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:15 2009 -0700" }, "message": "dmatest: convert to dma_request_channel\n\nReplace the client registration infrastructure with a custom loop to\npoll for channels. Once dma_request_channel returns NULL stop asking\nfor channels. A userspace side effect of this change if that loading\nthe dmatest module before loading a dma driver will result in no\nchannels being found, previously dmatest would get a callback. To\nfacilitate testing in the built-in case dmatest_init is marked as a\nlate_initcall. Another side effect is that channels under test can not\nbe used for any other purpose.\n\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "59b5ec21446b9239d706ab237fb261d525b75e81", "tree": "a437a354e84d311104829ca0e8b00b0ec8cb05c4", "parents": [ "f67b45999205164958de4ec0658d51fa4bee066d" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:15 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:15 2009 -0700" }, "message": "dmaengine: introduce dma_request_channel and private channels\n\nThis interface is primarily for device-to-memory clients which need to\nsearch for dma channels with platform-specific characteristics. The\nprototype is:\n\nstruct dma_chan *dma_request_channel(dma_cap_mask_t mask,\n dma_filter_fn filter_fn,\n void *filter_param);\n\nWhen the optional \u0027filter_fn\u0027 parameter is set to NULL\ndma_request_channel simply returns the first channel that satisfies the\ncapability mask. Otherwise, when the mask parameter is insufficient for\nspecifying the necessary channel, the filter_fn routine can be used to\ndisposition the available channels in the system. The filter_fn routine\nis called once for each free channel in the system. Upon seeing a\nsuitable channel filter_fn returns DMA_ACK which flags that channel to\nbe the return value from dma_request_channel. A channel allocated via\nthis interface is exclusive to the caller, until dma_release_channel()\nis called.\n\nTo ensure that all channels are not consumed by the general-purpose\nallocator the DMA_PRIVATE capability is provided to exclude a dma_device\nfrom general-purpose (memory-to-memory) consideration.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n\n" }, { "commit": "2ba05622b8b143b0c95968ba59bddfbd6d2f2559", "tree": "b7b72d02a993ff2ba731d6608f4ab8ce87482bcb", "parents": [ "bec085134e446577a983f17f57d642a88d1af53b" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:14 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:14 2009 -0700" }, "message": "dmaengine: provide a common \u0027issue_pending_all\u0027 implementation\n\nasync_tx and net_dma each have open-coded versions of issue_pending_all,\nso provide a common routine in dmaengine.\n\nThe implementation needs to walk the global device list, so implement\nrcu to allow dma_issue_pending_all to run lockless. Clients protect\nthemselves from channel removal events by holding a dmaengine reference.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n" }, { "commit": "bec085134e446577a983f17f57d642a88d1af53b", "tree": "7d29afc53fedc72349ee78112fb71f68ff48ce24", "parents": [ "6f49a57aa5a0c6d4e4e27c85f7af6c83325a12d1" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:14 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:14 2009 -0700" }, "message": "dmaengine: centralize channel allocation, introduce dma_find_channel\n\nAllowing multiple clients to each define their own channel allocation\nscheme quickly leads to a pathological situation. For memory-to-memory\noffload all clients can share a central allocator.\n\nThis simply moves the existing async_tx allocator to dmaengine with\nminimal fixups:\n* async_tx.c:get_chan_ref_by_cap --\u003e dmaengine.c:nth_chan\n* async_tx.c:async_tx_rebalance --\u003e dmaengine.c:dma_channel_rebalance\n* split out common code from async_tx.c:__async_tx_find_channel --\u003e\n dma_find_channel\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n" }, { "commit": "6f49a57aa5a0c6d4e4e27c85f7af6c83325a12d1", "tree": "afba24357d1f4ff69ccb2b39a19542546590a50b", "parents": [ "07f2211e4fbce6990722d78c4f04225da9c0e9cf" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:14 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 06 11:38:14 2009 -0700" }, "message": "dmaengine: up-level reference counting to the module level\n\nSimply, if a client wants any dmaengine channel then prevent all dmaengine\nmodules from being removed. Once the clients are done re-enable module\nremoval.\n\nWhy?, beyond reducing complication:\n1/ Tracking reference counts per-transaction in an efficient manner, as\n is currently done, requires a complicated scheme to avoid cache-line\n bouncing effects.\n2/ Per-transaction ref-counting gives the false impression that a\n dma-driver can be gracefully removed ahead of its user (net, md, or\n dma-slave)\n3/ None of the in-tree dma-drivers talk to hot pluggable hardware, but\n if such an engine were built one day we still would not need to notify\n clients of remove events. The driver can simply return NULL to a\n -\u003eprep() request, something that is much easier for a client to handle.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n\n" }, { "commit": "07f2211e4fbce6990722d78c4f04225da9c0e9cf", "tree": "51934e20a334e93c8c399d2e6375f264551e9bc3", "parents": [ "28405d8d9ce05f5bd869ef8b48da5086f9527d73" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 05 17:14:31 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jan 05 18:10:19 2009 -0700" }, "message": "dmaengine: remove dependency on async_tx\n\nasync_tx.ko is a consumer of dma channels. A circular dependency arises\nif modules in drivers/dma rely on common code in async_tx.ko. It\nprevents either module from being unloaded.\n\nMove dma_wait_for_async_tx and async_tx_run_dependencies to dmaeninge.o\nwhere they should have been from the beginning.\n\nReviewed-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "a06d568f7c5e40e34ea64881842deb8f4382babf", "tree": "15b38b4652705b7c58bd89052c81ab91ca94cc4a", "parents": [ "b0b42b16ff2b90f17bc1a4308366c9beba4b276e" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Dec 08 13:46:00 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Dec 08 13:46:00 2008 -0700" }, "message": "async_xor: dma_map destination DMA_BIDIRECTIONAL\n\nMapping the destination multiple times is a misuse of the dma-api.\nSince the destination may be reused as a source, ensure that it is only\nmapped once and that it is mapped bidirectionally. This appears to add\nugliness on the unmap side in that it always reads back the destination\naddress from the descriptor, but gcc can determine that dma_unmap is a\nnop and not emit the code that calculates its arguments.\n\nCc: \u003cstable@kernel.org\u003e\nCc: Saeed Bishara \u003csaeed@marvell.com\u003e\nAcked-by: Yuri Tikhonov \u003cyur@emcraft.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b0b42b16ff2b90f17bc1a4308366c9beba4b276e", "tree": "d9025b46fe5360300ae4e430df3246c67602adad", "parents": [ "532d3b1f86f41834a25373e3ded981d68e4ce17f" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Dec 03 17:17:07 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Dec 03 17:25:36 2008 -0700" }, "message": "dmaengine: protect \u0027id\u0027 from concurrent registrations\n\nThere is a possibility to have two devices registered with the same id.\n\nCc: \u003cstable@kernel.org\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n" }, { "commit": "532d3b1f86f41834a25373e3ded981d68e4ce17f", "tree": "ed025b991fe3efcee1b739faae534e26e20a2a4d", "parents": [ "4ffaf869c7780bbdfc11291e5fd4b61dde662b1c" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Dec 03 17:16:55 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Dec 03 17:16:55 2008 -0700" }, "message": "ioat: wait for self-test completion\n\nAs part of the ioat_dma self-test it performs a printk from a completion\ncallback. Depending on the system console configuration this output can\ntake longer than a millisecond causing the self-test to fail. Introduce a\ncompletion with a generous timeout to mitigate this failure.\n\nCc: \u003cstable@kernel.org\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "06190d8415219d9eef7d8f04b52a109e34575a76", "tree": "f7ac0ca156f5a2341c08417020ebbfc544b0c59b", "parents": [ "65e503814dec83c7b2ac955e75919d009109c919" ], "author": { "name": "Kay Sievers", "email": "kay.sievers@vrfy.org", "time": "Tue Nov 11 13:12:33 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Nov 11 13:12:33 2008 -0700" }, "message": "dmaengine: struct device - replace bus_id with dev_name(), dev_set_name()\n\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "65e503814dec83c7b2ac955e75919d009109c919", "tree": "6cd01ca32ae269760d864d3c1bae94fdb0e95a45", "parents": [ "137cb55c6dcd56cb367285adaf15f808a2a9fec7" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Nov 11 13:12:33 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Nov 11 13:12:33 2008 -0700" }, "message": "iop-adma: use iop_paranoia() for debug BUG_ONs\n\nNow that the critical read back to flush the next descriptor address is\nfixed we can downgrade some BUG_ONs that need only be enabled when testing\nchanges to the driver.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "137cb55c6dcd56cb367285adaf15f808a2a9fec7", "tree": "4828887b960a451d7ab09a4250b472a2a9f97884", "parents": [ "f21f237cf55494c3a4209de323281a3b0528da10" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Nov 11 13:12:33 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Nov 11 13:12:33 2008 -0700" }, "message": "iop-adma: add a dummy read to flush next descriptor update\n\nThe current dummy read references the wrong address allowing the next\ndescriptor address update to linger in the store buffer and get passed\nby an \u0027append\u0027 event.\n\nThis issue was uncovered by the change from strongly-ordered to device\nmemory for the adma registers.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "12ccea24e309d815d058cdc6ee8bf2c4b85f0c5f", "tree": "70dae902b70b6025b21521a91f110e4a89d236a5", "parents": [ "c2c0b4c5434c0a25f7f7796b29155d53805909f5" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Fri Nov 07 01:46:55 2008 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Nov 10 15:01:00 2008 -0800" }, "message": "[3/4] I/OAT: fix async_tx.callback checking\n\nasync_tx.callback should be checked for the first\nnot the last descriptor in the chain.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c2c0b4c5434c0a25f7f7796b29155d53805909f5", "tree": "ea3fb7e114e06c346d95c94ed288fe8b1a8ac95e", "parents": [ "c3d4f44f50b65b0b0290e357f8739cfb3f4bcaca" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Fri Nov 07 01:46:33 2008 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Nov 10 15:00:56 2008 -0800" }, "message": "[2/4] I/OAT: fix dma_pin_iovec_pages() error handling\n\nError handling needs to be modified in dma_pin_iovec_pages().\nIt should return NULL instead of ERR_PTR\n(pinned_list is checked for NULL in tcp_recvmsg() to determine\nif iovec pages have been successfully pinned down).\nIn case of error for the first iovec,\nlocal_list-\u003enr_iovecs needs to be initialized.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c3d4f44f50b65b0b0290e357f8739cfb3f4bcaca", "tree": "ebc00379b3eeb562a1d810e3ca92ff37bd01bc37", "parents": [ "fd0fcf5c29dd0339c5f5d86eb2cbe9fdad5bcd73" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Fri Nov 07 01:45:52 2008 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Nov 10 15:00:51 2008 -0800" }, "message": "[1/4] I/OAT: fix channel resources free for not allocated channels\n\nIf the ioatdma driver is loaded but not used it does not allocate descriptors.\nBefore it frees channel resources it should first be sure\nthat they have been previously allocated.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nTested-by: Tom Picard \u003ctom.s.picard@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "9fb3c5ca3dabe06758c35f790c68e273ed749e19", "tree": "874eb114b57c5b30152e66d601a8e67ed81ec606", "parents": [ "438f8de46bc261b35d84771ae9992cfff3ff4dd8", "f371be6352cdde3df2253b76acb979480e93ce4f" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Oct 25 04:07:44 2008 -0400" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Oct 25 04:07:44 2008 -0400" }, "message": "Merge branch \u0027i7300_idle\u0027 into release\n" }, { "commit": "f371be6352cdde3df2253b76acb979480e93ce4f", "tree": "835cf9fd3b947529de51ab1945fc4c02ba80e374", "parents": [ "33093e186c8f80b443fafb1d347a140bdd2b86c6" ], "author": { "name": "Venki Pallipadi", "email": "venkatesh.pallipadi@intel.com", "time": "Thu Oct 23 15:39:06 2008 -0700" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Fri Oct 24 12:59:47 2008 -0400" }, "message": "i7300_idle: Fix compile warning CONFIG_I7300_IDLE_IOAT_CHANNEL not defined\n\nWhen I7300_idle driver is not configured, there is a compile time\nwarning about IDLE_IOAT_CHANNEL not defined. Fix it.\n\nReported-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nReported-by: Arjan van de Ven \u003carjan@linux.intel.com\u003e\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "3ad0b02e4c1d5feba44b8ff48dccd1ba61a826b0", "tree": "b674d7e805f9f53b2550f81009b5a860e5a4fc47", "parents": [ "27471fdb32e77ecb92f09d4ac5757785b4dc33bc" ], "author": { "name": "Venki Pallipadi", "email": "venkatesh.pallipadi@intel.com", "time": "Wed Oct 22 16:34:52 2008 -0700" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Fri Oct 24 12:54:18 2008 -0400" }, "message": "i7300_idle: Disable ioat channel only on platforms where ile driver can load\n\nBased on input from Andi Kleen:\nshare the platform detection code with ioat_dma and disable the channel in\ndma engine only for specific platforms.\n\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "057316cc6a5b521b332a1d7ccc871cd60c904c74", "tree": "4333e608da237c73ff69b10878025cca96dcb4c8", "parents": [ "3e2dab9a1c2deb03c311eb3f83466009147ed4d3", "2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Wed Oct 22 23:57:26 2008 -0400" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Thu Oct 23 00:11:07 2008 -0400" }, "message": "Merge branch \u0027linus\u0027 into test\n\nConflicts:\n\tMAINTAINERS\n\tarch/x86/kernel/acpi/boot.c\n\tarch/x86/kernel/acpi/sleep.c\n\tdrivers/acpi/Kconfig\n\tdrivers/pnp/Makefile\n\tdrivers/pnp/quirks.c\n\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "27471fdb32e77ecb92f09d4ac5757785b4dc33bc", "tree": "2895d9918c019f48db32d479a2fc9f8725a3ed6e", "parents": [ "c7d87d79d14cecab7a34dedf1b133377cf5a0203" ], "author": { "name": "Andy Henroid", "email": "andrew.d.henroid@intel.com", "time": "Thu Oct 09 11:45:22 2008 -0700" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Tue Oct 21 23:58:41 2008 -0400" }, "message": "i7300_idle driver v1.55\n\nThe Intel 7300 Memory Controller supports dynamic throttling of memory which can\nbe used to save power when system is idle. This driver does the memory\nthrottling when all CPUs are idle on such a system.\n\nRefer to \"Intel 7300 Memory Controller Hub (MCH)\" datasheet\nfor the config space description.\n\nSigned-off-by: Andy Henroid \u003candrew.d.henroid@intel.com\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\n" }, { "commit": "b91385236c00031c64b42b44db8068ad38a5ea11", "tree": "6336f60dad2f548f01125c7237fc239aed38b4fd", "parents": [ "d67ae206ef05198824c2a306c0c0edf2d2088920", "77cd62e8082b9743b59ee1946a4c3ee2e3cd2bce" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 20 12:54:30 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 20 12:54:30 2008 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:\n fsldma: allow Freescale Elo DMA driver to be compiled as a module\n fsldma: remove internal self-test from Freescale Elo DMA driver\n drivers/dma/dmatest.c: switch a GFP_ATOMIC to GFP_KERNEL\n dmatest: properly handle duplicate DMA channels\n drivers/dma/ioat_dma.c: drop code after return\n async_tx: make async_tx_run_dependencies() easier to read\n" }, { "commit": "7fe7b2f4ec14d6517078c5bc32b04301b468041c", "tree": "ded474f209ad27a57bef37c7064985b5a422c1f9", "parents": [ "09b05f5ee04cd2e2af3384d50646f53c76712f10" ], "author": { "name": "Haavard Skinnemoen", "email": "haavard.skinnemoen@atmel.com", "time": "Fri Oct 03 15:23:46 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 03 18:22:18 2008 -0700" }, "message": "dw_dmac: fix copy/paste bug in tasklet\n\nThe tasklet checks RAW.BLOCK twice, and does not check RAW.XFER. This is\nobviously wrong, and could theoretically cause the driver to hang.\n\nReported-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "77cd62e8082b9743b59ee1946a4c3ee2e3cd2bce", "tree": "8fe08914499988f47f51e74395522e5862b0c31d", "parents": [ "59f647c25a4f27c1e5c84710e0608b36303089f9" ], "author": { "name": "Timur Tabi", "email": "timur@freescale.com", "time": "Fri Sep 26 17:00:11 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Sep 26 17:00:11 2008 -0700" }, "message": "fsldma: allow Freescale Elo DMA driver to be compiled as a module\n\nModify the Freescale Elo / Elo Plus DMA driver so that it can be compiled as\na module.\n\nThe primary change is to stop treating the DMA controller as a bus, and the\nDMA channels as devices on the bus. This is because the Open Firmware (OF)\nkernel code does not allow busses to be removed, so although we can call\nof_platform_bus_probe() to probe the DMA channels, there is no\nof_platform_bus_remove(). Instead, the DMA channels are manually probed,\nsimilar to what fsl_elbc_nand.c does.\n\nCc: Scott Wood \u003cscottwood@freescale.com\u003e\nAcked-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "59f647c25a4f27c1e5c84710e0608b36303089f9", "tree": "654f611ff5b8ff98e7233e6a31ececd2af69b7bb", "parents": [ "6fdb8bd47111d3f94be221082b725ec2dec1d5c7" ], "author": { "name": "Timur Tabi", "email": "timur@freescale.com", "time": "Tue Sep 23 15:55:56 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Sep 23 15:55:56 2008 -0700" }, "message": "fsldma: remove internal self-test from Freescale Elo DMA driver\n\nThe Freescale Elo DMA driver runs an internal self-test before registering\nthe channels with the DMA engine. This self-test has a fundemental flaw in\nthat it calls the DMA engine\u0027s callback functions directly before the\nregistration. However, the registration initializes some variables that the\ncallback functions uses, namely the device struct.\n\nThe code works today because there are two device structs: the one created\nby the DMA engine, and one created by the Open Firmware (OF) subsystem. The\nself-test currently uses the device struct created by OF. However, in the\nfuture, some of the device structs created by OF will be eliminated.\nThis means that the self-test will only have access to the device struct\ncreated by the DMA engine. But this device struct isn\u0027t initialized when\nthe self-test runs, and this causes a kernel panic.\n\nSince there is already a DMA test module (dmatest), the internal self-test\ncode is not useful anyway. It is extremely unlikely that the test will fail\nin normal usage. It may have been helpful during development, but not any more.\n\nCc: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nCc: Li Yang \u003cleoli@freescale.com\u003e\nCc: Scott Wood \u003cscottwood@freescale.com\u003e\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6fdb8bd47111d3f94be221082b725ec2dec1d5c7", "tree": "5a63f297bfa423f31c06e9d8d70c7efd6761a79a", "parents": [ "6b3141962dc82cfe1c30afdf91d564b309859cbe" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Fri Sep 19 04:16:23 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Sep 19 04:16:23 2008 -0700" }, "message": "drivers/dma/dmatest.c: switch a GFP_ATOMIC to GFP_KERNEL\n\nIt was needlessly using the unreliable GFP_ATOMIC.\n\nCc: Timur Tabi \u003ctimur@freescale.com\u003e\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6b3141962dc82cfe1c30afdf91d564b309859cbe", "tree": "51a0045ba900f44083fbd2693824414262534dbc", "parents": [ "89f72a0633d1d4f28c4c5c8831ec814523d7671a" ], "author": { "name": "Timur Tabi", "email": "timur@freescale.com", "time": "Fri Sep 19 04:16:19 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Sep 19 04:16:19 2008 -0700" }, "message": "dmatest: properly handle duplicate DMA channels\n\nUpdate the the dmatest driver so that it handles duplicate DMA channels\nproperly.\n\nWhen a DMA client is notified of an available DMA channel, it must check if it\nhas already allocated resources for that channel. If so, it should return\nDMA_DUP. This can happen, for example, if a DMA driver calls\ndma_async_device_register() more than once.\n\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "89f72a0633d1d4f28c4c5c8831ec814523d7671a", "tree": "ae8bb5e8d8e6f718bc54db245f17fe818543b0a7", "parents": [ "fdb0ac80618729e6b12121c66449b8532990eaf3" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Sat Sep 13 20:05:34 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Sep 13 20:05:34 2008 -0700" }, "message": "drivers/dma/ioat_dma.c: drop code after return\n\nThe break after the return serves no purpose.\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nReviewed-by: Richard Genoud \u003crichard.genoud@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "492c71dd545a54dc62df8780bd8d233d771748df", "tree": "73960c90dd47938000478b9b3b1228a8c860e65b", "parents": [ "f0af7245f1725fdc39b32b59c20500448437ddbe", "18365d181fe7fee8b52cd12482200d3a4c48d05e" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Aug 09 18:03:13 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Aug 09 18:03:13 2008 +0100" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.marvell.com/orion\n" }, { "commit": "6f088f1d215be5250582b974f83f0e3aa6ad3a28", "tree": "f79585741cad29fa9fe9202bf830104815335758", "parents": [ "a09e64fbc0094e3073dbb09c3b4bfe4ab669244b" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Sat Aug 09 13:44:58 2008 +0200" }, "committer": { "name": "Lennert Buytenhek", "email": "buytenh@marvell.com", "time": "Sat Aug 09 13:44:58 2008 +0200" }, "message": "[ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/plat\n\nThis patch performs the equivalent include directory shuffle for\nplat-orion, and fixes up all users.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\n" }, { "commit": "49b75b87ce2dfbd99e59a50c3681b154d07e3a22", "tree": "f14e1da19a13d87a512f9043c2f37fd75dd122b3", "parents": [ "f1c7f79b6ab4f7ada002a0fae47f462ede6b6857", "097d9eb537ff4d88b74c3fe67392e27c478ca3c5" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Aug 08 11:38:42 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Aug 08 11:38:42 2008 -0700" }, "message": "Merge branch \u0027for-linus-merged\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027for-linus-merged\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm:\n [ARM] 5177/1: arm/mach-sa1100/Makefile: remove CONFIG_SA1100_USB\n [ARM] 5166/1: magician: add MAINTAINERS entry\n [ARM] fix pnx4008 build errors\n [ARM] Fix SMP booting with non-zero PHYS_OFFSET\n [ARM] 5185/1: Fix spi num_chipselect for lubbock\n [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach\n [ARM] Add support for arch/arm/mach-*/include and arch/arm/plat-*/include\n [ARM] Remove asm/hardware.h, use asm/arch/hardware.h instead\n [ARM] Eliminate useless includes of asm/mach-types.h\n [ARM] Fix circular include dependency with IRQ headers\n avr32: Use \u003cmach/foo.h\u003e instead of \u003casm/arch/foo.h\u003e\n avr32: Introduce arch/avr32/mach-*/include/mach\n avr32: Move include/asm-avr32 to arch/avr32/include/asm\n [ARM] sa1100_wdt: use reset_status to remember watchdog reset status\n [ARM] pxa: introduce reset_status and clear_reset_status for driver\u0027s usage\n [ARM] pxa: introduce reset.h for reset specific header information\n" }, { "commit": "7d283aee50351ec19eaf654a8690d77c4e1dff50", "tree": "8b0079f19db09ecd264cc2e8c428033fe725015f", "parents": [ "e6fce5b916cd7f7f79b2b3e53ba74bbfc1d7cf8b" ], "author": { "name": "Luis R. Rodriguez", "email": "lrodriguez@atheros.com", "time": "Wed Aug 06 15:21:26 2008 -0700" }, "committer": { "name": "John W. Linville", "email": "linville@tuxdriver.com", "time": "Thu Aug 07 09:49:42 2008 -0400" }, "message": "list.h: Add list_splice_tail() and list_splice_tail_init()\n\nIf you are using linked lists for queues list_splice() will not do what\nyou would expect even if you use the elements passed reversed. We need\nto handle these differently. We add list_splice_tail() and\nlist_splice_tail_init().\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nSigned-off-by: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\n" }, { "commit": "a09e64fbc0094e3073dbb09c3b4bfe4ab669244b", "tree": "69689f467179891b498bd7423fcf61925173db31", "parents": [ "a1b81a84fff05dbfef45b7012c26e1fee9973e5d" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Aug 05 16:14:15 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Aug 07 09:55:48 2008 +0100" }, "message": "[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach\n\nThis just leaves include/asm-arm/plat-* to deal with.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7f1b358a236ee9c19657a619ac6f2dcabcaa0924", "tree": "04eade38d4f8da94d7051f51875ed500b49b4756", "parents": [ "16a37acaaf4aaa631ba3f83710ed6cdb1a597520" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Tue Jul 22 17:30:57 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 22 17:30:57 2008 -0700" }, "message": "I/OAT: I/OAT version 3.0 support\n\nThis patch adds to ioatdma and dca modules\nsupport for Intel I/OAT DMA engine ver.3 (aka CB3 device).\nThe main features of I/OAT ver.3 are:\n * 8 single channel DMA devices (8 channels total)\n * 8 DCA providers, each can accept 2 requesters\n * 8-bit TAG values and 32-bit extended APIC IDs\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "16a37acaaf4aaa631ba3f83710ed6cdb1a597520", "tree": "5826c763c70dc6b798c0d12216a80f4596dec284", "parents": [ "09177e85d6a0bffac8b55afd28ed8b82bd873f0b" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Tue Jul 22 17:30:57 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 22 17:30:57 2008 -0700" }, "message": "I/OAT: tcp_dma_copybreak default value dependent on I/OAT version\n\nI/OAT DMA performance tuning showed different optimal values of\ntcp_dma_copybreak for different I/OAT versions (4096 for 1.2 and 2048\nfor 2.0). This patch lets ioatdma driver set tcp_dma_copybreak value\naccording to these results.\n\n[dan.j.williams@intel.com: remove some ifdefs]\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "09177e85d6a0bffac8b55afd28ed8b82bd873f0b", "tree": "ce3cb72509cc6c03bfc5d70a3ca0901a44b87fc0", "parents": [ "2a46fa13d788364c093c4296fe01cae837aa8919" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Tue Jul 22 10:07:33 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 22 10:07:33 2008 -0700" }, "message": "I/OAT: Add watchdog/reset functionality to ioatdma\n\nDue to occasional DMA channel hangs observed for I/OAT versions 1.2 and 2.0\na watchdog has been introduced to check every 2 seconds\nif all channels progress normally.\nIf stuck channel is detected, driver resets it.\nThe reset is done in two parts. The second part is scheduled\nby the first one to reinitialize the channel after the restart.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" } ], "next": "5eb907aaaf7a316a0097ff9f8c21bf9fc468a1f1" }