)]}'
{
  "log": [
    {
      "commit": "1c1452be2e9ae282a7316c3b23987811bd7acda6",
      "tree": "fe7a8d90f8b38e3e49dcf07ed8fc1ff99730c068",
      "parents": [
        "577c9c456f0e1371cbade38eaf91ae8e8a308555"
      ],
      "author": {
        "name": "Jonas Larsson",
        "email": "jonas.larsson@martinsson.se",
        "time": "Tue Mar 31 11:16:48 2009 +0200"
      },
      "committer": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Wed Apr 08 20:47:48 2009 +0200"
      },
      "message": "atmel-mci: Add support for inverted detect pin\n\nSame patch as before, modified to use bool. Also adds description of\nthe new field in struct atmel_mci that I missed in the first patch.\n\nThis patch adds Atmel MCI support for inverted detect pins.\n\nSigned-off-by: Jonas Larsson \u003cjonas.larsson@martinsson.se\u003e\nAcked-by: Pierre Ossman \u003cpierre@ossman.eu\u003e\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\n"
    },
    {
      "commit": "d9e8a3a5b8298a3c814ed37ac5756e6f67b6be41",
      "tree": "ffa1cf8b367b3f32155f6336d7b86b781a368019",
      "parents": [
        "2150edc6c5cf00f7adb54538b9ea2a3e9cedca3f",
        "b9bdcbba010c2e49c8f837ea7a49fe006b636f41"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Jan 09 11:52:14 2009 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Jan 09 11:52:14 2009 -0800"
      },
      "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (22 commits)\n  ioat: fix self test for multi-channel case\n  dmaengine: bump initcall level to arch_initcall\n  dmaengine: advertise all channels on a device to dma_filter_fn\n  dmaengine: use idr for registering dma device numbers\n  dmaengine: add a release for dma class devices and dependent infrastructure\n  ioat: do not perform removal actions at shutdown\n  iop-adma: enable module removal\n  iop-adma: kill debug BUG_ON\n  iop-adma: let devm do its job, don\u0027t duplicate free\n  dmaengine: kill enum dma_state_client\n  dmaengine: remove \u0027bigref\u0027 infrastructure\n  dmaengine: kill struct dma_client and supporting infrastructure\n  dmaengine: replace dma_async_client_register with dmaengine_get\n  atmel-mci: convert to dma_request_channel and down-level dma_slave\n  dmatest: convert to dma_request_channel\n  dmaengine: introduce dma_request_channel and private channels\n  net_dma: convert to dma_find_channel\n  dmaengine: provide a common \u0027issue_pending_all\u0027 implementation\n  dmaengine: centralize channel allocation, introduce dma_find_channel\n  dmaengine: up-level reference counting to the module level\n  ...\n"
    },
    {
      "commit": "c42aa775cc8a8ca558db0cc75979fb8e16667447",
      "tree": "9f340ed1edf38422a2de31c103bebcccae7a4739",
      "parents": [
        "4a6908a3a050aacc9c3a2f36b276b46c0629ad91"
      ],
      "author": {
        "name": "Nicolas Ferre",
        "email": "nicolas.ferre@atmel.com",
        "time": "Thu Nov 20 15:59:12 2008 +0100"
      },
      "committer": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Mon Jan 05 16:35:31 2009 +0100"
      },
      "message": "atmel-mci: move atmel-mci.h file to include/linux\n\nNeeded to use the atmel-mci driver in an architecture\nindependant maner.\n\nSigned-off-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\n"
    },
    {
      "commit": "65e8b083fc8ec303499baa1924ae032d46d29990",
      "tree": "4c3e1b4cb6c18e2abe55e590b75e97edf4243cc7",
      "parents": [
        "965ebf33ea5afb6386f5b57cc71e6572253746b3"
      ],
      "author": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Wed Jul 30 20:29:03 2008 +0200"
      },
      "committer": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Sun Oct 05 20:39:21 2008 +0200"
      },
      "message": "atmel-mci: Add experimental DMA support\n\nThis adds support for DMA transfers through the generic DMA engine\nframework with the DMA slave extensions.\n\nThe driver has been tested using mmc-block and ext3fs on several SD,\nSDHC and MMC+ cards. Reads and writes work fine, with read transfer\nrates up to 7.5 MiB/s on fast cards with debugging disabled.\n\nUnfortunately, the driver has been known to lock up from time to time\nwith DMA enabled, so DMA support is currently optional and marked\nEXPERIMENTAL. However, I didn\u0027t see any problems while testing 13\ndifferent cards (MMC, SD and SDHC of different brands and sizes), so I\nsuspect the \"Initialize BLKR before sending data transfer command\" fix\nthat was posted earlier fixed this as well.\n\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\n"
    },
    {
      "commit": "965ebf33ea5afb6386f5b57cc71e6572253746b3",
      "tree": "a4ee6bdce1a3a9c133c36a5463d12baa089591d9",
      "parents": [
        "6b918657b7431e4c5c953b8222ae2f4fc1b2576a"
      ],
      "author": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Wed Sep 17 20:53:55 2008 +0200"
      },
      "committer": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Sun Oct 05 20:39:21 2008 +0200"
      },
      "message": "atmel-mci: support multiple mmc slots\n\nThe Atmel MCI controller can drive multiple cards through separate sets\nof pins, but only one at a time. This patch adds support for\nmultiplexing access to the controller so that multiple card slots can be\nused as if they were hooked up to separate mmc controllers.\n\nThe atmel-mci driver registers each slot as a separate mmc_host. Both\naccess the same common controller state, but they also have some state\non their own for card detection/write protect handling, and separate\nshadows of the MR and SDCR registers.\n\nWhen one of the slots receives a request from the mmc core, the common\ncontroller state is checked. If it\u0027s idle, the request is submitted\nimmediately. If not, the request is added to a queue. When a request is\ndone, the queue is checked and if there is a queued request, it is\nsubmitted before the completion callback is called.\n\nThis patch also includes a few cleanups and fixes, including a locking\noverhaul. I had to change the locking extensively in any case, so I\nmight as well try to get it right. The driver no longer takes any\nirq-safe locks, which may or may not improve the overall system\nperformance.\n\nThis patch also adds a bit of documentation of the internal data\nstructures.\n\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\n"
    },
    {
      "commit": "6b918657b7431e4c5c953b8222ae2f4fc1b2576a",
      "tree": "bb3bb53d91501064821ea860a490dc1b3633df52",
      "parents": [
        "945533b538c6c6185afc77ba4a81eeba8f6ef8dd"
      ],
      "author": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Thu Aug 07 14:08:49 2008 +0200"
      },
      "committer": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Sun Oct 05 20:39:21 2008 +0200"
      },
      "message": "atmel-mci: Platform code for supporting multiple mmc slots\n\nAdd the necessary platform infrastructure to support multiple mmc/sdcard\nslots all at once through a single controller. Currently, the driver\nwill use the first valid slot it finds and stick with that, but later\npatches will add support for switching between several slots on the fly.\n\nExtend the platform data structure with per-slot information: MMC/SDcard\nbus width and card detect/write protect pins. This will affect the pin\nmuxing as well as the capabilities announced to the mmc core.\n\nNote that board code is now required to supply a mci_platform_data\nstruct to at32_add_device_mci().\n\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\n"
    },
    {
      "commit": "84db8d7cdb072866f5a6c6ac2c9a74c5c48dd22f",
      "tree": "7f10cc33bca606abd1547ae90d90362134a35332",
      "parents": [
        "2b12a4c524812fb3f6ee590a02e65b95c8c32229"
      ],
      "author": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Tue Aug 05 13:35:07 2008 +0200"
      },
      "committer": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Tue Aug 05 13:35:07 2008 +0200"
      },
      "message": "avr32: Move include/asm-avr32 to arch/avr32/include/asm\n\nLeaving include/asm/arch alone for now.\n\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\n"
    },
    {
      "commit": "7d2be0749a59096a334c94dc48f43294193cb8ed",
      "tree": "a14faa58c61071fb548c223268650153b5aa865a",
      "parents": [
        "6d37333163025b46afbcad434ec9a5f2e88e7254"
      ],
      "author": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Mon Jun 30 18:35:03 2008 +0200"
      },
      "committer": {
        "name": "Pierre Ossman",
        "email": "drzeus@drzeus.cx",
        "time": "Tue Jul 15 14:14:49 2008 +0200"
      },
      "message": "atmel-mci: Driver for Atmel on-chip MMC controllers\n\nThis is a driver for the MMC controller on the AP7000 chips from\nAtmel. It should in theory work on AT91 systems too with some\ntweaking, but since the DMA interface is quite different, it\u0027s not\nentirely clear if it\u0027s worth merging this with the at91_mci driver.\n\nThis driver has been around for a while in BSPs and kernel sources\nprovided by Atmel, but this particular version uses the generic DMA\nEngine framework (with the slave extensions) instead of an\navr32-only DMA controller framework.\n\nThis driver can also use PIO transfers when no DMA channels are\navailable, and for transfers where using DMA may be difficult or\nimpractical for some reason (e.g. the DMA setup overhead is usually\nnot worth it for very short transfers, and badly aligned buffers or\nlengths are difficult to handle.)\n\nCurrently, the driver only support PIO transfers. DMA support has been\nsplit out to a separate patch to hopefully make it easier to review.\n\nThe driver has been tested using mmc-block and ext3fs on several SD,\nSDHC and MMC+ cards. Reads and writes work fine, with read transfer\nrates up to 3.5 MiB/s on fast cards with debugging disabled.\n\nThe driver has also been tested using the mmc_test module on the same\ncards. All tests except 7, 9, 15 and 17 succeed. The first two are\nunsupported by all the cards I have, so I don\u0027t know if the driver\nhandles this correctly. The last two fail because the hardware flags a\nData CRC Error instead of a Data Timeout error. I\u0027m not sure how to deal\nwith that.\n\nDocumentation for this controller can be found in many data sheets from\nAtmel, including the AT32AP7000 data sheet which can be found here:\n\nhttp://www.atmel.com/dyn/products/datasheets.asp?family_id\u003d682\n\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Pierre Ossman \u003cdrzeus@drzeus.cx\u003e\n"
    }
  ]
}