)]}' { "log": [ { "commit": "ac0f6f927db539e03e1f3f61bcd4ed57d5cde7a9", "tree": "816e5ac643b15c2050c64a7075f0f7e13d86ea09", "parents": [ "b1bf9368407ae7e89d8a005bb40beb70a41df539", "9f33be2c3a80bdc2cc08342dd77fac87652e0548" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Mar 01 09:15:15 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Mar 01 09:15:15 2010 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits)\n ARM: Eliminate decompressor -Dstatic\u003d PIC hack\n ARM: 5958/1: ARM: U300: fix inverted clk round rate\n ARM: 5956/1: misplaced parentheses\n ARM: 5955/1: ep93xx: move timer defines into core.c and document\n ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c\n ARM: 5953/1: ep93xx: fix broken build of clock.c\n ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig\n ARM: 5949/1: NUC900 add gpio virtual memory map\n ARM: 5948/1: Enable timer0 to time4 clock support for nuc910\n ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk\n ARM: make_coherent(): fix problems with highpte, part 2\n MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself\n ARM: 5945/1: ep93xx: include correct irq.h in core.c\n ARM: 5933/1: amba-pl011: support hardware flow control\n ARM: 5930/1: Add PKMAP area description to memory.txt.\n ARM: 5929/1: Add checks to detect overlap of memory regions.\n ARM: 5928/1: Change type of VMALLOC_END to unsigned long.\n ARM: 5927/1: Make delimiters of DMA area globally visibly.\n ARM: 5926/1: Add \"Virtual kernel memory...\" printout.\n ARM: 5920/1: OMAP4: Enable L2 Cache\n ...\n\nFix up trivial conflict in arch/arm/mach-mx25/clock.c\n" }, { "commit": "9f33be2c3a80bdc2cc08342dd77fac87652e0548", "tree": "7ad6e825427a15c5ec0fc15540abc0429d7f4bce", "parents": [ "2741ecb4ce5c2d430b5c44b0a169038338c21df5", "eed18b5fa4d297c681b00144e8c6942dd35d39a7" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 25 22:10:38 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 25 22:10:38 2010 +0000" }, "message": "Merge branches \u0027clks\u0027 and \u0027pnx\u0027 into devel\n" }, { "commit": "2741ecb4ce5c2d430b5c44b0a169038338c21df5", "tree": "4aa71d7551184ee88f32c7f3660d821133058c32", "parents": [ "bc85e585c6d0fab4bde12d60964b2f25802c3163", "5de813b6cd06460b337f9da9afe316823cf3ef45" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 25 22:09:41 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 25 22:09:41 2010 +0000" }, "message": "Merge branch \u0027misc2\u0027 into devel\n" }, { "commit": "bc85e585c6d0fab4bde12d60964b2f25802c3163", "tree": "80f5fe916e3458d0676e595e3433a0313e7ba72b", "parents": [ "186f93ea1f274f4cde4a356401c1786c818ff881", "796d12959ad374cae8eb77faaf4243455a305433" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 25 22:09:22 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 25 22:09:22 2010 +0000" }, "message": "Merge branch \u0027perf\u0027 into devel\n\nConflicts:\n\tarch/arm/Kconfig\n" }, { "commit": "3560adf62075829393743667ff338dd8fd26a5c2", "tree": "f6359884ab2812401394840142e3c1227844af90", "parents": [ "c9a8fdd8b3ecdcfa3aa40e553c87c5787f5d70e4", "2ef7f3dbd7a70a48c3f09b498df528cb00ea03a4", "2725898fc9bb2121ac0fb1b5e4faf4fc09014729", "1587a373f06ab700004758d6970abb530decef76", "e00d9d4b1796dae3adf6e39c9a766e760dd1c796", "6d636c68e9253fb641c325052bcf9ba513a58ed3", "2ffe2da3e71652d4f4cae19539b5c78c2a239136", "cd71f8f48eda141404db78f7b01902ba3f9ab477", "ae1402022edbeef3991f1e4bae8fa99558be291b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 25 22:06:43 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Feb 25 22:06:43 2010 +0000" }, "message": "Merge branches \u0027at91\u0027, \u0027cache\u0027, \u0027cup\u0027, \u0027ep93xx\u0027, \u0027ixp4xx\u0027, \u0027nuc\u0027, \u0027pending-dma-streaming\u0027, \u0027u300\u0027 and \u0027umc\u0027 into devel\n" }, { "commit": "d6d502fa4be1acd01971476fc732c95a4da16d90", "tree": "d6c5118046c02f489765bebc4f7c8be71e8375a2", "parents": [ "3b43816f685fc6c2531f43514662f796f4601ffc" ], "author": { "name": "Kukjin Kim", "email": "kgene.kim@samsung.com", "time": "Mon Feb 22 00:02:59 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Feb 24 21:07:22 2010 +0000" }, "message": "ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig\n\nAdd ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with\nL1 cache lines which are 64bytes to indicate this without having to\nalter the arch/arm/mm/Kconfig entry each time.\n\nUpdate the mm Kconfig so that ARM_L1_CACHE_SHIFT default value\nuses this and change OMAP3 and S5PC1XX to select ARM_L1_CACHE_SHIFT_6.\n\nAcked-by: Ben Dooks \u003cben-linux@fluff.org\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Kukjin Kim \u003ckgene.kim@samsung.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ae1402022edbeef3991f1e4bae8fa99558be291b", "tree": "92d0c34f87ca4174a17d8fae1ac6bcdcd032fddc", "parents": [ "4b3073e1c53a256275f1079c0fbfbe85883d9275" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:43:57 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Feb 20 16:42:51 2010 +0000" }, "message": "ARM: make_coherent(): fix problems with highpte, part 2\n\nupdate_mmu_cache() is called with the page table for the faulted-in\npage still mapped. We need to modify the PTE for this page to ensure\ncoherency with other shared mappings when multiple shared mappings\nexist within a MM.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4b3073e1c53a256275f1079c0fbfbe85883d9275", "tree": "a0fa98cb75edbbc58c43bbe38ac4c6da0913ae6d", "parents": [ "ed42acaef1a9d51631a31b55e9ed52d400430492" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:40:18 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Feb 20 16:41:46 2010 +0000" }, "message": "MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself\n\nOn VIVT ARM, when we have multiple shared mappings of the same file\nin the same MM, we need to ensure that we have coherency across all\ncopies. We do this via make_coherent() by making the pages\nuncacheable.\n\nThis used to work fine, until we allowed highmem with highpte - we\nnow have a page table which is mapped as required, and is not available\nfor modification via update_mmu_cache().\n\nRalf Beache suggested getting rid of the PTE value passed to\nupdate_mmu_cache():\n\n On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables\n to construct a pointer to the pte again. Passing a pte_t * is much\n more elegant. Maybe we might even replace the pte argument with the\n pte_t?\n\nBen Herrenschmidt would also like the pte pointer for PowerPC:\n\n Passing the ptep in there is exactly what I want. I want that\n -instead- of the PTE value, because I have issue on some ppc cases,\n for I$/D$ coherency, where set_pte_at() may decide to mask out the\n _PAGE_EXEC.\n\nSo, pass in the mapped page table pointer into update_mmu_cache(), and\nremove the PTE value, updating all implementations and call sites to\nsuit.\n\nIncludes a fix from Stephen Rothwell:\n\n sparc: fix fallout from update_mmu_cache API change\n\n Signed-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\n\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d944d549aa86e08cba080396513234cf048fee1f", "tree": "53d825ec3441de0bddf48ba34304510497e26343", "parents": [ "0fa11802e0dcbd4e211a9310500bf52d701b9c1b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Feb 20 16:13:29 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Feb 20 16:20:49 2010 +0000" }, "message": "ARM: allow alignment fault mode to be configured at kernel boot\n\nSome glibc versions intentionally create lots of alignment faults in\ntheir gconv code, which if not fixed up, results in segfaults during\nboot. This can prevent systems booting properly.\n\nThere is no clear hard-configurable default for this; the desired\ndefault depends on the nature of the userspace which is going to be\nbooted.\n\nSo, provide a way for the alignment fault handler to be configured via\nthe kernel command line.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a183927213df225bd93d21857b6aaafbb95e590d", "tree": "4bda3f0d2f59e3ca9dc92159fe77911c65f78b20", "parents": [ "c931b4f655a1b86c929384e674eb8c31795f3bd7" ], "author": { "name": "Fenkart/Bostandzhyan", "email": "andreas.fenkart@streamunlimited.com", "time": "Sun Feb 07 21:47:58 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:40:33 2010 +0000" }, "message": "ARM: 5929/1: Add checks to detect overlap of memory regions.\n\nTested-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\n\nSigned-off-by: Andreas Fenkart \u003candreas.fenkart@streamunlimited.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c931b4f655a1b86c929384e674eb8c31795f3bd7", "tree": "2787c5ed4bf2918fa6fd96ac0a2a92b43889cf7e", "parents": [ "a7bd08c82e4f74387a39eeebb942712f23967420" ], "author": { "name": "Fenkart/Bostandzhyan", "email": "andreas.fenkart@streamunlimited.com", "time": "Sun Feb 07 21:47:17 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:40:33 2010 +0000" }, "message": "ARM: 5928/1: Change type of VMALLOC_END to unsigned long.\n\nMakes it consistent with VMALLOC_START\n\nTested-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nSigned-off-by: Andreas Fenkart \u003candreas.fenkart@streamunlimited.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "a7bd08c82e4f74387a39eeebb942712f23967420", "tree": "4637930167da99522bcff48e4877bdfa961f13c1", "parents": [ "db9ef1af4879c121c354ad2f653f185f1d50fd89" ], "author": { "name": "Fenkart/Bostandzhyan", "email": "andreas.fenkart@streamunlimited.com", "time": "Sun Feb 07 21:46:33 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:40:32 2010 +0000" }, "message": "ARM: 5927/1: Make delimiters of DMA area globally visibly.\n\nAdds DMA area to \u0027virtual memory map\u0027 startup message\n\nTested-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nSigned-off-by: Andreas Fenkart \u003candreas.fenkart@streamunlimited.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "db9ef1af4879c121c354ad2f653f185f1d50fd89", "tree": "0207d586310e601c7d4666ec84b65f46266e9d50", "parents": [ "22192b37bbeec5d850c233491f3cb7610363ce34" ], "author": { "name": "Fenkart/Bostandzhyan", "email": "andreas.fenkart@streamunlimited.com", "time": "Sun Feb 07 21:45:47 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:40:32 2010 +0000" }, "message": "ARM: 5926/1: Add \"Virtual kernel memory...\" printout.\n\nCode based on parisc and x86_32.\n\nTested-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nSigned-off-by: Andreas Fenkart \u003candreas.fenkart@streamunlimited.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9e65582a8e8715f883a34eea66e0643778ce878d", "tree": "36fd7010f69175fa6296a6eb14ead145c54c16e7", "parents": [ "d309427e792ea750cdd312e7a92cf6047ae44962" ], "author": { "name": "Santosh Shilimkar", "email": "santosh.shilimkar@ti.com", "time": "Thu Feb 04 19:42:42 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:39:55 2010 +0000" }, "message": "ARM: 5919/1: ARM: L2 : Errata 588369: Clean \u0026 Invalidate do not invalidate clean lines\n\nThis patch implements the work-around for the errata 588369.The secure\nAPI is used to alter L2 debug register because of trust-zone.\n\nThis version updated with comments from Russell and Catalin and\ngenerated against 2.6.33-rc6 mainline kernel. Detail\ncomments can be found:\nhttp://www.spinics.net/lists/linux-omap/msg23431.html\n\nSigned-off-by: Woodruff Richard \u003cr-woodruff2@ti.com\u003e\nSigned-off-by: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d309427e792ea750cdd312e7a92cf6047ae44962", "tree": "fa179001f1c54db7800ba8b0faf0b3a6fff54f2b", "parents": [ "424d6b145f863d012c540082d0c1afb5bb4dea48" ], "author": { "name": "Santosh Shilimkar", "email": "santosh.shilimkar@ti.com", "time": "Thu Feb 04 19:37:09 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:39:55 2010 +0000" }, "message": "ARM: 5917/1: OMAP4: Add L2 Cache support\n\nThis patch adds L2 Cache support for OMAP4. External L2 cache\nis used in OMAP4\n\nCC: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "424d6b145f863d012c540082d0c1afb5bb4dea48", "tree": "ea82c3c9770a067591e0a0fe3b4743543ebc90f7", "parents": [ "ad187f956108e1c56b444706212bf08d84c0bee0" ], "author": { "name": "Santosh Shilimkar", "email": "santosh.shilimkar@ti.com", "time": "Thu Feb 04 19:35:06 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:39:54 2010 +0000" }, "message": "ARM: 5916/1: ARM: L2 : Add maintainace by line helper functions\n\nThis patch adds the cache maintainance by line helper functions.\n\nSigned-off-by: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nAcked-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1a28e3d977860dc760909083df625b300f695680", "tree": "5d8cb0da5f5c22a32ad5fb8e38ca4b4f21300d79", "parents": [ "11805bcfa411c816b7c76fc40724be6733c74ffc" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Mon Feb 01 23:30:26 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:39:51 2010 +0000" }, "message": "ARM: 5911/1: ARM: Select CPU_32v6K for CPU_V7 only if ARCH_OMAP2 is not selected\n\nOtherwise the kernel built with both CPU_V6 and CPU_V7 will not\nboot on omap2.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "11805bcfa411c816b7c76fc40724be6733c74ffc", "tree": "09c5c6c91deffb60339f027779521bafa42921ce", "parents": [ "48ab7e09e0a7c00a217f87e4b57dfbee9c603e79" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Jan 26 19:09:42 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:39:51 2010 +0000" }, "message": "ARM: 5905/1: ARM: Global ASID allocation on SMP\n\nThe current ASID allocation algorithm doesn\u0027t ensure the notification\nof the other CPUs when the ASID rolls over. This may lead to two\nprocesses using the same ASID (but different generation) or multiple\nthreads of the same process using different ASIDs.\n\nThis patch adds the broadcasting of the ASID rollover event to the\nother CPUs. To avoid a race on multiple CPUs modifying \"cpu_last_asid\"\nduring the handling of the broadcast, the ASID numbering now starts at\n\"smp_processor_id() + 1\". At rollover, the cpu_last_asid will be set\nto NR_CPUS.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2b0d8c251b8876d530a6bf671eb5425838fa698a", "tree": "f8b85d4ee0f76be6a45738452e91fbbb94602b4c", "parents": [ "e119bfff1f102f8d1505910cd6c09df55c776b43" ], "author": { "name": "Jeremy Kerr", "email": "jeremy.kerr@canonical.com", "time": "Mon Jan 11 23:17:34 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:39:13 2010 +0000" }, "message": "ARM: 5880/1: arm: use generic infrastructure for early params\n\nThe ARM setup code includes its own parser for early params, there\u0027s\nalso one in the generic init code.\n\nThis patch removes __early_init (and related code) from\narch/arm/kernel/setup.c, and changes users to the generic early_init\nmacro instead.\n\nThe generic macro takes a char * argument, rather than char **, so we\nneed to update the parser functions a little.\n\nSigned-off-by: Jeremy Kerr \u003cjeremy.kerr@canonical.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "e119bfff1f102f8d1505910cd6c09df55c776b43", "tree": "9965ed156096521c3106f7451b758d2bf08f0c68", "parents": [ "373b32abf9b33616ad94283461bb2ab49e8371d5" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Jan 10 17:23:29 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:39:12 2010 +0000" }, "message": "ARM: Move creation of /proc/cpu out of alignment.c\n\nAlways creating this directory avoids other users having to jump\nthrough silly hoops when they want to share this directory.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "31aa8fd6fd30b0f36416df7d09619768d26b4332", "tree": "d44a7edc5287cf73df43206712e3736ae9b1de5a", "parents": [ "7284ce6c9f6153d1777df5f310c959724d1bd446" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 11:10:03 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 21:39:11 2010 +0000" }, "message": "ARM: Add caller information to ioremap\n\nThis allows the procfs vmallocinfo file to show who created the ioremap\nregions. Note: __builtin_return_address(0) doesn\u0027t do what\u0027s expected\nif its used in an inline function, so we leave __arm_ioremap callers\nin such places alone.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2ffe2da3e71652d4f4cae19539b5c78c2a239136", "tree": "1b69404360a47369c858e54643bab6836015ddbd", "parents": [ "702b94bff3c50542a6e4ab9a4f4cef093262fe65" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 31 16:52:16 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 15:22:25 2010 +0000" }, "message": "ARM: dma-mapping: fix for speculative prefetching\n\nARMv6 and ARMv7 CPUs can perform speculative prefetching, which makes\nDMA cache coherency handling slightly more interesting. Rather than\nbeing able to rely upon the CPU not accessing the DMA buffer until DMA\nhas completed, we now must expect that the cache could be loaded with\npossibly stale data from the DMA buffer.\n\nWhere DMA involves data being transferred to the device, we clean the\ncache before handing it over for DMA, otherwise we invalidate the buffer\nto get rid of potential writebacks. On DMA Completion, if data was\ntransferred from the device, we invalidate the buffer to get rid of\nany stale speculative prefetches.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nTested-By: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\n" }, { "commit": "702b94bff3c50542a6e4ab9a4f4cef093262fe65", "tree": "2ae468b08de2aeb0e65ab3830c40c7a84dbbdb5e", "parents": [ "a9c9147eb9b1dba0ce567a41897c7773b4d1b0bc" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 26 16:24:19 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 15:22:23 2010 +0000" }, "message": "ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range\n\nThese are now unused, and so can be removed.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nTested-By: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\n" }, { "commit": "a9c9147eb9b1dba0ce567a41897c7773b4d1b0bc", "tree": "178938c909f4717c2e599d6f3de954d7ee8a7f21", "parents": [ "93f1d629e22b08642eb713ad96ac2cb9ade0641c" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 26 16:19:58 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 15:22:20 2010 +0000" }, "message": "ARM: dma-mapping: provide per-cpu type map/unmap functions\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nTested-By: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\n" }, { "commit": "93f1d629e22b08642eb713ad96ac2cb9ade0641c", "tree": "ae7738fd783efd7c71e5669cc84f80d1ff521796", "parents": [ "65af191a0414d0e1145f67c153e1b63d122dfbb4" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 14:41:01 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 15:22:16 2010 +0000" }, "message": "ARM: dma-mapping: simplify dma_cache_maint_page\n\ndma_cache_maint_contiguous is now simple enough to live inside\ndma_cache_maint_page, so move it there.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nTested-By: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\n" }, { "commit": "65af191a0414d0e1145f67c153e1b63d122dfbb4", "tree": "4077978a9089b450cc8584fb68ef4962b3f918f7", "parents": [ "4ea0d7371e808628d11154b0d44140b70f05b998" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:53:33 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 15:22:14 2010 +0000" }, "message": "ARM: dma-mapping: move selection of page ops out of dma_cache_maint_contiguous\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nTested-By: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\n" }, { "commit": "4ea0d7371e808628d11154b0d44140b70f05b998", "tree": "7673b2fc850475a587144a02c9f568a2831f0c2f", "parents": [ "18eabe2347ae7a11b3db768695913724166dfb0e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 16:27:17 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 15:22:11 2010 +0000" }, "message": "ARM: dma-mapping: push buffer ownership down into dma-mapping.c\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nTested-By: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\n" }, { "commit": "18eabe2347ae7a11b3db768695913724166dfb0e", "tree": "2f6a9bb654d01e07a62be75adc1282e97b5c16d4", "parents": [ "bf32eb85492af197ea5ff20e0be56f667a80584d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 31 16:52:16 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Feb 15 15:21:43 2010 +0000" }, "message": "ARM: dma-mapping: introduce the idea of buffer ownership\n\nThe DMA API has the notion of buffer ownership; make it explicit in the\nARM implementation of this API. This gives us a set of hooks to allow\nus to deal with CPU cache issues arising from non-cache coherent DMA.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nTested-By: Santosh Shilimkar \u003csantosh.shilimkar@ti.com\u003e\nTested-By: Jamie Iles \u003cjamie@jamieiles.com\u003e\n" }, { "commit": "7ada189f5c8627662c23f49b3e68463f86fc511e", "tree": "3b4b15586e3e81ec0bbca292dd9a1ed8175e717e", "parents": [ "1618fdd9602c689de2f820a88cb3e283a39c3d90" ], "author": { "name": "Jamie Iles", "email": "jamie.iles@picochip.com", "time": "Tue Feb 02 20:24:58 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Feb 12 17:25:53 2010 +0000" }, "message": "ARM: 5900/2: arm: enable support for software perf events\n\nThe perf events subsystem allows counting of both hardware and\nsoftware events. This patch implements the bare minimum for software\nperformance events.\n\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Jamie Iles \u003cjamie.iles@picochip.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4aba098c8d64329f0c4b24d12e1dc5398dd41a75", "tree": "ce2cebacd66325fc0795d7492ce3c49ee07f980a", "parents": [ "0b7d5170dc5a4aca144b27d40b67d73b245df066" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Feb 03 15:48:03 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Feb 03 15:48:03 2010 +0000" }, "message": "ARM: Fix wrong register in proc-arm6_7.S data abort handler\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ed42acaef1a9d51631a31b55e9ed52d400430492", "tree": "62b93dda8ee5eb1c31a3233df3e0f244dd83b367", "parents": [ "56dd47098abe1fdde598a8d8b7c04d775506f456" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:31:38 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 20 13:48:30 2010 +0000" }, "message": "ARM: make_coherent: avoid recalculating the pfn for the modified page\n\nWe already know the pfn for the page to be modified in make_coherent,\nso let\u0027s stop recalculating it unnecessarily.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "56dd47098abe1fdde598a8d8b7c04d775506f456", "tree": "5eda8a531087c9c068702aa426db8479a77147f8", "parents": [ "f8a85f1164a33e3eb5b421b137ced793ed53ee33" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:24:34 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 20 13:48:30 2010 +0000" }, "message": "ARM: make_coherent: fix problems with highpte, part 1\n\nupdate_mmu_cache() is called with a page table already mapped. We\ncall make_coherent(), which then calls adjust_pte() which wants to\nmap other page tables. This causes kmap_atomic() to BUG() because\nthe slot its trying to use is already taken.\n\nSince do_adjust_pte() modifies the page tables, we are also missing\nany form of locking, so we\u0027re risking corrupting the page tables.\n\nFix this by using pte_offset_map_nested(), and taking the pte page\ntable lock around do_adjust_pte().\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f8a85f1164a33e3eb5b421b137ced793ed53ee33", "tree": "ce4cd8de4eeee853c87b41a594979fd9cb3b6db5", "parents": [ "c26c20b823d48addbde9cb5709d80655c6fadf18" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:23:44 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 20 13:48:29 2010 +0000" }, "message": "ARM: make_coherent: convert adjust_pte() to use p*d_none_or_clear_bad()\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c26c20b823d48addbde9cb5709d80655c6fadf18", "tree": "cf3cbfa958860942107070ff6f33eddc2238381c", "parents": [ "24bc7347da73a9ed3383056c3d0f28c0e361621e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:21:35 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Jan 20 13:48:29 2010 +0000" }, "message": "ARM: make_coherent: split adjust_pte() in two\n\nadjust_pte() walks the page tables, and do_adjust_pte() does the\npage table manipulation.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2045124ffd1a5e46d157349016a2c50f19c8c91d", "tree": "e305146e3f9054baead6ccb6d8bddb22c845161a", "parents": [ "1f667c690be3ab71036c436d8391105eee23f65b" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Tue Jan 19 23:42:08 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 19 23:11:56 2010 +0000" }, "message": "ARM: 5888/1: arm: Update comments in cacheflush.h and remove unnecessary V6 and V7 comments\n\nThe comments in cacheflush.h should follow what\u0027s in\nstruct cpu_cache_fns. The comments for V6 and V7 are\nunnecessary.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1f667c690be3ab71036c436d8391105eee23f65b", "tree": "6ae1c21bc08853412c4c7b384a3485da9c21ec70", "parents": [ "ad3e6c0b1fad31282a8384903ed811671d840a9c" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Tue Jan 19 17:01:33 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 19 20:23:17 2010 +0000" }, "message": "ARM: 5886/1: arm: Fix cpu_proc_fin() for proc-v7.S and make kexec work\n\nThe comments in arm_machine_restart() suggest that cpu_proc_fin()\nwill clean and disable cache and turn off interrupts. This does\nnot seem to be implemented for proc-v7.S, implement it the same\nway as for proc-v6.S.\n\nThis also makes kexec work for v7. Note that a related TLB and\nbranch traget flush patch is also needed to avoid kexec\n\"crc error\".\n\nNote that there are still some issues that seem to be related\nto L2 cache being on and causing occasional uncompress \"crc error\"\nwith kexec. Anyways, this gets kexec mostly working on V7 for now.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ad3e6c0b1fad31282a8384903ed811671d840a9c", "tree": "cc2ea5a7f713c3b0684515ad24ab23aa8f491c71", "parents": [ "200b7a8dc09504bc0aedac567a307a6e533f39e5" ], "author": { "name": "Tony Lindgren", "email": "tony@atomide.com", "time": "Tue Jan 19 16:42:12 2010 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 19 20:23:17 2010 +0000" }, "message": "ARM: 5885/1: arm: Flush TLB entries in setup_mm_for_reboot()\n\nWe need to do that if we tinker with the MMU entries.\n\nThis fixes the occasional bug with kexec where the new\nfails to uncompress with \"crc error\". Most likely at\nleast kexec on v6 and v7 need this fix.\n\nSigned-off-by: Tony Lindgren \u003ctony@atomide.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "1f0e14bbc065c88ddb68fec42b317f487cc85410", "tree": "ed8d6206d3362e92db3f5dd981a2e865200bde9c", "parents": [ "f25bb39f8adfe980df223f415f3b845953ca1147", "aff7b4f86737f1ae364bf5ece9a9b8586ddb2db4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 12 20:56:01 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 12 20:56:01 2010 -0800" }, "message": "Merge master.kernel.org:/home/rmk/linux-2.6-arm\n\n* master.kernel.org:/home/rmk/linux-2.6-arm:\n ARM: Ensure ARMv6/7 mm files are built using appropriate assembler options\n ARM: Fix wrong dmb\n ARM: 5874/1: serial21285: fix disable_irq-from-interrupt-handler deadlock\n ARM: 5873/1: ARM: Fix the reset logic for ARM RealView boards\n ARM: 5872/1: ARM: include needed linux/cpu.h in asm/cpu.h\n ARM: 5871/1: arch/arm: Fix build failure for lpd7a404_defconfig caused by missing includes\n ARM: 5870/1: arch/arm: Fix build failure for defconfigs without CONFIG_ISA_DMA_API set\n ARM: 5868/1: ARM: fix \"BUG: using smp_processor_id() in preemptible code\"\n ARM: 5867/1: Update U300 defconfig\n ARM: 5866/1: arm ptrace: use unsigned types for kernel pt_regs\n [ARM] pxa: fix strange characters in zaurus gpio .desc\n ARM: add missing recvmmsg syscall number\n [ARM] pxa: fix compiler warnings of unused variable \u0027id\u0027 in cpu_is_pxa9*()\n [ARM] pxa: update pwm_backlight-\u003enotify() to include missed \u0027struct device *\u0027\n [ARM] pxa: enable L2 if present in XSC3\n [ARM] pxa: do not enable L2 after MMU is enabled\n" }, { "commit": "aff7b4f86737f1ae364bf5ece9a9b8586ddb2db4", "tree": "c083c9f20933c89a5d24882f69bcba410766b739", "parents": [ "7511bce4069de39ea04b14c1e1d55c249f9ce808" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 12 19:02:05 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 12 19:02:05 2010 +0000" }, "message": "ARM: Ensure ARMv6/7 mm files are built using appropriate assembler options\n\nA kernel with both ARMv6 and ARMv7 selected results in build errors.\nFix this by specifying the proper architectures for these assembly\nfiles.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4b529401c5089cf33f7165607cbc2fde43357bfb", "tree": "0e559e77e9a2c837cd7c25f3a48e83ee788d7d4b", "parents": [ "50f411e34d623efbf4e4b4b0c1a4a20e04c5cc9e" ], "author": { "name": "Andreas Fenkart", "email": "andreas.fenkart@streamunlimited.com", "time": "Fri Jan 08 14:42:31 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jan 11 09:34:03 2010 -0800" }, "message": "mm: make totalhigh_pages unsigned long\n\nMakes it consistent with the extern declaration, used when CONFIG_HIGHMEM\nis set Removes redundant casts in printout messages\n\nSigned-off-by: Andreas Fenkart \u003candreas.fenkart@streamunlimited.com\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Chen Liqin \u003cliqin.chen@sunplusct.com\u003e\nCc: Lennox Wu \u003clennox.wu@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "0de9a00fd6e0a137c63fbbfb6012bf34cc0ab7c4", "tree": "bda182d9407e32354620e9188258c86cad2e3813", "parents": [ "22325525d8bb1478daddefec1b762e7882bcd515", "d13fecd0293d55a4bcb8a31078216504192d8ce0" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 08 16:18:37 2010 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Jan 08 16:18:37 2010 +0000" }, "message": "Merge branch \u0027fix\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6\n" }, { "commit": "070f1f178c4377c09f72e414513aeacd8403f6d6", "tree": "9110445af309570a82bf06075bef3b802da99c9a", "parents": [ "3ac584317adcc4be4466db967f3355c3e42cbda3" ], "author": { "name": "Bahadir Balban", "email": "bahadir.balban@arm.com", "time": "Fri Dec 25 14:25:48 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Jan 05 20:52:06 2010 +0000" }, "message": "ARM: 5858/1: Remove unused vma_vm_flags macro from v7wbi_flush_user_tlb_range\n\nSigned-off-by: Bahadir Balban \u003cbbalban@b-labs.co.uk\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "548c6af4627f4dcb24512a381193206e09bd6d31", "tree": "c9431a3b9bd63292b79cf95bea44940946dc1632", "parents": [ "dc8601a224d546bb321b058fc5ecabdb688a3582" ], "author": { "name": "Haojian Zhuang", "email": "haojian.zhuang@marvell.com", "time": "Wed Dec 30 10:02:57 2009 -0500" }, "committer": { "name": "Eric Miao", "email": "eric.y.miao@gmail.com", "time": "Fri Jan 01 15:51:53 2010 +0800" }, "message": "[ARM] pxa: enable L2 if present in XSC3\n\nCheck whether L2 is present or not in XSC3. If it\u0027s present, enable L2\nimmediately.\n\nDisabling L2 after L2 is enabled that would result in unpredicatable behavior\nof XSC3 processor.\n\nSigned-off-by: Haojian Zhuang \u003chaojian.zhuang@marvell.com\u003e\nSigned-off-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\n" }, { "commit": "dc8601a224d546bb321b058fc5ecabdb688a3582", "tree": "9cdb8feef2c2734abf4a2511378c64af0cac1f6b", "parents": [ "91a86a964f0773fdf466fe02577c8494ca8e2083" ], "author": { "name": "Haojian Zhuang", "email": "haojian.zhuang@gmail.com", "time": "Wed Dec 30 02:27:24 2009 -0500" }, "committer": { "name": "Eric Miao", "email": "eric.y.miao@gmail.com", "time": "Fri Jan 01 15:50:34 2010 +0800" }, "message": "[ARM] pxa: do not enable L2 after MMU is enabled\n\nOuter cache checked whether L2 is enabled or not. If L2 isn\u0027t enabled in XSC3,\nit would enable L2. This operation is evil that would make system hang.\n\nIn XSC3 core document, these words are mentioned in below.\n\n\"Following reset, the L2 Unified Cache Enable bit is cleared. To enable the L2\nCache, software may set the bit to a \u00271\u0027 before or at the same time as enabling\nthe MMU. Enabling the L2 Cache after the MMU has been enabled or disabling the\nL2 Cache after the L2 Cache has been enabled, may result in unpredictable\nbehavior of the processor.\"\n\nWhen outer cache is initialized, the MMU is already enabled. We couldn\u0027t enable\nL2 after MMU enabled.\n\nSigned-off-by: Haojian Zhuang \u003chaojian.zhuang@marvell.com\u003e\nSigned-off-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\n" }, { "commit": "6dc995a3da9adfa83d61ccf06aa1afa5f6ab764f", "tree": "02ebf4534f9eaa964b8a840ca0d70323e6bb460a", "parents": [ "52e8bfd81af5492a14cc3a4641d4c80d05b66bdb" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 24 10:16:21 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 24 10:16:21 2009 +0000" }, "message": "ARM: fix PAGE_KERNEL\n\nPAGE_KERNEL should not be executable; any area marked executable can\nbe prefetched into the instruction cache. We don\u0027t want vmalloc areas\nto be read in this way.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "52e8bfd81af5492a14cc3a4641d4c80d05b66bdb", "tree": "1489eb5f4ecac93071fc9995afa298a5a3f10e92", "parents": [ "d9fd3ab89ff58ca70c8cc0eadc87cd4a96950f95" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 23 19:54:31 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 23 19:54:31 2009 +0000" }, "message": "ARM: Fix wrong shared bit for CPU write buffer bug test\n\nIt is unpredictable to have the same memory mapped using different\nshared bit settings for ARMv6 and ARMv7 CPUs. Fix this for the CPU\nwrite buffer bug test.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "4da8b8208eded0ba21e3ed7cee79e7454b2b973d", "tree": "592ba5af65c6799fad17d26d0d642a7912fdf3e6", "parents": [ "797245f5da543074ee7db0e0516da744c89aa17f" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:06:32 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 16:07:53 2009 +0000" }, "message": "ARM: Kill CONFIG_CPU_32\n\n26-bit ARM support was removed a long time ago, and this symbol has\nbeen defined to be \u0027y\u0027 ever since. As it\u0027s never disabled anymore,\nwe can kill it without any side effects.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2395d66d09ce10c25b6756575c4aeb219760d1fc", "tree": "10da4bf5978bf06a4014b9294837a31e7503e4f4", "parents": [ "55639353a0035052d9ea6cfe4dde0ac7fcbb2c9f" ], "author": { "name": "Anand Gadiyar", "email": "gadiyar@ti.com", "time": "Fri Dec 18 12:56:10 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 18 12:07:05 2009 +0000" }, "message": "ARM: 5853/1: ARM: Fix build break on ARM v6 and v7\n\nCommit 2c9b9c849 added an argument to __cpuc_flush_dcache_page\nand renamed it.\n\nUpdate a caller of the old function to fix this build error:\n\n CC arch/arm/mm/copypage-v6.o\narch/arm/mm/copypage-v6.c: In function \u0027v6_copy_user_highpage_nonaliasing\u0027:\narch/arm/mm/copypage-v6.c:51: error: implicit declaration of function \u0027__cpuc_flush_dcache_page\u0027\nmake[1]: *** [arch/arm/mm/copypage-v6.o] Error 1\nmake: *** [arch/arm/mm] Error 2\n\nReported-by: Jinsung Yang \u003cjsgood.yang@samsung.com\u003e\n\nSigned-off-by: Anand Gadiyar \u003cgadiyar@ti.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6665398afafcb1c75d933c1452a9010644aba3e6", "tree": "6a6dce2ac7835de25f422330ea224a01eef55635", "parents": [ "c0caac93f873cd3402b63246bf94d904afc4f5fd", "bf32eb85492af197ea5ff20e0be56f667a80584d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 17 23:22:23 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 17 23:22:23 2009 +0000" }, "message": "Merge branch \u0027cache\u0027 (early part)\n" }, { "commit": "1cc76b5ee02e4e884339ee3baf43cafd26dd4f1b", "tree": "480f1e88d9966a913a67f63f74d5486363903fff", "parents": [ "8bea8672edfca7ec5f661cafb218f1205863b343", "1cb9f9b086f818eb9543ed759382de7b95c67f87" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 16 20:06:20 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Dec 16 20:06:20 2009 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.marvell.com/orion\n" }, { "commit": "2ef7f3dbd7a70a48c3f09b498df528cb00ea03a4", "tree": "ed6478d2eb2a9062b6f586acd4cc28ac0cfe30a5", "parents": [ "bf32eb85492af197ea5ff20e0be56f667a80584d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 05 13:29:36 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:54:28 2009 +0000" }, "message": "ARM: Fix ptrace accesses\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "bf32eb85492af197ea5ff20e0be56f667a80584d", "tree": "b43d056362e49831040a871040f39778f31abace", "parents": [ "f74f7e57ae9fa12b2951ae62ce3557799b318399", "3d1074349b22c9653e746282564136c87668c2b8" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:54:10 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:54:10 2009 +0000" }, "message": "Merge branch \u0027pending-l2x0\u0027 into cache\n" }, { "commit": "2c9b9c8490b60428fa2d1c64042f7c7caed93940", "tree": "c8af289af8c801193eea924db0cd81f09068ddb9", "parents": [ "ccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 26 12:56:21 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:53:22 2009 +0000" }, "message": "ARM: add size argument to __cpuc_flush_dcache_page\n\n... and rename the function since it no longer operates on just\npages.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218", "tree": "f4de2fb21cc45716c2dbcb98acb176c4295a551c", "parents": [ "3067e02f8f3ae2f3f02ba76400d03b8bcb4942b0" ], "author": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Fri Dec 11 02:21:57 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 14:53:21 2009 +0000" }, "message": "ARM: 5848/1: kill flush_ioremap_region()\n\nThere is not enough users to warrant its existence, and it is actually\nan obstacle to progress with the new DMA API which cannot cover this\ncase properly.\n\nTo keep backward compatibility, let\u0027s perform the necessary custom\ncache maintenance locally in the only driver affected.\n\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3d1074349b22c9653e746282564136c87668c2b8", "tree": "b86a8b3cfa5b63e218df8da66417a4ec5f229b0e", "parents": [ "0eb948dd7f7c3cec37440c16a6c738c8e75efcda" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 11:41:09 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 13:35:13 2009 +0000" }, "message": "ARM: cache-l2x0: make better use of background cache handling\n\nThere\u0027s no point having the hardware support background operations\nif we issue a cache operation, and then wait for it to complete\nbefore calculating the address of the next operation. We gain no\nadvantage in the cache controller stalling the bus until completion.\n\nWhat we should be doing is using the \u0027wait\u0027 time productively by\ncalculating the address of the next operation, and only then waiting\nfor the previous operation to complete. This means that cache\noperations can occur in parallel with the CPU calculating the next\naddress.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "0eb948dd7f7c3cec37440c16a6c738c8e75efcda", "tree": "96ecc9b1a3b5326f7de82cd2055b448a7e43c9f8", "parents": [ "22763c5cf3690a681551162c15d34d935308c8d7" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 11:12:15 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Dec 14 13:34:58 2009 +0000" }, "message": "ARM: cache-l2x0: avoid taking spinlock for every iteration\n\nTaking the spinlock for every iteration is very expensive; instead,\nbatch iterations up into 4K blocks, releasing and reacquiring the\nspinlock between each block.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "e77414e0aad6a1b063ba5e5750c582c75327ea6a", "tree": "9492b584ce6a3e4f99570ce4517d7efaaff4fb93", "parents": [ "bb52d6694002b9d632bb355f64daa045c6293a4e" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Sat Dec 05 15:10:44 2009 -0500" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Fri Dec 11 06:44:59 2009 -0500" }, "message": "fix broken aliasing checks for MAP_FIXED on sparc32, mips, arm and sh\n\nWe want addr - (pgoff \u003c\u003c PAGE_SHIFT) consistently coloured...\n\nAcked-by: Paul Mundt \u003clethal@linux-sh.org\u003e\nAcked-by: Hugh Dickins \u003chugh.dickins@tiscali.co.uk\u003e\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\n" }, { "commit": "f0e5d2c959d5f14dd3bc879c8f9390aa2c049423", "tree": "e8614fd870461ad908aed91bfb6ed2af0667997a", "parents": [ "da43243e765908d2ce6d22b2be995edf3218457d" ], "author": { "name": "Saeed Bishara", "email": "saeed@marvell.com", "time": "Sun Dec 06 18:06:43 2009 +0200" }, "committer": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Mon Dec 07 17:04:18 2009 -0500" }, "message": "ARM: dove: fix the mm mmu flags of the pj4 procinfo\n\n... to be the same as proc-v6\n\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "0719dc341389882cc834ed18fc9b7fc6006b2b85", "tree": "794480ac62c07ea8cc4e69c2cb3d2b83bb7f36b7", "parents": [ "e28edb723e64200554194da17617ee6e82de6690", "677f4f64e4b2336682f0e15c69b206ade6f6b131" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 05 10:35:33 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Dec 05 10:35:33 2009 +0000" }, "message": "Merge branch \u0027devel-stable\u0027 into devel\n" }, { "commit": "4567c4a89693416ccca02d32109bce967e9c1ade", "tree": "9d77cf02ce269ed5fc4b6e2ebddb9ad7fd504ad1", "parents": [ "602fd7c36728a04e61a442c9755e7d454501266c", "19d6c13b56a78b3757e747f469285c2a546d634a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 17:34:16 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 17:34:16 2009 +0000" }, "message": "Merge branch \u0027devel\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable\n" }, { "commit": "c6baa1963c2a76ffdb157e8b9a5a55b30046b125", "tree": "9063398d2406042670759e207d9058ec5e7b770b", "parents": [ "5cb2faa6ede7ada9cb2bffc832c4ce60f53d6834", "26a26d329688ab018e068b412b03d43d7c299f0a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 15:00:00 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 15:00:00 2009 +0000" }, "message": "Merge branch \u0027pending-dma-coherent\u0027 into devel\n" }, { "commit": "5cb2faa6ede7ada9cb2bffc832c4ce60f53d6834", "tree": "7b72b66081d042a41dc822575503133364857ce2", "parents": [ "e0ee98513d1a2e24d2ddbdecf4216bcca29d1158", "6060e8df517847bf445ebc61de7d4d9c7faae990" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:59:47 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:59:47 2009 +0000" }, "message": "Merge branch \u0027pending-misc\u0027 (early part) into devel\n" }, { "commit": "6060e8df517847bf445ebc61de7d4d9c7faae990", "tree": "64a86fe9a921584e38b7ce24521248b8461171c6", "parents": [ "ea201dbb78651c71c56e440b8b3132906bc7456d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 14:12:27 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:51 2009 +0000" }, "message": "ARM: I-cache: flush executable mappings in flush_cache_range()\n\nDirk Behme reported instability on ARM11 SMP (VIPT non-aliasing cache)\ncaused by the dynamic linker changing protection on text pages to write\nGOT entries. The problem is due to an interaction between the write\nfaulting code providing new anonymous pages which are incoherent with\nthe I-cache due to write buffering, and the I-cache not having been\ninvalidated.\n\na4db94d plugs the hole with the data cache coherency. This patch\nprovides the other half of the fix by flushing the I-cache in\nflush_cache_range() for VM_EXEC VMAs (which is what we have when the\nregion is being made executable again.) This ensures that the I-cache\nwill be up to date with the newly COW\u0027d pages.\n\nNote: if users are writing instructions, then they still need to use\nthe ARM sys_cacheflush API to ensure that the caches are correctly\nsynchronized.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "ea201dbb78651c71c56e440b8b3132906bc7456d", "tree": "53fa8679229960bb585766c5b49301dee834bcec", "parents": [ "9e95922b1016ac941db7edcf6b6088b3c2e916c8" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 14:31:40 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:51 2009 +0000" }, "message": "ARM: I-cache: avoid flushing in flush_cache_mm()\n\nflush_cache_mm() is called in two cases:\n1. when a process exits, just before the page tables are torn down.\n We can allow the stale lines to evict themselves over time without\n causing any harm.\n\n2. when a process forks, and we\u0027ve allocated a new ASID.\n The instruction cache issues are dealt with as pages are brought\n into the new process address space. Flushing the I-cache here is\n therefore unnecessary.\n\nHowever, we must keep the VIPT aliasing D-cache flush to ensure that\nany dirty cache lines are not written back after the pages have been\nreallocated for some other use - which would result in corruption.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "9e95922b1016ac941db7edcf6b6088b3c2e916c8", "tree": "1b60b7231f9412e7c842c9a12804b3ab914ca5cd", "parents": [ "115b22474eb1905da2f606a057da3455833333d3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 13:35:13 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:51 2009 +0000" }, "message": "ARM: I-cache: Add invalidation for VIVT ASID tagged caches\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "115b22474eb1905da2f606a057da3455833333d3", "tree": "21633ac227c92fc6f646ccdb5a0b3d7f5f73aaba", "parents": [ "f91fb05d826a43063fa0aa2ec30c23d3993a208d" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Nov 24 18:54:07 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:50 2009 +0000" }, "message": "ARM: 5794/1: Flush the D-cache during copy_user_highpage()\n\nThe I and D caches for copy-on-write pages on processors with\nwrite-allocate caches become incoherent causing problems on application\nrelying on CoW for text pages (dynamic linker relocating symbols in a\ntext page). This patch flushes the D-cache for such pages.\n\nCc: Nicolas Pitre \u003cnico@fluxnic.net\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "f91fb05d826a43063fa0aa2ec30c23d3993a208d", "tree": "9ada5aefa09d40b70ea3b8a5e89d7ce6aa2a5fd9", "parents": [ "2df341edf6b8a2db7f414d00faeadccbdd9844ab" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 24 23:05:34 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:50 2009 +0000" }, "message": "ARM: Remove __flush_icache_all() from __flush_dcache_page()\n\nBoth call sites for __flush_dcache_page() end up calling\n__flush_icache_all() themselves, so having __flush_dcache_page() do\nthis as well is wasteful. Remove the duplicated icache flushing.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2df341edf6b8a2db7f414d00faeadccbdd9844ab", "tree": "e88bb4f549103a9fe25552ab136c9ce3daab61f1", "parents": [ "7b0a1003e780193e2a11c27f5059c26b65f60679" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 24 22:58:40 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:50 2009 +0000" }, "message": "ARM: Move __flush_icache_all() out of flush_pfn_alias()\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7b0a1003e780193e2a11c27f5059c26b65f60679", "tree": "c3277aa1f6536530514dafd946770928b4bf4aff", "parents": [ "421fe93cc4b06b2f5e875cbe0f692800d4862ee5" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 24 14:11:59 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Dec 04 14:58:50 2009 +0000" }, "message": "ARM: Reduce __flush_dcache_page() visibility\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "48371cd3f4226275c529bb8675a99572db19cc7c", "tree": "c76042ed297179c2c4823d11f2c9d7447049ae1a", "parents": [ "1f739d7643c4cf78b4f2d9d620c4305aafc7d3b9" ], "author": { "name": "Srinidhi Kasagar", "email": "srinidhi.kasagar@stericsson.com", "time": "Wed Dec 02 06:18:03 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Dec 03 19:42:30 2009 +0000" }, "message": "ARM: 5845/1: l2x0: check whether l2x0 already enabled\n\nIf running in non-secure mode accessing\nsome registers of l2x0 will fault. So\ncheck if l2x0 is already enabled, if so\ndo not access those secure registers.\n\nSigned-off-by: srinidhi kasagar \u003csrinidhi.kasagar@stericsson.com\u003e\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d7931d9f7ab9de9158c6905caae979999134ad4d", "tree": "3903d96bfea61a4c66b11f95535928b4cb991327", "parents": [ "fb3704663058ebb8ec05236f9c984b702550bac5", "da43243e765908d2ce6d22b2be995edf3218457d" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:22:54 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:22:54 2009 +0000" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.marvell.com/orion into devel-stable\n" }, { "commit": "421fe93cc4b06b2f5e875cbe0f692800d4862ee5", "tree": "88c5985799273a7c854159246d715e1ad85646f9", "parents": [ "b7dc0b2cfc6e9bc7270915c642a8a8e999b6095e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 10:23:04 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:20:07 2009 +0000" }, "message": "ARM: ZERO_PAGE: Avoid flush_dcache_page() for zero page\n\nThe zero page is read-only, and has its cache state cleared during\nboot. No further maintanence for this page is required.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "b7dc0b2cfc6e9bc7270915c642a8a8e999b6095e", "tree": "68853dc2d48f9abcd5eadab0dc181ad8b0e8ac59", "parents": [ "2f0b192633f1fbf253b21c90938733491549edae" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 11:25:50 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:20:07 2009 +0000" }, "message": "ARM: Avoid evaluating page_address() multiple times\n\npage_address() is a function call rather than a macro, and so:\n\n\tif (page_address(page))\n\t\tdo_something(page_address(page));\n\nresults in two calls to this function. This is unnecessary; remove\nthe duplication.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "2f0b192633f1fbf253b21c90938733491549edae", "tree": "a429eaf88e591ea9674075ac6389e9a751da9806", "parents": [ "29e553631b2a0d4eebd23db630572e1027a9967a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 10:40:02 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Dec 01 18:20:07 2009 +0000" }, "message": "ARM: Avoid duplicated implementation for VIVT cache flushing\n\nWe had two copies of the wrapper code for VIVT cache flushing - one in\nasm/cacheflush.h and one in arch/arm/mm/flush.c. Reduce this down to\none common copy.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "d0a92fd3b84bf707f6b32f31d0f09d2b7bb1ad67", "tree": "8a0100ac36371afab0725ca66325a46e677be77c", "parents": [ "bb2ae8f0325221a2dfd9eb31554f42e9c24abdf2" ], "author": { "name": "Tomáš Čech", "email": "sleep_walker@suse.cz", "time": "Fri Sep 11 13:57:02 2009 +0200" }, "committer": { "name": "Eric Miao", "email": "eric.y.miao@gmail.com", "time": "Tue Dec 01 09:02:49 2009 +0800" }, "message": "[ARM] pxa/treo: add Palm Centro 685 support\n\nSigned-off-by: Tomáš Čech \u003csleep_walker@suse.cz\u003e\nSigned-off-by: Eric Miao \u003ceric.y.miao@gmail.com\u003e\n" }, { "commit": "573a652fb0da50a1ff3fca2c67afd81138fd06d2", "tree": "e393e667f733db56447c266d45e58accf141894f", "parents": [ "edabd38e1a017e922e3e3b485ee3ddb4df433aa4" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@marvell.com", "time": "Tue Nov 24 19:33:52 2009 +0200" }, "committer": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Fri Nov 27 15:43:21 2009 -0500" }, "message": "ARM: Add Tauros2 L2 cache controller support\n\nSupport for the Tauros2 L2 cache controller as used with the PJ1\nand PJ4 CPUs.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "edabd38e1a017e922e3e3b485ee3ddb4df433aa4", "tree": "c79cef3e59f62014c12ff1203e84b0bac5610a55", "parents": [ "8d27b2f7988b652dbabf79291a3e2550c06e1af5" ], "author": { "name": "Saeed Bishara", "email": "saeed@marvell.com", "time": "Thu Aug 06 15:12:43 2009 +0300" }, "committer": { "name": "Nicolas Pitre", "email": "nico@fluxnic.net", "time": "Fri Nov 27 15:43:06 2009 -0500" }, "message": "ARM: add base support for Marvell Dove SoC\n\nThe Marvell Dove (88AP510) is a high-performance, highly integrated,\nlow power SoC with high-end ARM-compatible processor (known as PJ4),\ngraphics processing unit, high-definition video decoding acceleration\nhardware, and a broad range of peripherals.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\n" }, { "commit": "26a26d329688ab018e068b412b03d43d7c299f0a", "tree": "f33ea6faa4f8d9409098654354548fa28c7b41ad", "parents": [ "acaac256b3a14a09ab278409a72d119f2d75b02b" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 20 21:06:43 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:36 2009 +0000" }, "message": "ARM: dma-mapping: switch ARMv7 DMA mappings to retain \u0027memory\u0027 attribute\n\nOn ARMv7, it is invalid to map the same physical address multiple times\nwith different memory types. Since system RAM is already mapped as\n\u0027memory\u0027, subsequent remapping of it must retain this attribute.\n\nHowever, DMA memory maps it as \"strongly ordered\". Fix this by introducing\n\u0027pgprot_dmacoherent()\u0027 which provides the necessary page table bits for\nDMA mappings.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\nReviewed-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "acaac256b3a14a09ab278409a72d119f2d75b02b", "tree": "f9e3c66fddc3e40e86d4b03fec166101da1fdb04", "parents": [ "31ebf94435f74294523683867fe0b89000e61521" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 20 18:19:52 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:36 2009 +0000" }, "message": "ARM: dma-mapping: get rid of setting/clearing the reserved page bit\n\nIt\u0027s unnecessary; x86 doesn\u0027t do it, and ALSA doesn\u0027t require it\nanymore.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "31ebf94435f74294523683867fe0b89000e61521", "tree": "57f587da490f9c8bbf987d4165a5ede7f7ad5d63", "parents": [ "ebd7a845fa4332da3ebcbe8cf1b09bb43413420e" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 21:12:17 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:35 2009 +0000" }, "message": "ARM: dma-mapping: Factor out noMMU dma buffer allocation code\n\nThis entirely separates the DMA coherent buffer remapping code from\nthe allocation code, and gets rid of the duplicate copy in the !MMU\nsection.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "ebd7a845fa4332da3ebcbe8cf1b09bb43413420e", "tree": "07bb3b78fd2bbe3705fb040f6ad1f5da6b5a625c", "parents": [ "88c58f3b92bc7c26439802c300d39b6377739d81" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 20:58:31 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:35 2009 +0000" }, "message": "ARM: dma-mapping: clean up coherent arch dma allocation\n\nIXP23xx added support for dma_alloc_coherent() for DMA arches with an\nexception in dma_alloc_coherent(). This is a subset of what goes on\nin __dma_alloc(), and there is no reason why dma_alloc_writecombine()\nshould not be given the same treatment (except, maybe, that IXP23xx\ndoesn\u0027t use it.)\n\nWe can better deal with this by moving the arch_is_coherent() test\ninside __dma_alloc() and killing the code duplication.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "88c58f3b92bc7c26439802c300d39b6377739d81", "tree": "ffcc5f555fb871a3a5e7d8b5a17757563b43a5df", "parents": [ "695ae0af5a52df09dffcc2ce2d625d56ef36ce14" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 16:46:02 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:35 2009 +0000" }, "message": "ARM: dma-mapping: move consistent_init into CONFIG_MMU section\n\nNo point wrapping the contents of this function with #ifdef CONFIG_MMU\nwhen we can place it and the core_initcall() entirely within the\nexisting conditional block.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "695ae0af5a52df09dffcc2ce2d625d56ef36ce14", "tree": "c2114e79fac53f9eb29e0ed74b5aa4fa5a39b607", "parents": [ "04da56943b416dd9fe7058abf8d5b9153164b3e9" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 16:31:39 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:35 2009 +0000" }, "message": "ARM: dma-mapping: factor dma_free_coherent() common code\n\nWe effectively have three implementations of dma_free_coherent() mixed up\nin the code; the incoherent MMU, coherent MMU and noMMU versions.\n\nThe coherent MMU and noMMU versions are actually functionally identical.\nThe incoherent MMU version is almost the same, but with the additional\nstep of unmapping the secondary mapping.\n\nSeparate out this additional step into __dma_free_remap() and simplify\nthe resulting dma_free_coherent() code.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "04da56943b416dd9fe7058abf8d5b9153164b3e9", "tree": "24541a1e46b9f660d3b33845d1e31b0d0c4918d0", "parents": [ "3e82d012e9281a0b6388ff2356e8396b9d781e1c" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 15:54:45 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:34 2009 +0000" }, "message": "ARM: dma-mapping: fix nommu dma_alloc_coherent()\n\nThe nommu version of dma_alloc_coherent was using kmalloc/kfree to manage\nthe memory. dma_alloc_coherent() is expected to work with a granularity\nof a page, so this is wrong. Fix it by using the helper functions now\nprovided.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "3e82d012e9281a0b6388ff2356e8396b9d781e1c", "tree": "c76320422bd3988e499680662b3bebbf9796589b", "parents": [ "7a9a32a9533fa01de911e1d056142ddd27360782" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 15:38:12 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:34 2009 +0000" }, "message": "ARM: dma-mapping: fix coherent arch dma_alloc_coherent()\n\nThe coherent architecture dma_alloc_coherent was using kmalloc/kfree to\nmanage the memory. dma_alloc_coherent() is expected to work with a\ngranularity of a page, so this is wrong. Fix it by using the helper\nfunctions now provided.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "7a9a32a9533fa01de911e1d056142ddd27360782", "tree": "2fcd22e74333d83a81586101ea622e9b197c13ea", "parents": [ "13ccf3ad99a45052664f2c1a6c64899f9d778152" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 15:31:07 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:34 2009 +0000" }, "message": "ARM: dma-mapping: functions to allocate/free a coherent buffer\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "13ccf3ad99a45052664f2c1a6c64899f9d778152", "tree": "6e8f43fcb8e7f1c266b8c13a670c206bbf34bc96", "parents": [ "ac50e950784cae1c26ad9e09ebd8f8c706131eb3" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Nov 19 15:07:04 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 17:41:34 2009 +0000" }, "message": "ARM: dma-mapping: split out vmregion code from dma coherent mapping code\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\n" }, { "commit": "394168389c5770accf1d255fdfe45846ec121585", "tree": "9f5493e46b94a1aed058d121091ea8e982a95d11", "parents": [ "b43149c168ce4069ce8828b1ceb8f7eb42bc4b82" ], "author": { "name": "Marek Szyprowski", "email": "m.szyprowski@samsung.com", "time": "Thu Nov 19 11:30:30 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Tue Nov 24 10:06:26 2009 +0000" }, "message": "ARM: 5791/1: ARM: MM: use 64bytes of L1 cache on plat S5PC1xx\n\nSamsung S5PC1xx SoCs are based on ARM Coretex8, which has 64 bytes of L1\ncache line size. Enable proper handling of L1 cache on these SoCs.\n\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "749f583f3405f93bf56ed5dd0be1d65c06db6f0f", "tree": "c65a5139a9122a140a8d46c08ea882a6a900f4be", "parents": [ "ef1a68848a968f7347cf7eea24072464059af8f1", "345a32296b1f9f6121379e0240915e0e2be2dbf5" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 20 23:53:11 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Fri Nov 20 23:53:11 2009 +0000" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/xscaleiop into devel-stable\n" }, { "commit": "1b3a02eb452354fa9b36a7f33dc4c8307bbc40aa", "tree": "232eab4b30cda81c310864e0dc18b57c431f33dd", "parents": [ "b419148e567728f6af0c3b01965c1cc141e3e13a" ], "author": { "name": "Tony Thompson", "email": "Anthony.Thompson@arm.com", "time": "Wed Nov 04 12:16:38 2009 +0000" }, "committer": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Wed Nov 04 12:19:22 2009 +0000" }, "message": "ARMv7: Check whether the SMP/nAMP mode was already enabled\n\nIf running in non-secure mode, enabling this register will fault.\n\nSigned-off-by: Tony Thompson \u003cAnthony.Thompson@arm.com\u003e\nAcked-by: Srinidhi Kasagar \u003csrinidhikasagar@gmail.com\u003e\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n" }, { "commit": "4b46d6416548fb6a0940dfd9911fd895eb6247b3", "tree": "c2a890342019c9df5e6187ad185a28208b786341", "parents": [ "6603a4fd5195a004dec5f9568e38ff76bae630c1" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Nov 01 17:44:24 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Nov 02 16:59:59 2009 +0000" }, "message": "ARM: ensure initial page tables are setup for SMP systems\n\nMapping the same memory using two different attributes (memory\ntype, shareability, cacheability) is unpredictable. During boot,\nwe encounter a situation when we\u0027re updating the kernel\u0027s page\ntables which can lead to dirty cache lines existing in the cache\nwhich are subsequently missed. This causes stack corruption,\nand therefore a crash.\n\nTherefore, ensure that the shared and cacheability settings\nmatches the configuration that will be used later; this together\nwith the restriction in early_cachepolicy() ensures that we won\u0027t\ncreate a mismatch during boot.\n\nAcked-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "df71dfd4ca01130f98d9dbfab76c440d72a177c6", "tree": "5050d23a67be5fc5fabd4e6d96ac89786fb2a9c9", "parents": [ "657e12fd388899502d47f9f6f9d276ec9ced8add" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Oct 24 22:36:36 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Oct 29 19:13:09 2009 +0000" }, "message": "ARM: Fix errata 411920 workarounds\n\nErrata 411920 indicates that any \"invalidate entire instruction cache\"\noperation can fail if the right conditions are present. This is not\nlimited just to those operations in flush.c, but elsewhere. Place the\nworkaround in the already existing __flush_icache_all() function\ninstead.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "345a32296b1f9f6121379e0240915e0e2be2dbf5", "tree": "995ad5887af10b11b2cbc48e8936f7f7d9fbb109", "parents": [ "980f2296b5a8dfe589f023fd34229dcfdcf280fa" ], "author": { "name": "Mikael Pettersson", "email": "mikpe@it.uu.se", "time": "Thu Oct 29 11:46:56 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Oct 29 11:46:56 2009 -0700" }, "message": "iop: implement sched_clock()\n\nThis adds a better sched_clock() to the IOP platform,\nimplemented using its new clocksource support.\n\nTested on n2100, compile-tested for all plat-iop machines.\n\n[dan.j.williams@intel.com: allow early cp6 access]\nSigned-off-by: Mikael Pettersson \u003cmikpe@it.uu.se\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n" }, { "commit": "657e12fd388899502d47f9f6f9d276ec9ced8add", "tree": "cce20de56800ea3b63159e8db69577e761f4e094", "parents": [ "c06e004c72aa0d1acbc239fb995aa3d823543a8a" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Oct 29 17:06:17 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Oct 29 17:06:17 2009 +0000" }, "message": "ARM: Fix sparsemem with SPARSEMEM_EXTREME enabled\n\nWhen SPARSEMEM_EXTREME is enabled, memory_present() wants to use bootmem\nto allocate data structures. However, we call memory_present() after\ndeclaring memory to bootmem, but before we\u0027ve reserved areas.\n\nThis leads to sparsemem data structures being overwritten later in the\nkernel\u0027s initialization (when slab initializes.)\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c06e004c72aa0d1acbc239fb995aa3d823543a8a", "tree": "62d438159176d4f0090144073297fc093907ba81", "parents": [ "ce63e6bd0ac7eca242562ee07f518bacc8eaa5ce" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 22:36:10 2009 +0000" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 25 22:44:30 2009 +0000" }, "message": "ARM: Use GFP_DMA only for masks _less_ than 32-bit\n\nWe were using GFP_DMA for masks other than 0xffffffff, which is\nwrong when some masks are initialized to 0xffffffffffffffff.\nThis caused such masks to obtain memory from the precious DMA\npool.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "c768e67625688517c23f46b31a46e1f7d2de1c71", "tree": "5b3e970fed1fd5eea71a8254c210f967b816e669", "parents": [ "f248dc626e95a2b61fed3631df49aef23f1736b8" ], "author": { "name": "Hartley Sweeten", "email": "hartleys@visionengravers.com", "time": "Wed Oct 21 02:27:01 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 21 13:09:37 2009 +0100" }, "message": "ARM: 5769/1: CPU_ARM920T: remove dead Maverick EP9312 URL\n\nRemove the URL listed for Maverick EP9312 since it is not available\nand modify the help text appropriately.\n\nSigned-off-by: H Hartley Sweeten \u003chsweeten@visionengravers.com\u003e\nAcked-by: Ryan Mallon \u003cryan@bluewatersys.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "787b2faadc4356b6c2c71feb42fb944fece9a12f", "tree": "e3acab624bb2de248a2e4f1e6293024200c8dc8c", "parents": [ "edc72786d208e77db94f84dcb0d166c0d23d82f7" ], "author": { "name": "Nitin Gupta", "email": "ngupta@vflare.org", "time": "Mon Oct 12 14:20:23 2009 +0530" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Mon Oct 12 17:52:26 2009 +0100" }, "message": "ARM: force dcache flush if dcache_dirty bit set\n\nOn ARM, update_mmu_cache() does dcache flush for a page only if\nit has a kernel mapping (page_mapping(page) !\u003d NULL). The correct\nbehavior would be to force the flush based on dcache_dirty bit only.\n\nOne of the cases where present logic would be a problem is when\na RAM based block device[1] is used as a swap disk. In this case,\nwe would have in-memory data corruption as shown in steps below:\n\ndo_swap_page()\n{\n - Allocate a new page (if not already in swap cache)\n - Issue read from swap disk\n - Block driver issues flush_dcache_page()\n - flush_dcache_page() simply sets PG_dcache_dirty bit and does not\n actually issue a flush since this page has no user space mapping yet.\n - Now, if swap disk is almost full, this newly read page is removed\n from swap cache and corrsponding swap slot is freed.\n - Map this page anonymously in user space.\n - update_mmu_cache()\n - Since this page does not have kernel mapping (its not in page/swap\n cache and is mapped anonymously), it does not issue dcache flush\n even if dcache_dirty bit is set by flush_dcache_page() above.\n\n \u003cuser now gets stale data since dcache was never flushed\u003e\n}\n\nSame problem exists on mips too.\n\n[1] example:\n - brd (RAM based block device)\n - ramzswap (RAM based compressed swap device)\n\nSigned-off-by: Nitin Gupta \u003cngupta@vflare.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "6a5e293f1b34920c69a932ce37b4a4714a428dc7", "tree": "d5d85081d906126cdd539d297fa2ef2eb07b1f61", "parents": [ "e9ac829185c5d17787d78c13c05a40c39d660239" ], "author": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 11 16:29:48 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sun Oct 11 16:29:48 2009 +0100" }, "message": "ARM: Add kmap_atomic type debugging\n\nSeemingly this support was missed when highmem was added, so\nDEBUG_HIGHMEM wouldn\u0027t have checked the kmap_atomic type.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "3257f43d9296ed7adcc84e48f6ddf5313cf29266", "tree": "97cfb5a7bcd2d21452a7716c4daa8ea512fc1ab7", "parents": [ "32cfb1b16f2b68d2296536811cadfffe26a06c1b" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Oct 06 17:57:22 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 07 13:13:00 2009 +0100" }, "message": "ARM: 5747/1: Fix the start_pg value in free_memmap()\n\nIf sparsemem is enabled, the start_pfn passed to the free_memmap()\nfunction corresponds to an area of memory not known to the kernel and\npfn_to_page returns a wrong value. The (start_pfn - 1), however, is\nknown to the kernel.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "32cfb1b16f2b68d2296536811cadfffe26a06c1b", "tree": "6872f034656cc4ffb80ba51f9b29c35bb8da9f9e", "parents": [ "cc1ad4a69667be885ac6036a315066854ef8c871" ], "author": { "name": "Catalin Marinas", "email": "catalin.marinas@arm.com", "time": "Tue Oct 06 17:57:09 2009 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Wed Oct 07 13:12:59 2009 +0100" }, "message": "ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range\n\nThis is needed because applications using the sys_cacheflush system call\ncan pass a memory range which isn\u0027t mapped yet even though the\ncorresponding vma is valid. The patch also adds unwinding annotations\nfor correct backtraces from the coherent_user_range() functions.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" } ], "next": "1d2127123db9b1821959c2b8b7473dd7ffcdf527" }