)]}'
{
  "log": [
    {
      "commit": "8dd93d450bff251575c56b8f058393124e1f00fb",
      "tree": "bee1cae0a29936d2897a5d84afdc20e524b1022b",
      "parents": [
        "e7e248304c8ccf02b89e04c3b3b66006b993b5a7"
      ],
      "author": {
        "name": "Mauro Carvalho Chehab",
        "email": "mchehab@redhat.com",
        "time": "Tue Feb 19 21:26:22 2013 -0300"
      },
      "committer": {
        "name": "Mauro Carvalho Chehab",
        "email": "mchehab@redhat.com",
        "time": "Thu Feb 21 14:16:27 2013 -0300"
      },
      "message": "edac: add support for error type \"Info\"\n\nThe CPER spec defines a forth type of error: informational\nlogs. Add support for it at the edac API and at the\ntrace event interface.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n"
    },
    {
      "commit": "53f2d02898755d1b24bde1975e202815d29fdb81",
      "tree": "bf38d5ef64f046c552e94fc4ab360a5f833e1265",
      "parents": [
        "0bf09e829dd4b07227ed5a8bc4ac85752a044458"
      ],
      "author": {
        "name": "Mauro Carvalho Chehab",
        "email": "mchehab@redhat.com",
        "time": "Thu Feb 23 08:10:34 2012 -0300"
      },
      "committer": {
        "name": "Mauro Carvalho Chehab",
        "email": "mchehab@redhat.com",
        "time": "Mon Jun 11 11:55:52 2012 -0300"
      },
      "message": "RAS: Add a tracepoint for reporting memory controller events\n\nAdd a new tracepoint-based hardware events report method for\nreporting Memory Controller events.\n\nPart of the description bellow is shamelessly copied from Tony\nLuck\u0027s notes about the Hardware Error BoF during LPC 2010 [1].\nTony, thanks for your notes and discussions to generate the\nh/w error reporting requirements.\n\n[1] http://lwn.net/Articles/416669/\n\n    We have several subsystems \u0026 methods for reporting hardware errors:\n\n    1) EDAC (\"Error Detection and Correction\").  In its original form\n    this consisted of a platform specific driver that read topology\n    information and error counts from chipset registers and reported\n    the results via a sysfs interface.\n\n    2) mcelog - x86 specific decoding of machine check bank registers\n    reporting in binary form via /dev/mcelog. Recent additions make use\n    of the APEI extensions that were documented in version 4.0a of the\n    ACPI specification to acquire more information about errors without\n    having to rely reading chipset registers directly. A user level\n    programs decodes into somewhat human readable format.\n\n    3) drivers/edac/mce_amd.c - this driver hooks into the mcelog path and\n    decodes errors reported via machine check bank registers in AMD\n    processors to the console log using printk();\n\n    Each of these mechanisms has a band of followers ... and none\n    of them appear to meet all the needs of all users.\n\nAs part of a RAS subsystem, let\u0027s encapsulate the memory error hardware\nevents into a trace facility.\n\nThe tracepoint printk will be displayed like:\n\nmc_event: [quant] (Corrected|Uncorrected|Fatal) error:[error msg] on [label] ([location] [edac_mc detail] [driver_detail]\n\nWhere:\n       \t[quant] is the quantity of errors\n\t[error msg] is the driver-specific error message\n\t\t    (e. g. \"memory read\", \"bus error\", ...);\n\t[location] is the location in terms of memory controller and\n\t\t   branch/channel/slot, channel/slot or csrow/channel;\n\t[label] is the memory stick label;\n\t[edac_mc detail] describes the address location of the error\n\t\t\t and the syndrome;\n\t[driver detail] is driver-specifig error message details,\n\t\t\twhen needed/provided (e. g. \"area:DMA\", ...)\n\nFor example:\n\nmc_event: 1 Corrected error:memory read on memory stick DIMM_1A (mc:0 location:0:0:0 page:0x586b6e offset:0xa66 grain:32 syndrome:0x0 area:DMA)\n\nOf course, any userspace tools meant to handle errors should not parse\nthe above data. They should, instead, use the binary fields provided by\nthe tracepoint, mapping them directly into their Management Information\nBase.\n\nNOTE: The original patch was providing an additional mechanism for\nMCA-based trace events that also contained MCA error register data.\nHowever, as no agreement was reached so far for the MCA-based trace\nevents, for now, let\u0027s add events only for memory errors.\nA latter patch is planned to change the tracepoint, for those types\nof event.\n\nCc: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Steven Rostedt \u003crostedt@goodmis.org\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n"
    }
  ]
}