)]}' { "log": [ { "commit": "32dc43e40a2707d0cb1ab8768d080c3e9bcfed52", "tree": "415f3a1935fba0db2f0410360983587bf65ee712", "parents": [ "d414c104e26fd3b597f855cc29473a8b1527fb4c", "8fd61d34226014fe7886babfca6f45a7eff89d25" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Feb 25 15:56:15 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Feb 25 15:56:15 2013 -0800" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6\n\nPull crypto update from Herbert Xu:\n \"Here is the crypto update for 3.9:\n\n - Added accelerated implementation of crc32 using pclmulqdq.\n\n - Added test vector for fcrypt.\n\n - Added support for OMAP4/AM33XX cipher and hash.\n\n - Fixed loose crypto_user input checks.\n\n - Misc fixes\"\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (43 commits)\n crypto: user - ensure user supplied strings are nul-terminated\n crypto: user - fix empty string test in report API\n crypto: user - fix info leaks in report API\n crypto: caam - Added property fsl,sec-era in SEC4.0 device tree binding.\n crypto: use ERR_CAST\n crypto: atmel-aes - adjust duplicate test\n crypto: crc32-pclmul - Kill warning on x86-32\n crypto: x86/twofish - assembler clean-ups: use ENTRY/ENDPROC, localize jump labels\n crypto: x86/sha1 - assembler clean-ups: use ENTRY/ENDPROC\n crypto: x86/serpent - use ENTRY/ENDPROC for assember functions and localize jump targets\n crypto: x86/salsa20 - assembler cleanup, use ENTRY/ENDPROC for assember functions and rename ECRYPT_* to salsa20_*\n crypto: x86/ghash - assembler clean-up: use ENDPROC at end of assember functions\n crypto: x86/crc32c - assembler clean-up: use ENTRY/ENDPROC\n crypto: cast6-avx: use ENTRY()/ENDPROC() for assembler functions\n crypto: cast5-avx: use ENTRY()/ENDPROC() for assembler functions and localize jump targets\n crypto: camellia-x86_64/aes-ni: use ENTRY()/ENDPROC() for assembler functions and localize jump targets\n crypto: blowfish-x86_64: use ENTRY()/ENDPROC() for assembler functions and localize jump targets\n crypto: aesni-intel - add ENDPROC statements for assembler functions\n crypto: x86/aes - assembler clean-ups: use ENTRY/ENDPROC, localize jump targets\n crypto: testmgr - add test vector for fcrypt\n ...\n" }, { "commit": "9d3cae26acb471d5954cfdc25d1438b32060babe", "tree": "77e93b6fb207438f7f1f30a201cc86bc5b0ec82b", "parents": [ "df24eef3e794afbac69a377d1d2e2e3f5869f67a", "8520e443aa56cc157b015205ea53e7b9fc831291" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Feb 23 17:09:55 2013 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Feb 23 17:09:55 2013 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\nPull powerpc updates from Benjamin Herrenschmidt:\n \"So from the depth of frozen Minnesota, here\u0027s the powerpc pull request\n for 3.9. It has a few interesting highlights, in addition to the\n usual bunch of bug fixes, minor updates, embedded device tree updates\n and new boards:\n\n - Hand tuned asm implementation of SHA1 (by Paulus \u0026 Michael\n Ellerman)\n\n - Support for Doorbell interrupts on Power8 (kind of fast\n thread-thread IPIs) by Ian Munsie\n\n - Long overdue cleanup of the way we handle relocation of our open\n firmware trampoline (prom_init.c) on 64-bit by Anton Blanchard\n\n - Support for saving/restoring \u0026 context switching the PPR (Processor\n Priority Register) on server processors that support it. This\n allows the kernel to preserve thread priorities established by\n userspace. By Haren Myneni.\n\n - DAWR (new watchpoint facility) support on Power8 by Michael Neuling\n\n - Ability to change the DSCR (Data Stream Control Register) which\n controls cache prefetching on a running process via ptrace by\n Alexey Kardashevskiy\n\n - Support for context switching the TAR register on Power8 (new\n branch target register meant to be used by some new specific\n userspace perf event interrupt facility which is yet to be enabled)\n by Ian Munsie.\n\n - Improve preservation of the CFAR register (which captures the\n origin of a branch) on various exception conditions by Paulus.\n\n - Move the Bestcomm DMA driver from arch powerpc to drivers/dma where\n it belongs by Philippe De Muyter\n\n - Support for Transactional Memory on Power8 by Michael Neuling\n (based on original work by Matt Evans). For those curious about\n the feature, the patch contains a pretty good description.\"\n\n(See commit db8ff907027b: \"powerpc: Documentation for transactional\nmemory on powerpc\" for the mentioned description added to the file\nDocumentation/powerpc/transactional_memory.txt)\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (140 commits)\n powerpc/kexec: Disable hard IRQ before kexec\n powerpc/85xx: l2sram - Add compatible string for BSC9131 platform\n powerpc/85xx: bsc9131 - Correct typo in SDHC device node\n powerpc/e500/qemu-e500: enable coreint\n powerpc/mpic: allow coreint to be determined by MPIC version\n powerpc/fsl_pci: Store the pci ctlr device ptr in the pci ctlr struct\n powerpc/85xx: Board support for ppa8548\n powerpc/fsl: remove extraneous DIU platform functions\n arch/powerpc/platforms/85xx/p1022_ds.c: adjust duplicate test\n powerpc: Documentation for transactional memory on powerpc\n powerpc: Add transactional memory to pseries and ppc64 defconfigs\n powerpc: Add config option for transactional memory\n powerpc: Add transactional memory to POWER8 cpu features\n powerpc: Add new transactional memory state to the signal context\n powerpc: Hook in new transactional memory code\n powerpc: Routines for FP/VSX/VMX unavailable during a transaction\n powerpc: Add transactional memory unavaliable execption handler\n powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes\n powerpc: Add FP/VSX and VMX register load functions for transactional memory\n powerpc: Add helper functions for transactional memory context switching\n ...\n" }, { "commit": "78c37d191dd6899d8c219fee597a17d6e3c5d288", "tree": "123ed7322996e4e4a6922791d6e3a674ffc05cba", "parents": [ "5c22ba6619796da82ea0aa18c72caf4fe003a329" ], "author": { "name": "Alexander Boyko", "email": "alexander_boyko@xyratex.com", "time": "Thu Jan 10 18:54:59 2013 +0400" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Sun Jan 20 10:16:45 2013 +1100" }, "message": "crypto: crc32 - add crc32 pclmulqdq implementation and wrappers for table implementation\n\nThis patch adds crc32 algorithms to shash crypto api. One is wrapper to\ngerneric crc32_le function. Second is crc32 pclmulqdq implementation. It\nuse hardware provided PCLMULQDQ instruction to accelerate the CRC32 disposal.\nThis instruction present from Intel Westmere and AMD Bulldozer CPUs.\n\nFor intel core i5 I got 450MB/s for table implementation and 2100MB/s\nfor pclmulqdq implementation.\n\nSigned-off-by: Alexander Boyko \u003calexander_boyko@xyratex.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "3b4afaf29e0f508920cc3eafb6cc297aaad494b1", "tree": "560cc093b2356d2bc25ca6dba64b44817a004bfe", "parents": [ "01b35ab7230cd6244318c9d5fb7daddb4b0d6d2e" ], "author": { "name": "Kees Cook", "email": "keescook@chromium.org", "time": "Tue Oct 02 11:16:49 2012 -0700" }, "committer": { "name": "Kees Cook", "email": "keescook@chromium.org", "time": "Fri Jan 11 11:38:05 2013 -0800" }, "message": "crypto: remove depends on CONFIG_EXPERIMENTAL\n\nThe CONFIG_EXPERIMENTAL config item has not carried much meaning for a\nwhile now and is almost always enabled by default. As agreed during the\nLinux kernel summit, remove it from any \"depends on\" lines in Kconfigs.\n\nCC: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\nCC: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nSigned-off-by: Kees Cook \u003ckeescook@chromium.org\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "323a6bf1d6f4ec7907d9d8aacb4ae9590f755dda", "tree": "90b75e02d5d9eb74b424155ae726eef5e7f16ff3", "parents": [ "5c49985c21bba4d2f899e3a97121868a5c58a876" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Sep 13 23:00:49 2012 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Thu Jan 10 14:43:45 2013 +1100" }, "message": "powerpc: Add a powerpc implementation of SHA-1\n\nThis patch adds a crypto driver which provides a powerpc accelerated\nimplementation of SHA-1, accelerated in that it is written in asm.\n\nOriginal patch by Paul, minor fixups for upstream by moi.\n\nLightly tested on 64-bit with the test program here:\n\n http://michael.ellerman.id.au/files/junkcode/sha1test.c\n\nSeems to work, and is \"not slower\" than the generic version.\n\nNeeds testing on 32-bit.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n" }, { "commit": "044ab5257806310a0150146df3b74b8adaa4ebcf", "tree": "0396b6068d9547c28841c1808c48adf97e474e60", "parents": [ "f0fcf2002bf122afe8fe1b74b2cee3710c7e6cd9" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Tue Nov 13 11:43:14 2012 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Dec 06 17:16:26 2012 +0800" }, "message": "crypto: cast5/cast6 - move lookup tables to shared module\n\nCAST5 and CAST6 both use same lookup tables, which can be moved shared module\n\u0027cast_common\u0027.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "d9b1d2e7e10d2e926775b1d3da39da0f51491e54", "tree": "58da273e600536c041e6962136a6295e6c8cfafe", "parents": [ "cf582ccedad02eb9bfdcdb25adfc800dd117b428" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Fri Oct 26 14:49:01 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Nov 09 17:32:32 2012 +0800" }, "message": "crypto: camellia - add AES-NI/AVX/x86_64 assembler implementation of camellia cipher\n\nThis patch adds AES-NI/AVX/x86_64 assembler implementation of Camellia block\ncipher. Implementation process data in sixteen block chunks, which are\nbyte-sliced and AES SubBytes is reused for Camellia s-box with help of pre-\nand post-filtering.\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\ntcrypt test results:\n\nIntel Core i5-2450M:\n\ncamellia-aesni-avx vs camellia-asm-x86_64-2way:\n128bit key: (lrw:256bit) (xts:256bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 0.98x 0.96x 0.99x 0.96x 0.96x 0.95x 0.95x 0.94x 0.97x 0.98x\n64B 0.99x 0.98x 1.00x 0.98x 0.98x 0.99x 0.98x 0.93x 0.99x 0.98x\n256B 2.28x 2.28x 1.01x 2.29x 2.25x 2.24x 1.96x 1.97x 1.91x 1.90x\n1024B 2.57x 2.56x 1.00x 2.57x 2.51x 2.53x 2.19x 2.17x 2.19x 2.22x\n8192B 2.49x 2.49x 1.00x 2.53x 2.48x 2.49x 2.17x 2.17x 2.22x 2.22x\n\n256bit key: (lrw:384bit) (xts:512bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 0.97x 0.98x 0.99x 0.97x 0.97x 0.96x 0.97x 0.98x 0.98x 0.99x\n64B 1.00x 1.00x 1.01x 0.99x 0.98x 0.99x 0.99x 0.99x 0.99x 0.99x\n256B 2.37x 2.37x 1.01x 2.39x 2.35x 2.33x 2.10x 2.11x 1.99x 2.02x\n1024B 2.58x 2.60x 1.00x 2.58x 2.56x 2.56x 2.28x 2.29x 2.28x 2.29x\n8192B 2.50x 2.52x 1.00x 2.56x 2.51x 2.51x 2.24x 2.25x 2.26x 2.29x\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "6a8ce1ef3940e0cab5ff5f11e1cff5301f83fef6", "tree": "3c407b6f40b1dfdf01310348996dc9b939f4e600", "parents": [ "35b80920d4f0253fed03a1c3a345df8578dbd057" ], "author": { "name": "Tim Chen", "email": "tim.c.chen@linux.intel.com", "time": "Thu Sep 27 15:44:22 2012 -0700" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Mon Oct 15 22:18:24 2012 +0800" }, "message": "crypto: crc32c - Optimize CRC32C calculation with PCLMULQDQ instruction\n\nThis patch adds the crc_pcl function that calculates CRC32C checksum using the\nPCLMULQDQ instruction on processors that support this feature. This will\nprovide speedup over using CRC32 instruction only.\nThe usage of PCLMULQDQ necessitate the invocation of kernel_fpu_begin and\nkernel_fpu_end and incur some overhead. So the new crc_pcl function is only\ninvoked for buffer size of 512 bytes or more. Larger sized\nbuffers will expect to see greater speedup. This feature is best used coupled\nwith eager_fpu which reduces the kernel_fpu_begin/end overhead. For\nbuffer size of 1K the speedup is around 1.6x and for buffer size greater than\n4K, the speedup is around 3x compared to original implementation in crc32c-intel\nmodule. Test was performed on Sandy Bridge based platform with constant frequency\nset for cpu.\n\nA white paper detailing the algorithm can be found here:\nhttp://download.intel.com/design/intarch/papers/323405.pdf\n\nSigned-off-by: Tim Chen \u003ctim.c.chen@linux.intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "d25282d1c9b9bc4cda7f9d3c0205108e99aa7a9d", "tree": "f414482d768b015a609924293b779b4ad0b8f764", "parents": [ "b6eea87fc6850d3531a64a27d2323a4498cd4e43", "dbadc17683e6c673a69b236c0f041b931cc55c42" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Oct 14 13:39:34 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Oct 14 13:39:34 2012 -0700" }, "message": "Merge branch \u0027modules-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux\n\nPull module signing support from Rusty Russell:\n \"module signing is the highlight, but it\u0027s an all-over David Howells frenzy...\"\n\nHmm \"Magrathea: Glacier signing key\". Somebody has been reading too much HHGTTG.\n\n* \u0027modules-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (37 commits)\n X.509: Fix indefinite length element skip error handling\n X.509: Convert some printk calls to pr_devel\n asymmetric keys: fix printk format warning\n MODSIGN: Fix 32-bit overflow in X.509 certificate validity date checking\n MODSIGN: Make mrproper should remove generated files.\n MODSIGN: Use utf8 strings in signer\u0027s name in autogenerated X.509 certs\n MODSIGN: Use the same digest for the autogen key sig as for the module sig\n MODSIGN: Sign modules during the build process\n MODSIGN: Provide a script for generating a key ID from an X.509 cert\n MODSIGN: Implement module signature checking\n MODSIGN: Provide module signing public keys to the kernel\n MODSIGN: Automatically generate module signing keys if missing\n MODSIGN: Provide Kconfig options\n MODSIGN: Provide gitignore and make clean rules for extra files\n MODSIGN: Add FIPS policy\n module: signature checking hook\n X.509: Add a crypto key parser for binary (DER) X.509 certificates\n MPILIB: Provide a function to read raw data into an MPI\n X.509: Add an ASN.1 decoder\n X.509: Add simple ASN.1 grammar compiler\n ...\n" }, { "commit": "964f3b3bf49eb84b5831121446a28b76de3fb23a", "tree": "7d299f690c8323c931b59bc142c45ac75097963f", "parents": [ "9a83b46578df149160b1da057656d2f0cfcbb5b6" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Sep 13 15:17:21 2012 +0100" }, "committer": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Mon Oct 08 13:50:12 2012 +1030" }, "message": "KEYS: Implement asymmetric key type\n\nCreate a key type that can be used to represent an asymmetric key type for use\nin appropriate cryptographic operations, such as encryption, decryption,\nsignature generation and signature verification.\n\nThe key type is \"asymmetric\" and can provide access to a variety of\ncryptographic algorithms.\n\nPossibly, this would be better as \"public_key\" - but that has the disadvantage\nthat \"public key\" is an overloaded term.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\n" }, { "commit": "d66e6737d454553e1e62109d8298ede5351178a4", "tree": "c28b205045935b111527f461d2b114daa26e4fb8", "parents": [ "612a9aab56a93533e76e3ad91642db7033e03b69", "c9f97a27ceee84998999bf3341e6d5d207b05539" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Oct 04 09:06:34 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Oct 04 09:06:34 2012 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6\n\nPull crypto update from Herbert Xu:\n - Optimised AES/SHA1 for ARM.\n - IPsec ESN support in talitos and caam.\n - x86_64/avx implementation of cast5/cast6.\n - Add/use multi-algorithm registration helpers where possible.\n - Added IBM Power7+ in-Nest support.\n - Misc fixes.\n\nFix up trivial conflicts in crypto/Kconfig due to the sparc64 crypto\nconfig options being added next to the new ARM ones.\n\n[ Side note: cut-and-paste duplicate help texts make those conflicts\n harder to read than necessary, thanks to git being smart about\n minimizing conflicts and maximizing the common parts... ]\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (71 commits)\n crypto: x86/glue_helper - fix storing of new IV in CBC encryption\n crypto: cast5/avx - fix storing of new IV in CBC encryption\n crypto: tcrypt - add missing tests for camellia and ghash\n crypto: testmgr - make test_aead also test \u0027dst !\u003d src\u0027 code paths\n crypto: testmgr - make test_skcipher also test \u0027dst !\u003d src\u0027 code paths\n crypto: testmgr - add test vectors for CTR mode IV increasement\n crypto: testmgr - add test vectors for partial ctr(cast5) and ctr(cast6)\n crypto: testmgr - allow non-multi page and multi page skcipher tests from same test template\n crypto: caam - increase TRNG clocks per sample\n crypto, tcrypt: remove local_bh_disable/enable() around local_irq_disable/enable()\n crypto: tegra-aes - fix error return code\n crypto: crypto4xx - fix error return code\n crypto: hifn_795x - fix error return code\n crypto: ux500 - fix error return code\n crypto: caam - fix error IDs for SEC v5.x RNG4\n hwrng: mxc-rnga - Access data via structure\n hwrng: mxc-rnga - Adapt clocks to new i.mx clock framework\n crypto: caam - add IPsec ESN support\n crypto: 842 - remove .cra_list initialization\n Revert \"[CRYPTO] cast6: inline bloat--\"\n ...\n" }, { "commit": "97da37b35fc56ed7b2b1583208be0d1327ddcf30", "tree": "b356d5beae869e12f52f5916dd033f57f360e005", "parents": [ "954f9ac43b87b44152b8c21163cefd466a87145e" ], "author": { "name": "Dave Jones", "email": "davej@redhat.com", "time": "Tue Oct 02 17:13:20 2012 -0400" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Oct 02 23:03:14 2012 -0400" }, "message": "crypto: Build SPARC DES algorithms on SPARC only.\n\nAsking for this option on x86 seems a bit pointless.\n\nSigned-off-by: Dave Jones \u003cdavej@redhat.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "f0be44f4fb1faee42635ca5ea06dc9c3e820a35d", "tree": "866c6016f7153ddff778a5eda036934e7eb426ac", "parents": [ "956c203c5e370c7beb766400b5c1a32ec570ce96" ], "author": { "name": "David McCullough", "email": "david_mccullough@mcafee.com", "time": "Fri Sep 07 04:17:02 2012 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Sep 07 04:17:02 2012 +0800" }, "message": "arm/crypto: Add optimized AES and SHA1 routines\n\nAdd assembler versions of AES and SHA1 for ARM platforms. This has provided\nup to a 50% improvement in IPsec/TCP throughout for tunnels using AES128/SHA1.\n\nPlatform CPU SPeed Endian Before (bps) After (bps) Improvement\n\nIXP425 533 MHz big 11217042 15566294 ~38%\nKS8695 166 MHz little 3828549 5795373 ~51%\n\nSigned-off-by: David McCullough \u003cucdevel@gmail.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "81658ad0d92306ceb271994b90cd49ffde10eeda", "tree": "8765d2fffb62a3e22752644ff329b9aec166a3eb", "parents": [ "3705665069944e003b7316ba31b44558864a00de" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Aug 28 12:05:54 2012 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Aug 28 20:51:24 2012 -0700" }, "message": "sparc64: Add CAMELLIA driver making use of the new camellia opcodes.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c5aac2df6577636ef526d87ec6d92796a190b27f", "tree": "8dbd4f06b3aa08f776d173938adacb98fd79dac5", "parents": [ "442a7c40b1dac78588abfe8ed4c97e4bb8b36e73" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Aug 25 22:37:23 2012 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Aug 25 22:37:23 2012 -0700" }, "message": "sparc64: Add DES driver making use of the new des opcodes.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "442a7c40b1dac78588abfe8ed4c97e4bb8b36e73", "tree": "011ab920ea2f5868c01efa91531959d2b26e6368", "parents": [ "9bf4852d3d195f771503d5be547ac940b0b3472a" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Aug 22 20:47:36 2012 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Aug 22 20:47:36 2012 -0700" }, "message": "sparc64: Add CRC32C driver making use of the new crc32c opcode.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "9bf4852d3d195f771503d5be547ac940b0b3472a", "tree": "63508c354ec0f085afd253c204f320af7c53c451", "parents": [ "fa4dfedcc23a589f953750de54eebf986336fa70" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Aug 21 03:58:13 2012 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Aug 22 14:29:33 2012 -0700" }, "message": "sparc64: Add AES driver making use of the new aes opcodes.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "fa4dfedcc23a589f953750de54eebf986336fa70", "tree": "ccc5e857beeed7624bd8929bb9e51a1c37b54853", "parents": [ "775e0c69987a76d08900edbca857425f952c60fb" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Aug 19 21:51:26 2012 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Aug 20 15:08:50 2012 -0700" }, "message": "sparc64: Add MD5 driver making use of the \u0027md5\u0027 instruction.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "775e0c69987a76d08900edbca857425f952c60fb", "tree": "c9a15d3e03685fb4c9eea416b1e55a29f5266308", "parents": [ "86c93b24ef49d64062045c4e3cc2ed4609f6842a" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Aug 19 17:37:56 2012 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Aug 20 15:08:50 2012 -0700" }, "message": "sparc64: Add SHA384/SHA512 driver making use of the \u0027sha512\u0027 instruction.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "86c93b24ef49d64062045c4e3cc2ed4609f6842a", "tree": "10e278a2efa93a1a2cb24ec36c01942722d65116", "parents": [ "4ff28d4ca93b182b8e181b1e1b1d03fd09fdaeb4" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Aug 19 17:11:37 2012 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Aug 20 15:08:49 2012 -0700" }, "message": "sparc64: Add SHA224/SHA256 driver making use of the \u0027sha256\u0027 instruction.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "4ff28d4ca93b182b8e181b1e1b1d03fd09fdaeb4", "tree": "8835512dee7ae0e845b8ee2c1f42894b2d5f9a79", "parents": [ "bab96bda4431602213deb53723d13f73f5308a20" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Aug 19 15:41:53 2012 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Aug 20 15:08:49 2012 -0700" }, "message": "sparc64: Add SHA1 driver making use of the \u0027sha1\u0027 instruction.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "023af608254add7ba037cd634cc5f2fb21ff6420", "tree": "914c114c38c70841d3c794ea03c414dc110dab0c", "parents": [ "35a1fc1873dd6deac6c005ead85424a8ee28183a" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Sun Jul 22 18:18:37 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Mon Aug 20 16:28:10 2012 +0800" }, "message": "crypto: aesni_intel - improve lrw and xts performance by utilizing parallel AES-NI hardware pipelines\n\nUse parallel LRW and XTS encryption facilities to better utilize AES-NI\nhardware pipelines and gain extra performance.\n\nTcrypt benchmark results (async), old vs new ratios:\n\nIntel Core i5-2450M CPU (fam: 6, model: 42, step: 7)\n\naes:128bit\n lrw:256bit xts:256bit\nsize lrw-enc lrw-dec xts-dec xts-dec\n16B 0.99x 1.00x 1.22x 1.19x\n64B 1.38x 1.50x 1.58x 1.61x\n256B 2.04x 2.02x 2.27x 2.29x\n1024B 2.56x 2.54x 2.89x 2.92x\n8192B 2.85x 2.99x 3.40x 3.23x\n\naes:192bit\n lrw:320bit xts:384bit\nsize lrw-enc lrw-dec xts-dec xts-dec\n16B 1.08x 1.08x 1.16x 1.17x\n64B 1.48x 1.54x 1.59x 1.65x\n256B 2.18x 2.17x 2.29x 2.28x\n1024B 2.67x 2.67x 2.87x 3.05x\n8192B 2.93x 2.84x 3.28x 3.33x\n\naes:256bit\n lrw:348bit xts:512bit\nsize lrw-enc lrw-dec xts-dec xts-dec\n16B 1.07x 1.07x 1.18x 1.19x\n64B 1.56x 1.56x 1.70x 1.71x\n256B 2.22x 2.24x 2.46x 2.46x\n1024B 2.76x 2.77x 3.13x 3.05x\n8192B 2.99x 3.05x 3.40x 3.30x\n\nCc: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nReviewed-by: Kim Phillips \u003ckim.phillips@freescale.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "35a1fc1873dd6deac6c005ead85424a8ee28183a", "tree": "0d50a0e0bb3e6c5f8b82ed79c98e5d21101df9a0", "parents": [ "0e16aafb12046e12effbdaab179fbe1a38427ba9" ], "author": { "name": "Seth Jennings", "email": "sjenning@linux.vnet.ibm.com", "time": "Thu Jul 19 09:42:41 2012 -0500" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Aug 01 17:47:56 2012 +0800" }, "message": "powerpc/crypto: add 842 crypto driver\n\nThis patch add the 842 cryptographic API driver that\nsubmits compression requests to the 842 hardware compression\naccelerator driver (nx-compress).\n\nIf the hardware accelerator goes offline for any reason\n(dynamic disable, migration, etc...), this driver will use LZO\nas a software failover for all future compression requests.\nFor decompression requests, the 842 hardware driver contains\na software implementation of the 842 decompressor to support\nthe decompression of data that was compressed before the accelerator\nwent offline.\n\nSigned-off-by: Robert Jennings \u003crcj@linux.vnet.ibm.com\u003e\nSigned-off-by: Seth Jennings \u003csjenning@linux.vnet.ibm.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "4ea1277d301eb776e321684cd4ea95116b4e8847", "tree": "675ef40d239946bc3232861cdf5a84259da09dc6", "parents": [ "9b8b04051d0df1e2c7c31206caff05673a2c685f" ], "author": { "name": "Johannes Goetzfried", "email": "Johannes.Goetzfried@informatik.stud.uni-erlangen.de", "time": "Wed Jul 11 19:38:57 2012 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Aug 01 17:47:30 2012 +0800" }, "message": "crypto: cast6 - add x86_64/avx assembler implementation\n\nThis patch adds a x86_64/avx assembler implementation of the Cast6 block\ncipher. The implementation processes eight blocks in parallel (two 4 block\nchunk AVX operations). The table-lookups are done in general-purpose registers.\nFor small blocksizes the functions from the generic module are called. A good\nperformance increase is provided for blocksizes greater or equal to 128B.\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\nTcrypt benchmark results:\n\nIntel Core i5-2500 CPU (fam:6, model:42, step:7)\n\ncast6-avx-x86_64 vs. cast6-generic\n128bit key: (lrw:256bit) (xts:256bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 0.97x 1.00x 1.01x 1.01x 0.99x 0.97x 0.98x 1.01x 0.96x 0.98x\n64B 0.98x 0.99x 1.02x 1.01x 0.99x 1.00x 1.01x 0.99x 1.00x 0.99x\n256B 1.77x 1.84x 0.99x 1.85x 1.77x 1.77x 1.70x 1.74x 1.69x 1.72x\n1024B 1.93x 1.95x 0.99x 1.96x 1.93x 1.93x 1.84x 1.85x 1.89x 1.87x\n8192B 1.91x 1.95x 0.99x 1.97x 1.95x 1.91x 1.86x 1.87x 1.93x 1.90x\n\n256bit key: (lrw:384bit) (xts:512bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 0.97x 0.99x 1.02x 1.01x 0.98x 0.99x 1.00x 1.00x 0.98x 0.98x\n64B 0.98x 0.99x 1.01x 1.00x 1.00x 1.00x 1.01x 1.01x 0.97x 1.00x\n256B 1.77x 1.83x 1.00x 1.86x 1.79x 1.78x 1.70x 1.76x 1.71x 1.69x\n1024B 1.92x 1.95x 0.99x 1.96x 1.93x 1.93x 1.83x 1.86x 1.89x 1.87x\n8192B 1.94x 1.95x 0.99x 1.97x 1.95x 1.95x 1.87x 1.87x 1.93x 1.91x\n\nSigned-off-by: Johannes Goetzfried \u003cJohannes.Goetzfried@informatik.stud.uni-erlangen.de\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "4d6d6a2c850f89bc9283d02519cb536baba72032", "tree": "8433747260d88000d79849bcd4db0e56b86aa6e4", "parents": [ "a2c5826095562983bf316e3a7eb137ef04a71a24" ], "author": { "name": "Johannes Goetzfried", "email": "Johannes.Goetzfried@informatik.stud.uni-erlangen.de", "time": "Wed Jul 11 19:37:37 2012 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Aug 01 17:47:30 2012 +0800" }, "message": "crypto: cast5 - add x86_64/avx assembler implementation\n\nThis patch adds a x86_64/avx assembler implementation of the Cast5 block\ncipher. The implementation processes sixteen blocks in parallel (four 4 block\nchunk AVX operations). The table-lookups are done in general-purpose registers.\nFor small blocksizes the functions from the generic module are called. A good\nperformance increase is provided for blocksizes greater or equal to 128B.\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\nTcrypt benchmark results:\n\nIntel Core i5-2500 CPU (fam:6, model:42, step:7)\n\ncast5-avx-x86_64 vs. cast5-generic\n64bit key:\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec\n16B 0.99x 0.99x 1.00x 1.00x 1.02x 1.01x\n64B 1.00x 1.00x 0.98x 1.00x 1.01x 1.02x\n256B 2.03x 2.01x 0.95x 2.11x 2.12x 2.13x\n1024B 2.30x 2.24x 0.95x 2.29x 2.35x 2.35x\n8192B 2.31x 2.27x 0.95x 2.31x 2.39x 2.39x\n\n128bit key:\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec\n16B 0.99x 0.99x 1.00x 1.00x 1.01x 1.01x\n64B 1.00x 1.00x 0.98x 1.01x 1.02x 1.01x\n256B 2.17x 2.13x 0.96x 2.19x 2.19x 2.19x\n1024B 2.29x 2.32x 0.95x 2.34x 2.37x 2.38x\n8192B 2.35x 2.32x 0.95x 2.35x 2.39x 2.39x\n\nSigned-off-by: Johannes Goetzfried \u003cJohannes.Goetzfried@informatik.stud.uni-erlangen.de\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "b9b0f080fac541d88eee4d5175c3f6470a9e9189", "tree": "73a08bbeb879382e14d73e0f34548a1f17dd8c37", "parents": [ "a0ca6ca022ac197e159bb5d22a08e3c3aebb242c" ], "author": { "name": "Sebastian Andrzej Siewior", "email": "sebastian@breakpoint.cc", "time": "Tue Jun 26 18:13:46 2012 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:07 2012 +0800" }, "message": "crypto: arc4 - now arc needs blockcipher support\n\nSince commit ce6dd368 (\"crypto: arc4 - improve performance by adding\necb(arc4)) we need to pull in a blkcipher.\n\n|ERROR: \"crypto_blkcipher_type\" [crypto/arc4.ko] undefined!\n|ERROR: \"blkcipher_walk_done\" [crypto/arc4.ko] undefined!\n|ERROR: \"blkcipher_walk_virt\" [crypto/arc4.ko] undefined!\n\nSigned-off-by: Sebastian Andrzej Siewior \u003csebastian@breakpoint.cc\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "a7378d4e552ac139ae1cbbdfebfeaa9b18c948d0", "tree": "dc8960d5ce50ac27f05e02151c7744bb313286b4", "parents": [ "414cb5e7cc6e258fe36e2c3cc3ef1ff2e246c0e3" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Jun 18 14:07:39 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:02 2012 +0800" }, "message": "crypto: twofish-avx - remove duplicated glue code and use shared glue code from glue_helper\n\nNow that shared glue code is available, convert twofish-avx to use it.\n\nCc: Johannes Goetzfried \u003cJohannes.Goetzfried@informatik.stud.uni-erlangen.de\u003e\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "414cb5e7cc6e258fe36e2c3cc3ef1ff2e246c0e3", "tree": "bce5793f8d0e9791ea60d09192d74b482b9a6cfd", "parents": [ "964263afdcbf9d1e85c021acfff0cc68dd168475" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Jun 18 14:07:34 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:02 2012 +0800" }, "message": "crypto: twofish-x86_64-3way - remove duplicated glue code and use shared glue code from glue_helper\n\nNow that shared glue code is available, convert twofish-x86_64-3way to use it.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "964263afdcbf9d1e85c021acfff0cc68dd168475", "tree": "6a9972203d7fa212547aa1bc89098e72fc536c97", "parents": [ "1d0debbd4671a8d302a11837a126d5f87db16bdc" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Jun 18 14:07:29 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:02 2012 +0800" }, "message": "crypto: camellia-x86_64 - remove duplicated glue code and use shared glue code from glue_helper\n\nNow that shared glue code is available, convert camellia-x86_64 to use it.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "1d0debbd4671a8d302a11837a126d5f87db16bdc", "tree": "8bd1032627c7b2bbec8b4bdf86bd9dc39599130c", "parents": [ "596d875052dac6bf084f0c3a3e946fb4709b727b" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Jun 18 14:07:24 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:01 2012 +0800" }, "message": "crypto: serpent-avx: remove duplicated glue code and use shared glue code from glue_helper\n\nNow that shared glue code is available, convert serpent-avx to use it.\n\nCc: Johannes Goetzfried \u003cJohannes.Goetzfried@informatik.stud.uni-erlangen.de\u003e\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "596d875052dac6bf084f0c3a3e946fb4709b727b", "tree": "bd5bf090efd70b60d1c26c1ca7b6a559cbcf72b2", "parents": [ "e81792fbc2a6fa4969f724b959829667fb2d4f01" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Jun 18 14:07:19 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:01 2012 +0800" }, "message": "crypto: serpent-sse2 - split generic glue code to new helper module\n\nNow that serpent-sse2 glue code has been made generic, it can be split to\nseparate module.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "a9629d7142ea22567eaa999232d8a31a7493665a", "tree": "6693434c4fa675478f7c3bca469f29b22670f713", "parents": [ "30a04008827b58c4aafbd1d6a27d6b6ed239e993" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Jun 18 14:07:08 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:01 2012 +0800" }, "message": "crypto: aes_ni - change to use shared ablk_* functions\n\nRemove duplicate ablk_* functions and make use of ablk_helper module instead.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "30a04008827b58c4aafbd1d6a27d6b6ed239e993", "tree": "7c1cb4ead62efb278c0d0154f5fcc08c8ace90bb", "parents": [ "ffaf9156320a077ebf9c5b9a5cf987689dc1a6b3" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Jun 18 14:07:03 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:01 2012 +0800" }, "message": "crypto: twofish-avx - change to use shared ablk_* functions\n\nRemove duplicate ablk_* functions and make use of ablk_helper module instead.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "ffaf9156320a077ebf9c5b9a5cf987689dc1a6b3", "tree": "22a3602bdedfc8809ff09bc9241b98ae3264ff13", "parents": [ "7c76bdd7c3baf6d2431bb801f5b11d2ac195fdd6" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Jun 18 14:06:58 2012 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Jun 27 14:42:00 2012 +0800" }, "message": "crypto: ablk_helper - move ablk_* functions from serpent-sse2/avx glue code to shared module\n\nMove ablk-* functions to separate module to share common code between cipher\nimplementations.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "7efe4076725aeb01722445b56613681aa492c8d6", "tree": "138a24608d523e9794012586a904be0360cfebce", "parents": [ "4da7de4d8be7d18559c56bca446b1161a3b63acc" ], "author": { "name": "Johannes Goetzfried", "email": "Johannes.Goetzfried@informatik.stud.uni-erlangen.de", "time": "Tue Jun 12 16:47:43 2012 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Jun 12 16:47:43 2012 +0800" }, "message": "crypto: serpent - add x86_64/avx assembler implementation\n\nThis patch adds a x86_64/avx assembler implementation of the Serpent block\ncipher. The implementation is very similar to the sse2 implementation and\nprocesses eight blocks in parallel. Because of the new non-destructive three\noperand syntax all move-instructions can be removed and therefore a little\nperformance increase is provided.\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\nTcrypt benchmark results:\n\nIntel Core i5-2500 CPU (fam:6, model:42, step:7)\n\nserpent-avx-x86_64 vs. serpent-sse2-x86_64\n128bit key: (lrw:256bit) (xts:256bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 1.03x 1.01x 1.01x 1.01x 1.00x 1.00x 1.00x 1.00x 1.00x 1.01x\n64B 1.00x 1.00x 1.00x 1.00x 1.00x 0.99x 1.00x 1.01x 1.00x 1.00x\n256B 1.05x 1.03x 1.00x 1.02x 1.05x 1.06x 1.05x 1.02x 1.05x 1.02x\n1024B 1.05x 1.02x 1.00x 1.02x 1.05x 1.06x 1.05x 1.03x 1.05x 1.02x\n8192B 1.05x 1.02x 1.00x 1.02x 1.06x 1.06x 1.04x 1.03x 1.04x 1.02x\n\n256bit key: (lrw:384bit) (xts:512bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 1.01x 1.00x 1.01x 1.01x 1.00x 1.00x 0.99x 1.03x 1.01x 1.01x\n64B 1.00x 1.00x 1.00x 1.00x 1.00x 1.00x 1.00x 1.01x 1.00x 1.02x\n256B 1.05x 1.02x 1.00x 1.02x 1.05x 1.02x 1.04x 1.05x 1.05x 1.02x\n1024B 1.06x 1.02x 1.00x 1.02x 1.07x 1.06x 1.05x 1.04x 1.05x 1.02x\n8192B 1.05x 1.02x 1.00x 1.02x 1.06x 1.06x 1.04x 1.05x 1.05x 1.02x\n\nserpent-avx-x86_64 vs aes-asm (8kB block):\n 128bit 256bit\necb-enc 1.26x 1.73x\necb-dec 1.20x 1.64x\ncbc-enc 0.33x 0.45x\ncbc-dec 1.24x 1.67x\nctr-enc 1.32x 1.76x\nctr-dec 1.32x 1.76x\nlrw-enc 1.20x 1.60x\nlrw-dec 1.15x 1.54x\nxts-enc 1.22x 1.64x\nxts-dec 1.17x 1.57x\n\nSigned-off-by: Johannes Goetzfried \u003cJohannes.Goetzfried@informatik.stud.uni-erlangen.de\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "107778b592576c0c8e8d2ca7a2aa5415a4908223", "tree": "0e07f6abd2acaf69bf25efacf520584d748c860b", "parents": [ "4d03c5047a07a62563e1a8fa798ea258f048bfde" ], "author": { "name": "Johannes Goetzfried", "email": "Johannes.Goetzfried@informatik.stud.uni-erlangen.de", "time": "Mon May 28 15:54:24 2012 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Jun 12 16:46:07 2012 +0800" }, "message": "crypto: twofish - add x86_64/avx assembler implementation\n\nThis patch adds a x86_64/avx assembler implementation of the Twofish block\ncipher. The implementation processes eight blocks in parallel (two 4 block\nchunk AVX operations). The table-lookups are done in general-purpose registers.\nFor small blocksizes the 3way-parallel functions from the twofish-x86_64-3way\nmodule are called. A good performance increase is provided for blocksizes\ngreater or equal to 128B.\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\nTcrypt benchmark results:\n\nIntel Core i5-2500 CPU (fam:6, model:42, step:7)\n\ntwofish-avx-x86_64 vs. twofish-x86_64-3way\n128bit key: (lrw:256bit) (xts:256bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 0.96x 0.97x 1.00x 0.95x 0.97x 0.97x 0.96x 0.95x 0.95x 0.98x\n64B 0.99x 0.99x 1.00x 0.99x 0.98x 0.98x 0.99x 0.98x 0.99x 0.98x\n256B 1.20x 1.21x 1.00x 1.19x 1.15x 1.14x 1.19x 1.20x 1.18x 1.19x\n1024B 1.29x 1.30x 1.00x 1.28x 1.23x 1.24x 1.26x 1.28x 1.26x 1.27x\n8192B 1.31x 1.32x 1.00x 1.31x 1.25x 1.25x 1.28x 1.29x 1.28x 1.30x\n\n256bit key: (lrw:384bit) (xts:512bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 0.96x 0.96x 1.00x 0.96x 0.97x 0.98x 0.95x 0.95x 0.95x 0.96x\n64B 1.00x 0.99x 1.00x 0.98x 0.98x 1.01x 0.98x 0.98x 0.98x 0.98x\n256B 1.20x 1.21x 1.00x 1.21x 1.15x 1.15x 1.19x 1.20x 1.18x 1.19x\n1024B 1.29x 1.30x 1.00x 1.28x 1.23x 1.23x 1.26x 1.27x 1.26x 1.27x\n8192B 1.31x 1.33x 1.00x 1.31x 1.26x 1.26x 1.29x 1.29x 1.28x 1.30x\n\ntwofish-avx-x86_64 vs aes-asm (8kB block):\n 128bit 256bit\necb-enc 1.19x 1.63x\necb-dec 1.18x 1.62x\ncbc-enc 0.75x 1.03x\ncbc-dec 1.23x 1.67x\nctr-enc 1.24x 1.65x\nctr-dec 1.24x 1.65x\nlrw-enc 1.15x 1.53x\nlrw-dec 1.14x 1.52x\nxts-enc 1.16x 1.56x\nxts-dec 1.16x 1.56x\n\nSigned-off-by: Johannes Goetzfried \u003cJohannes.Goetzfried@informatik.stud.uni-erlangen.de\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "f21a7c195cb20cf613147839c4a2bc1fca8c7bd8", "tree": "25acee032cdbf2a2d0d62d8cc28651dcc25c3bbb", "parents": [ "3cb42092ff02edec34bf936b7400b1f1efc8ca43" ], "author": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Sun Apr 08 20:31:22 2012 -0400" }, "committer": { "name": "Al Viro", "email": "viro@zeniv.linux.org.uk", "time": "Mon Apr 09 14:02:13 2012 -0400" }, "message": "um: several x86 hw-dependent crypto modules won\u0027t build on uml\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\n" }, { "commit": "6a0962b22eccc70b8421014022c07efcf194a95e", "tree": "b5f6583deeb3ca02f837ac446e1ecdea10b8a54b", "parents": [ "46c5801eaf86e83cb3a4142ad35188db5011fff0" ], "author": { "name": "Darrick J. Wong", "email": "djwong@us.ibm.com", "time": "Fri Mar 23 15:02:25 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 23 16:58:38 2012 -0700" }, "message": "crypto: crc32c should use library implementation\n\nSince lib/crc32.c now provides crc32c, remove the software implementation\nhere and call the library function instead.\n\nSigned-off-by: Darrick J. Wong \u003cdjwong@us.ibm.com\u003e\nCc: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\nCc: Bob Pearson \u003crpearson@systemfabricworks.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "0b95ec56ae19f61ca664e83766a2180057f0e351", "tree": "dc9b3ee4116b807df10b5832b37d49468d69f3b2", "parents": [ "617ae7c7a1ac04c1d3e4b22add6dfb53b0fd0675" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Mar 05 20:26:47 2012 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Mar 14 17:25:56 2012 +0800" }, "message": "crypto: camellia - add assembler implementation for x86_64\n\nPatch adds x86_64 assembler implementation of Camellia block cipher. Two set of\nfunctions are provided. First set is regular \u0027one-block at time\u0027 encrypt/decrypt\nfunctions. Second is \u0027two-block at time\u0027 functions that gain performance increase\non out-of-order CPUs. Performance of 2-way functions should be equal to 1-way\nfunctions with in-order CPUs.\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\nTcrypt benchmark results:\n\nAMD Phenom II 1055T (fam:16, model:10):\n\ncamellia-asm vs camellia_generic:\n128bit key: (lrw:256bit) (xts:256bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 1.27x 1.22x 1.30x 1.42x 1.30x 1.34x 1.19x 1.05x 1.23x 1.24x\n64B 1.74x 1.79x 1.43x 1.87x 1.81x 1.87x 1.48x 1.38x 1.55x 1.62x\n256B 1.90x 1.87x 1.43x 1.94x 1.94x 1.95x 1.63x 1.62x 1.67x 1.70x\n1024B 1.96x 1.93x 1.43x 1.95x 1.98x 2.01x 1.67x 1.69x 1.74x 1.80x\n8192B 1.96x 1.96x 1.39x 1.93x 2.01x 2.03x 1.72x 1.64x 1.71x 1.76x\n\n256bit key: (lrw:384bit) (xts:512bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 1.23x 1.23x 1.33x 1.39x 1.34x 1.38x 1.04x 1.18x 1.21x 1.29x\n64B 1.72x 1.69x 1.42x 1.78x 1.81x 1.89x 1.57x 1.52x 1.56x 1.65x\n256B 1.85x 1.88x 1.42x 1.86x 1.93x 1.96x 1.69x 1.65x 1.70x 1.75x\n1024B 1.88x 1.86x 1.45x 1.95x 1.96x 1.95x 1.77x 1.71x 1.77x 1.78x\n8192B 1.91x 1.86x 1.42x 1.91x 2.03x 1.98x 1.73x 1.71x 1.78x 1.76x\n\ncamellia-asm vs aes-asm (8kB block):\n 128bit 256bit\necb-enc 1.15x 1.22x\necb-dec 1.16x 1.16x\ncbc-enc 0.85x 0.90x\ncbc-dec 1.20x 1.23x\nctr-enc 1.28x 1.30x\nctr-dec 1.27x 1.28x\nlrw-enc 1.12x 1.16x\nlrw-dec 1.08x 1.10x\nxts-enc 1.11x 1.15x\nxts-dec 1.14x 1.15x\n\nIntel Core2 T8100 (fam:6, model:23, step:6):\n\ncamellia-asm vs camellia_generic:\n128bit key: (lrw:256bit) (xts:256bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 1.10x 1.12x 1.14x 1.16x 1.16x 1.15x 1.02x 1.02x 1.08x 1.08x\n64B 1.61x 1.60x 1.17x 1.68x 1.67x 1.66x 1.43x 1.42x 1.44x 1.42x\n256B 1.65x 1.73x 1.17x 1.77x 1.81x 1.80x 1.54x 1.53x 1.58x 1.54x\n1024B 1.76x 1.74x 1.18x 1.80x 1.85x 1.85x 1.60x 1.59x 1.65x 1.60x\n8192B 1.77x 1.75x 1.19x 1.81x 1.85x 1.86x 1.63x 1.61x 1.66x 1.62x\n\n256bit key: (lrw:384bit) (xts:512bit)\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec\n16B 1.10x 1.07x 1.13x 1.16x 1.11x 1.16x 1.03x 1.02x 1.08x 1.07x\n64B 1.61x 1.62x 1.15x 1.66x 1.63x 1.68x 1.47x 1.46x 1.47x 1.44x\n256B 1.71x 1.70x 1.16x 1.75x 1.69x 1.79x 1.58x 1.57x 1.59x 1.55x\n1024B 1.78x 1.72x 1.17x 1.75x 1.80x 1.80x 1.63x 1.62x 1.65x 1.62x\n8192B 1.76x 1.73x 1.17x 1.78x 1.80x 1.81x 1.64x 1.62x 1.68x 1.64x\n\ncamellia-asm vs aes-asm (8kB block):\n 128bit 256bit\necb-enc 1.17x 1.21x\necb-dec 1.17x 1.20x\ncbc-enc 0.80x 0.82x\ncbc-dec 1.22x 1.24x\nctr-enc 1.25x 1.26x\nctr-dec 1.25x 1.26x\nlrw-enc 1.14x 1.18x\nlrw-dec 1.13x 1.17x\nxts-enc 1.14x 1.18x\nxts-dec 1.14x 1.17x\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "4f58cb90bcb04cfe18f524d1c9a65edef5eb3f51", "tree": "8c686e8b736eed7258921909282c0955543c7d2f", "parents": [ "e7691a1ce341c80ed9504244a36b31c025217391", "08c70fc3a239475122e20b7a21dfae4c264c24f7" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 10 22:01:27 2012 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jan 10 22:01:27 2012 -0800" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (54 commits)\n crypto: gf128mul - remove leftover \"(EXPERIMENTAL)\" in Kconfig\n crypto: serpent-sse2 - remove unneeded LRW/XTS #ifdefs\n crypto: serpent-sse2 - select LRW and XTS\n crypto: twofish-x86_64-3way - remove unneeded LRW/XTS #ifdefs\n crypto: twofish-x86_64-3way - select LRW and XTS\n crypto: xts - remove dependency on EXPERIMENTAL\n crypto: lrw - remove dependency on EXPERIMENTAL\n crypto: picoxcell - fix boolean and / or confusion\n crypto: caam - remove DECO access initialization code\n crypto: caam - fix polarity of \"propagate error\" logic\n crypto: caam - more desc.h cleanups\n crypto: caam - desc.h - convert spaces to tabs\n crypto: talitos - convert talitos_error to struct device\n crypto: talitos - remove NO_IRQ references\n crypto: talitos - fix bad kfree\n crypto: convert drivers/crypto/* to use module_platform_driver()\n char: hw_random: convert drivers/char/hw_random/* to use module_platform_driver()\n crypto: serpent-sse2 - should select CRYPTO_CRYPTD\n crypto: serpent - rename serpent.c to serpent_generic.c\n crypto: serpent - cleanup checkpatch errors and warnings\n ...\n" }, { "commit": "08c70fc3a239475122e20b7a21dfae4c264c24f7", "tree": "bc1371b9f5270d8075575bdefe3abab93cc5906c", "parents": [ "7ba8babf84fa4e9b648e247223043785f596dd23" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Tue Dec 13 12:53:22 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Dec 20 15:20:08 2011 +0800" }, "message": "crypto: gf128mul - remove leftover \"(EXPERIMENTAL)\" in Kconfig\n\nCRYPTO_GF128MUL does not select EXPERIMENTAL anymore so remove the\n\"(EXPERIMENTAL)\" from its name.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "feaf0cfc263ec778fa166e96ac6a9ef37854fec9", "tree": "42517903c6df98972a39c3e24cd2617225860af6", "parents": [ "88715b9ade718564fd8b1318735826370481366b" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Tue Dec 13 12:53:12 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Dec 20 15:20:07 2011 +0800" }, "message": "crypto: serpent-sse2 - select LRW and XTS\n\nserpent-sse2 uses functions from LRW and XTS modules, so selecting would appear\nto be better option than using #ifdefs in serpent_sse2_glue.c to enable/disable\nLRW and XTS features.\n\nThis also fixes build problem when serpent-sse2 would be build into kernel but\nXTS/LRW are build as modules.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "e7cda5d27ed3febf277fe410687c977ae1a31a25", "tree": "71a5775022350e2d33972221a06dedec6c5aed40", "parents": [ "5bcf8e6dd49fec57b5dd96a643c53a048272b625" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Tue Dec 13 12:53:01 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Dec 20 15:20:06 2011 +0800" }, "message": "crypto: twofish-x86_64-3way - select LRW and XTS\n\ntwofish-x86_64-3way uses functions from LRW and XTS modules, so selecting would\nappear to be better option than using #ifdefs in twofish_glue_3way.c to\nenable/disable LRW and XTS features.\n\nThis also fixes build problem when twofish-x86_64-3way would be build into\nkernel but XTS/LRW are build as modules.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "5bcf8e6dd49fec57b5dd96a643c53a048272b625", "tree": "90497dade76ce7aee9fa7502cf4078468ebd5933", "parents": [ "2470a2b2c33455440d0452c8c0248d113e8502a5" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Tue Dec 13 12:52:56 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Dec 20 15:20:06 2011 +0800" }, "message": "crypto: xts - remove dependency on EXPERIMENTAL\n\nXTS has been EXPERIMENTAL since it was introduced in 2007. I\u0027d say by now\nit has seen enough testing to justify removal of EXPERIMENTAL tag.\n\nCC: Rik Snel \u003crsnel@cube.dyndns.org\u003e\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "2470a2b2c33455440d0452c8c0248d113e8502a5", "tree": "7e2ab3d024d80d1f0e4d6442f2a317bee3e22109", "parents": [ "a9c57a9c6afb41951aa08317d0cd65a66aed38df" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Tue Dec 13 12:52:51 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Dec 20 15:20:05 2011 +0800" }, "message": "crypto: lrw - remove dependency on EXPERIMENTAL\n\nLRW has been EXPERIMENTAL since it was introduced in 2006. I\u0027d say by now\nit has seen enough testing to justify removal of EXPERIMENTAL tag.\n\nCC: Rik Snel \u003crsnel@cube.dyndns.org\u003e\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "341975bf3af8f492f8e6ffc3d0fdf6f9c43e1691", "tree": "38c1b7b9305606b4b4ee6ce66e4f3bac632b48d5", "parents": [ "2deed786d99390d5abe06a2a300d0643305bffcb" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Thu Nov 24 08:37:41 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Nov 30 16:12:44 2011 +0800" }, "message": "crypto: serpent-sse2 - should select CRYPTO_CRYPTD\n\nSince serpent_sse2_glue.c uses cryptd, CRYPTO_SERPENT_SSE2_X86_64 and\nCRYPTO_SERPENT_SSE2_586 should be selecting CRYPTO_CRYPTD.\n\nReported-by: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nAcked-by: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "251496dbfc1be38bc43b49651f3d33c02faccc47", "tree": "e17a6704b90b94d0da126eba603fe20cb7ca822c", "parents": [ "937c30d7f560210b0163035edd42b2aef78fed9e" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Wed Nov 09 16:26:31 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Mon Nov 21 16:13:23 2011 +0800" }, "message": "crypto: serpent - add 4-way parallel i586/SSE2 assembler implementation\n\nPatch adds i586/SSE2 assembler implementation of serpent cipher. Assembler\nfunctions crypt data in four block chunks.\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\nTcrypt benchmarks results (serpent-sse2/serpent_generic speed ratios):\n\nIntel Atom N270:\n\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec\n16 0.95x 1.12x 1.02x 1.07x 0.97x 0.98x\n64 1.73x 1.82x 1.08x 1.82x 1.72x 1.73x\n256 2.08x 2.00x 1.04x 2.07x 1.99x 2.01x\n1024 2.28x 2.18x 1.05x 2.23x 2.17x 2.20x\n8192 2.28x 2.13x 1.05x 2.23x 2.18x 2.20x\n\nFull output:\n http://koti.mbnet.fi/axh/kernel/crypto/atom-n270/serpent-generic.txt\n http://koti.mbnet.fi/axh/kernel/crypto/atom-n270/serpent-sse2.txt\n\nUserspace test results:\n\nEncryption/decryption of sse2-i586 vs generic on Intel Atom N270:\n encrypt: 2.35x\n decrypt: 2.54x\n\nEncryption/decryption of sse2-i586 vs generic on AMD Phenom II:\n encrypt: 1.82x\n decrypt: 2.51x\n\nEncryption/decryption of sse2-i586 vs generic on Intel Xeon E7330:\n encrypt: 2.99x\n decrypt: 3.48x\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "937c30d7f560210b0163035edd42b2aef78fed9e", "tree": "c47348474ca6cdda0a87c95f3a6831c732f27b4d", "parents": [ "d19978f58745e586d9385d306d557e7c785abe23" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Wed Nov 09 16:26:25 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Mon Nov 21 16:13:23 2011 +0800" }, "message": "crypto: serpent - add 8-way parallel x86_64/SSE2 assembler implementation\n\nPatch adds x86_64/SSE2 assembler implementation of serpent cipher. Assembler\nfunctions crypt data in eigth block chunks (two 4 block chunk SSE2 operations\nin parallel to improve performance on out-of-order CPUs). Glue code is based\non one from AES-NI implementation, so requests from irq context are redirected\nto cryptd.\n\nv2:\n - add missing include of linux/module.h\n (appearently crypto.h used to include module.h, which changed for 3.2 by\n commit 7c926402a7e8c9b279968fd94efec8700ba3859e)\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\nTcrypt benchmarks results (serpent-sse2/serpent_generic speed ratios):\n\nAMD Phenom II 1055T (fam:16, model:10):\n\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec\n16B 1.03x 1.01x 1.03x 1.05x 1.00x 0.99x\n64B 1.00x 1.01x 1.02x 1.04x 1.02x 1.01x\n256B 2.34x 2.41x 0.99x 2.43x 2.39x 2.40x\n1024B 2.51x 2.57x 1.00x 2.59x 2.56x 2.56x\n8192B 2.50x 2.54x 1.00x 2.55x 2.57x 2.57x\n\nIntel Celeron T1600 (fam:6, model:15, step:13):\n\nsize ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec\n16B 0.97x 0.97x 1.01x 1.01x 1.01x 1.02x\n64B 1.00x 1.00x 1.00x 1.02x 1.01x 1.01x\n256B 3.41x 3.35x 1.00x 3.39x 3.42x 3.44x\n1024B 3.75x 3.72x 0.99x 3.74x 3.75x 3.75x\n8192B 3.70x 3.68x 0.99x 3.68x 3.69x 3.69x\n\nFull output:\n http://koti.mbnet.fi/axh/kernel/crypto/phenom-ii-1055t/serpent-generic.txt\n http://koti.mbnet.fi/axh/kernel/crypto/phenom-ii-1055t/serpent-sse2.txt\n http://koti.mbnet.fi/axh/kernel/crypto/celeron-t1600/serpent-generic.txt\n http://koti.mbnet.fi/axh/kernel/crypto/celeron-t1600/serpent-sse2.txt\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "2290c0d06d82faee87b1ab2d9d4f7bf81ef64379", "tree": "e075e4d5534193f28e6059904f61e5ca03958d3c", "parents": [ "4da669a2e3e5bc70b30a0465f3641528681b5f77", "52e4c2a05256cb83cda12f3c2137ab1533344edb" ], "author": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Sun Nov 13 20:55:35 2011 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Sun Nov 13 20:55:53 2011 +0100" }, "message": "Merge branch \u0027master\u0027 into for-next\n\nSync with Linus tree to have 157550ff (\"mtd: add GPMI-NAND driver\nin the config and Makefile\") as I have patch depending on that one.\n" }, { "commit": "4da669a2e3e5bc70b30a0465f3641528681b5f77", "tree": "be4fc827572c5aa93d5d5b4b0a451af88b41a3e2", "parents": [ "06b19a5526e6133b5f0d902f18e24f3a4220ba7c" ], "author": { "name": "Paul Bolle", "email": "pebolle@tiscali.nl", "time": "Sat Nov 12 21:27:55 2011 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Sun Nov 13 20:49:02 2011 +0100" }, "message": "crypto: drop selects of bogus Kconfig symbol\n\nCommits 2cdc6899a8 (\"crypto: ghash - Add GHASH digest algorithm for\nGCM\") and 0e1227d356 (\"crypto: ghash - Add PCLMULQDQ accelerated\nimplementation\") added \"select CRYPTO_SHASH\" to two entries. That\nKconfig symbol doesn\u0027t exist. These two selects are nops. Drop them.\n\nSigned-off-by: Paul Bolle \u003cpebolle@tiscali.nl\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "d19978f58745e586d9385d306d557e7c785abe23", "tree": "c7e1e9eb8c03bb5f42f2cc9e729e31d969750c6e", "parents": [ "ce3fd840f588d85a8c1be651cf90fa1ba1f029e9" ], "author": { "name": "Valdis.Kletnieks@vt.edu", "email": "Valdis.Kletnieks@vt.edu", "time": "Wed Nov 09 01:29:20 2011 -0500" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Nov 09 20:03:51 2011 +0800" }, "message": "crypto: fix typo in crypto/Kconfig\n\nFix a typo in the Kconfig file help text.\n\nSigned-off-by: Valdis Kletnieks \u003cvaldis.kletnieks@vt.edu\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "5db017aa2809c49ca0a43b0f3ed1267e6be60883", "tree": "eafc22f9a17e32578d95cfad8642137480ca5563", "parents": [ "ea8bdfcff17599e5d80f93e2ae194fbbab7f8d5e" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Nov 01 12:12:43 2011 +1100" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Nov 01 12:12:43 2011 +1100" }, "message": "crypto: user - Depend on NET instead of selecting it\n\nSelecting NET causes all sorts of issues, including a dependency\nloop involving bluetooth. This patch makes it a dependency instead.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "ea8bdfcff17599e5d80f93e2ae194fbbab7f8d5e", "tree": "e9c940a9a330726b6eeef485114995dd9152d82f", "parents": [ "3e721aeb3df3816e283ab18e327cd4652972e213" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Oct 26 17:15:10 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Oct 26 17:15:10 2011 +0200" }, "message": "crypto: user - Add dependency on NET\n\nSince the configuration interface relies on netlink we need to\nselect NET.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "a38f7907b926e4c6c7d389ad96cc38cec2e5a9e9", "tree": "b8b5735b794a5ba98b8dd05ba0c87d3c09971a67", "parents": [ "22e5b20be72e2e166c3ba915b01a59a8eb2dc71f" ], "author": { "name": "Steffen Klassert", "email": "steffen.klassert@secunet.com", "time": "Tue Sep 27 07:23:50 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Oct 21 14:24:03 2011 +0200" }, "message": "crypto: Add userspace configuration API\n\nThis patch adds a basic userspace configuration API for the crypto layer.\nWith this it is possible to instantiate, remove and to show crypto\nalgorithms from userspace.\n\nSigned-off-by: Steffen Klassert \u003csteffen.klassert@secunet.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "8280daad436edb7dd9e7e06fc13bcecb6b2a885c", "tree": "0d4cb032c6da8617bd4a2dd84bd8ef1a605fa19d", "parents": [ "91d41f159d75d602f6001218eec64c5e761475a6" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Mon Sep 26 16:47:25 2011 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Oct 21 14:23:08 2011 +0200" }, "message": "crypto: twofish - add 3-way parallel x86_64 assembler implemention\n\nPatch adds 3-way parallel x86_64 assembly implementation of twofish as new\nmodule. New assembler functions crypt data in three blocks chunks, improving\ncipher performance on out-of-order CPUs.\n\nPatch has been tested with tcrypt and automated filesystem tests.\n\nSummary of the tcrypt benchmarks:\n\nTwofish 3-way-asm vs twofish asm (128bit 8kb block ECB)\n encrypt: 1.3x speed\n decrypt: 1.3x speed\n\nTwofish 3-way-asm vs twofish asm (128bit 8kb block CBC)\n encrypt: 1.07x speed\n decrypt: 1.4x speed\n\nTwofish 3-way-asm vs twofish asm (128bit 8kb block CTR)\n encrypt: 1.4x speed\n\nTwofish 3-way-asm vs AES asm (128bit 8kb block ECB)\n encrypt: 1.0x speed\n decrypt: 1.0x speed\n\nTwofish 3-way-asm vs AES asm (128bit 8kb block CBC)\n encrypt: 0.84x speed\n decrypt: 1.09x speed\n\nTwofish 3-way-asm vs AES asm (128bit 8kb block CTR)\n encrypt: 1.15x speed\n\nFull output:\n http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-twofish-3way-asm-x86_64.txt\n http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-twofish-asm-x86_64.txt\n http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-aes-asm-x86_64.txt\n\nTests were run on:\n vendor_id : AuthenticAMD\n cpu family : 16\n model : 10\n model name : AMD Phenom(tm) II X6 1055T Processor\n\nAlso userspace test were run on:\n vendor_id : GenuineIntel\n cpu family : 6\n model : 15\n model name : Intel(R) Xeon(R) CPU E7330 @ 2.40GHz\n stepping : 11\n\nUserspace test results:\n\nEncryption/decryption of twofish 3-way vs x86_64-asm on AMD Phenom II:\n encrypt: 1.27x\n decrypt: 1.25x\n\nEncryption/decryption of twofish 3-way vs x86_64-asm on Intel Xeon E7330:\n encrypt: 1.36x\n decrypt: 1.36x\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "64b94ceae8c16cd1b2800cac83112d3815be5250", "tree": "c7e3384659522cac32dc85a34e4ed722346a0f91", "parents": [ "7d47b86cfef808c6580b7603c3f17fcaf27e9d14" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Fri Sep 02 01:45:22 2011 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Sep 22 21:25:26 2011 +1000" }, "message": "crypto: blowfish - add x86_64 assembly implementation\n\nPatch adds x86_64 assembly implementation of blowfish. Two set of assembler\nfunctions are provided. First set is regular \u0027one-block at time\u0027\nencrypt/decrypt functions. Second is \u0027four-block at time\u0027 functions that\ngain performance increase on out-of-order CPUs. Performance of 4-way\nfunctions should be equal to 1-way functions with in-order CPUs.\n\nSummary of the tcrypt benchmarks:\n\nBlowfish assembler vs blowfish C (256bit 8kb block ECB)\nencrypt: 2.2x speed\ndecrypt: 2.3x speed\n\nBlowfish assembler vs blowfish C (256bit 8kb block CBC)\nencrypt: 1.12x speed\ndecrypt: 2.5x speed\n\nBlowfish assembler vs blowfish C (256bit 8kb block CTR)\nencrypt: 2.5x speed\n\nFull output:\nhttp://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-blowfish-asm-x86_64.txt\nhttp://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-blowfish-c-x86_64.txt\n\nTests were run on:\n vendor_id\t: AuthenticAMD\n cpu family\t: 16\n model\t\t: 10\n model name\t: AMD Phenom(tm) II X6 1055T Processor\n stepping\t: 0\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "52ba867c8c23dcb24865f80a95c191501e101b9f", "tree": "421448ac9400c97e11a233769ae7993dcf36e70a", "parents": [ "b2bac6acf86d05d8af0499f37d91ecac15722803" ], "author": { "name": "Jussi Kivilinna", "email": "jussi.kivilinna@mbnet.fi", "time": "Fri Sep 02 01:45:07 2011 +0300" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Sep 22 21:25:25 2011 +1000" }, "message": "crypto: blowfish - split generic and common c code\n\nPatch splits up the blowfish crypto routine into a common part (key setup)\nwhich will be used by blowfish crypto modules (x86_64 assembly and generic-c).\n\nAlso fixes errors/warnings reported by checkpatch.\n\nSigned-off-by: Jussi Kivilinna \u003cjussi.kivilinna@mbnet.fi\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "66be895158886a6cd816aa1eaa18965a5c522d8f", "tree": "2eee685d2249cd5973e15303b8101df7c956e607", "parents": [ "7c390170b49337477985be7a624015160ffeb056" ], "author": { "name": "Mathias Krause", "email": "minipli@googlemail.com", "time": "Thu Aug 04 20:19:25 2011 +0200" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Aug 10 19:00:29 2011 +0800" }, "message": "crypto: sha1 - SSSE3 based SHA1 implementation for x86-64\n\nThis is an assembler implementation of the SHA1 algorithm using the\nSupplemental SSE3 (SSSE3) instructions or, when available, the\nAdvanced Vector Extensions (AVX).\n\nTesting with the tcrypt module shows the raw hash performance is up to\n2.3 times faster than the C implementation, using 8k data blocks on a\nCore 2 Duo T5500. For the smalest data set (16 byte) it is still 25%\nfaster.\n\nSince this implementation uses SSE/YMM registers it cannot safely be\nused in every situation, e.g. while an IRQ interrupts a kernel thread.\nThe implementation falls back to the generic SHA1 variant, if using\nthe SSE/YMM registers is not possible.\n\nWith this algorithm I was able to increase the throughput of a single\nIPsec link from 344 Mbit/s to 464 Mbit/s on a Core 2 Quad CPU using\nthe SSSE3 variant -- a speedup of +34.8%.\n\nSaving and restoring SSE/YMM state might make the actual throughput\nfluctuate when there are FPU intensive userland applications running.\nFor example, meassuring the performance using iperf2 directly on the\nmachine under test gives wobbling numbers because iperf2 uses the FPU\nfor each packet to check if the reporting interval has expired (in the\nabove test I got min/max/avg: 402/484/464 MBit/s).\n\nUsing this algorithm on a IPsec gateway gives much more reasonable and\nstable numbers, albeit not as high as in the directly connected case.\nHere is the result from an RFC 2544 test run with a EXFO Packet Blazer\nFTB-8510:\n\n frame size sha1-generic sha1-ssse3 delta\n 64 byte 37.5 MBit/s 37.5 MBit/s 0.0%\n 128 byte 56.3 MBit/s 62.5 MBit/s +11.0%\n 256 byte 87.5 MBit/s 100.0 MBit/s +14.3%\n 512 byte 131.3 MBit/s 150.0 MBit/s +14.2%\n 1024 byte 162.5 MBit/s 193.8 MBit/s +19.3%\n 1280 byte 175.0 MBit/s 212.5 MBit/s +21.4%\n 1420 byte 175.0 MBit/s 218.7 MBit/s +25.0%\n 1518 byte 150.0 MBit/s 181.2 MBit/s +20.8%\n\nThe throughput for the largest frame size is lower than for the\nprevious size because the IP packets need to be fragmented in this\ncase to make there way through the IPsec tunnel.\n\nSigned-off-by: Mathias Krause \u003cminipli@googlemail.com\u003e\nCc: Maxim Locktyukhin \u003cmaxim.locktyukhin@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "d3ec4844d449cf7af9e749f73ba2052fb7b72fc2", "tree": "c515913e85f7e50878c83da2a88bc5a7269d087c", "parents": [ "0003230e8200699860f0b10af524dc47bf8aecad", "df2e301fee3c2c2a87592151397ad7699bb14c37" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jul 25 13:56:39 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Jul 25 13:56:39 2011 -0700" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits)\n fs: Merge split strings\n treewide: fix potentially dangerous trailing \u0027;\u0027 in #defined values/expressions\n uwb: Fix misspelling of neighbourhood in comment\n net, netfilter: Remove redundant goto in ebt_ulog_packet\n trivial: don\u0027t touch files that are removed in the staging tree\n lib/vsprintf: replace link to Draft by final RFC number\n doc: Kconfig: `to be\u0027 -\u003e `be\u0027\n doc: Kconfig: Typo: square -\u003e squared\n doc: Konfig: Documentation/power/{pm \u003d\u003e apm-acpi}.txt\n drivers/net: static should be at beginning of declaration\n drivers/media: static should be at beginning of declaration\n drivers/i2c: static should be at beginning of declaration\n XTENSA: static should be at beginning of declaration\n SH: static should be at beginning of declaration\n MIPS: static should be at beginning of declaration\n ARM: static should be at beginning of declaration\n rcu: treewide: Do not use rcu_read_lock_held when calling rcu_dereference_check\n Update my e-mail address\n PCIe ASPM: forcedly -\u003e forcibly\n gma500: push through device driver tree\n ...\n\nFix up trivial conflicts:\n - arch/arm/mach-ep93xx/dma-m2p.c (deleted)\n - drivers/gpio/gpio-ep93xx.c (renamed and context nearby)\n - drivers/net/r8169.c (just context changes)\n" }, { "commit": "35ed4b35beb875adee4d84f9e5e31449cab13c3f", "tree": "f6f5b077b564ad1bf5ab44149038146005a6795c", "parents": [ "622e040d577dc8a7a6efbfa4f056448f62b4039a" ], "author": { "name": "Michael Witten", "email": "mfwitten@gmail.com", "time": "Sat Jul 09 04:02:31 2011 +0000" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Mon Jul 11 14:23:35 2011 +0200" }, "message": "doc: Kconfig: `to be\u0027 -\u003e `be\u0027\n\nAlso, a comma was inserted to offset a modifier.\n\nSigned-off-by: Michael Witten \u003cmfwitten@gmail.com\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "8af00860c913d5e814f3c10232a0f42e2a964b99", "tree": "8fdbac3c4d56cb9e6a7fa87829fdf17dcc7f7639", "parents": [ "5165e5b112c4fb3a9258d5f6246cbbd44108c181" ], "author": { "name": "Richard Weinberger", "email": "richard@nod.at", "time": "Wed Jun 08 20:56:29 2011 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Jun 30 07:44:01 2011 +0800" }, "message": "crypto: UML build fixes\n\nCRYPTO_GHASH_CLMUL_NI_INTEL and CRYPTO_AES_NI_INTEL cannot be used\non UML.\nCommit 3e02e5cb and 54b6a1b enabled them by accident.\n\nSigned-off-by: Richard Weinberger \u003crichard@nod.at\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "b23b64516500df6b70fcafb820970f18538252cf", "tree": "aba2a9ac7384c4d4b64601bd1969dca703b43b52", "parents": [ "6ef84509f3d439ed2d43ea40080643efec37f54f" ], "author": { "name": "Andy Lutomirski", "email": "luto@mit.edu", "time": "Mon May 16 15:12:47 2011 +1000" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Mon May 16 15:12:47 2011 +1000" }, "message": "crypto: aesni-intel - Merge with fpu.ko\n\nLoading fpu without aesni-intel does nothing. Loading aesni-intel\nwithout fpu causes modes like xts to fail. (Unloading\naesni-intel will restore those modes.)\n\nOne solution would be to make aesni-intel depend on fpu, but it\nseems cleaner to just combine the modules.\n\nThis is probably responsible for bugs like:\nhttps://bugzilla.redhat.com/show_bug.cgi?id\u003d589390\n\nSigned-off-by: Andy Lutomirski \u003cluto@mit.edu\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "8ad225e8e4f530f500c12ec77fd5a51caf6a2f66", "tree": "aa176f04ed5321383a2a45fbcb4bdfed8f01881c", "parents": [ "0686952458780e8a29d5a75dea03472fe2302c5a" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Dec 28 22:56:26 2010 +1100" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Dec 28 22:56:26 2010 +1100" }, "message": "crypto: gf128mul - Remove experimental tag\n\nThis feature no longer needs the experimental tag.\n\nReported-by: Toralf Förster \u003ctoralf.foerster@gmx.de\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "7451708f39db19a8303bb7fb95f00aca9f673cb5", "tree": "556eb5a9c013349660a0717bbf979888b366a39a", "parents": [ "559ad0ff1368baea14dbc3207d55b02bd69bda4b" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Mon Nov 29 22:56:03 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Mon Nov 29 22:56:03 2010 +0800" }, "message": "crypto: af_alg - Add dependency on NET\n\nAdd missing dependency on NET since we require sockets for our\ninterface.\n\nShould really be a select but kconfig doesn\u0027t like that:\n\nnet/Kconfig:6:error: found recursive dependency: NET -\u003e NETWORK_FILESYSTEMS -\u003e AFS_FS -\u003e AF_RXRPC -\u003e CRYPTO -\u003e CRYPTO_USER_API_HASH -\u003e CRYPTO_USER_API -\u003e NET\n\nReported-by: Zimny Lech \u003cnapohybelskurwysynom2010@gmail.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "0d258efb6a58fe047197c3b9cff8746bb176d58a", "tree": "8576f2af5212ec50509de1071cf7afe1ed9531a8", "parents": [ "21ea28abcf825729f9698afd7357dfbf7040d4f8" ], "author": { "name": "Mathias Krause", "email": "minipli@googlemail.com", "time": "Sat Nov 27 16:34:46 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Sat Nov 27 16:34:46 2010 +0800" }, "message": "crypto: aesni-intel - Ported implementation to x86-32\n\nThe AES-NI instructions are also available in legacy mode so the 32-bit\narchitecture may profit from those, too.\n\nTo illustrate the performance gain here\u0027s a short summary of a dm-crypt\nspeed test on a Core i7 M620 running at 2.67GHz comparing both assembler\nimplementations:\n\nx86: i568 aes-ni delta\nECB, 256 bit: 93.8 MB/s 123.3 MB/s +31.4%\nCBC, 256 bit: 84.8 MB/s 262.3 MB/s +209.3%\nLRW, 256 bit: 108.6 MB/s 222.1 MB/s +104.5%\nXTS, 256 bit: 105.0 MB/s 205.5 MB/s +95.7%\n\nAdditionally, due to some minor optimizations, the 64-bit version also\ngot a minor performance gain as seen below:\n\nx86-64: old impl. new impl. delta\nECB, 256 bit: 121.1 MB/s 123.0 MB/s +1.5%\nCBC, 256 bit: 285.3 MB/s 290.8 MB/s +1.9%\nLRW, 256 bit: 263.7 MB/s 265.3 MB/s +0.6%\nXTS, 256 bit: 251.1 MB/s 255.3 MB/s +1.7%\n\nSigned-off-by: Mathias Krause \u003cminipli@googlemail.com\u003e\nReviewed-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "8ff590903d5fc7f5a0a988c38267a3d08e6393a2", "tree": "2e73472f71848945136661c82f50176d6a3db388", "parents": [ "fe869cdb89c95d060c77eea20204d6c91f233b53" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Oct 19 21:31:55 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Nov 26 20:53:59 2010 +0800" }, "message": "crypto: algif_skcipher - User-space interface for skcipher operations\n\nThis patch adds the af_alg plugin for symmetric key ciphers,\ncorresponding to the ablkcipher kernel operation type.\n\nKeys can optionally be set through the setsockopt interface.\n\nOnce a sendmsg call occurs without MSG_MORE no further writes\nmay be made to the socket until all previous data has been read.\n\nIVs and and whether encryption/decryption is performed can be\nset through the setsockopt interface or as a control message\nto sendmsg.\n\nThe interface is completely synchronous, all operations are\ncarried out in recvmsg(2) and will complete prior to the system\ncall returning.\n\nThe splice(2) interface support reading the user-space data directly\nwithout copying (except that the Crypto API itself may copy the data\nif alignment is off).\n\nThe recvmsg(2) interface supports directly writing to user-space\nwithout additional copying, i.e., the kernel crypto interface will\nreceive the user-space address as its output SG list.\n\nThakns to Miloslav Trmac for reviewing this and contributing\nfixes and improvements.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "fe869cdb89c95d060c77eea20204d6c91f233b53", "tree": "fb665d1f162e8bdf978d264ca24d8a07d7380316", "parents": [ "03c8efc1ffeb6b82a22c1af8dd908af349563314" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Oct 19 21:23:00 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Nov 19 17:47:58 2010 +0800" }, "message": "crypto: algif_hash - User-space interface for hash operations\n\nThis patch adds the af_alg plugin for hash, corresponding to\nthe ahash kernel operation type.\n\nKeys can optionally be set through the setsockopt interface.\n\nEach sendmsg call will finalise the hash unless sent with a MSG_MORE\nflag.\n\nPartial hash states can be cloned using accept(2).\n\nThe interface is completely synchronous, all operations will\ncomplete prior to the system call returning.\n\nBoth sendmsg(2) and splice(2) support reading the user-space\ndata directly without copying (except that the Crypto API itself\nmay copy the data if alignment is off).\n\nFor now only the splice(2) interface supports performing digest\ninstead of init/update/final. In future the sendmsg(2) interface\nwill also be modified to use digest/finup where possible so that\nhardware that cannot return a partial hash state can still benefit\nfrom this interface.\n\nThakns to Miloslav Trmac for reviewing this and contributing\nfixes and improvements.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nTested-by: Martin Willi \u003cmartin@strongswan.org\u003e\n" }, { "commit": "03c8efc1ffeb6b82a22c1af8dd908af349563314", "tree": "a2538f6c5151ca92aadac3d52d9703d39d254584", "parents": [ "c2f9bff5ace07fbea03a53c6c3253f6c3a81e9f9" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Oct 19 21:12:39 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Nov 19 17:47:57 2010 +0800" }, "message": "crypto: af_alg - User-space interface for Crypto API\n\nThis patch creates the backbone of the user-space interface for\nthe Crypto API, through a new socket family AF_ALG.\n\nEach session corresponds to one or more connections obtained from\nthat socket. The number depends on the number of inputs/outputs\nof that particular type of operation. For most types there will\nbe a s ingle connection/file descriptor that is used for both input\nand output. AEAD is one of the few that require two inputs.\n\nEach algorithm type will provide its own implementation that plugs\ninto af_alg. They\u0027re keyed using a string such as \"skcipher\" or\n\"hash\".\n\nIOW this patch only contains the boring bits that is required\nto hold everything together.\n\nThakns to Miloslav Trmac for reviewing this and contributing\nfixes and improvements.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nTested-by: Martin Willi \u003cmartin@strongswan.org\u003e\n" }, { "commit": "6d8de74c5caa3e2ce7c9f19c1004dbc76d7c7edb", "tree": "7e6b89478dac700fd1308b560b55f6164b0c2907", "parents": [ "584db6a1b5b80513b272b788e5bda43da982817a" ], "author": { "name": "Justin P. Mattock", "email": "justinmattock@gmail.com", "time": "Sun Sep 12 10:42:47 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Sun Sep 12 10:42:47 2010 +0800" }, "message": "crypto: Kconfig - update broken web addresses\n\nBelow is a patch to update the broken web addresses, in crypto/*\nthat I could locate. Some are just simple typos that needed to be\nfixed, and some had a change in location altogether..\nlet me know if any of them need to be changed and such. \n\nSigned-off-by: Justin P. Mattock \u003cjustinmattock@gmail.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "e84c5480b782c4009ef65b0248be7f0864573d7e", "tree": "a85b72e7de8b48b36ddef12d1835e73c708ba6b9", "parents": [ "537559a5b3ef854772bd89fbb43aa77d0bbfb721" ], "author": { "name": "Chuck Ebbert", "email": "cebbert@redhat.com", "time": "Fri Sep 03 19:17:49 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Sep 03 19:17:49 2010 +0800" }, "message": "crypto: fips - FIPS requires algorithm self-tests\n\nSigned-off-by: Chuck Ebbert \u003ccebbert@redhat.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "00ca28a507b215dcd121735f16764ea4173c4ff9", "tree": "44defaa98c6f5c570ee1ac167757e39f8d5d0e45", "parents": [ "326a6346ffb5b19eb593530d9d3096d409e46f62" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Aug 06 10:34:00 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Aug 06 10:34:00 2010 +0800" }, "message": "crypto: testmgr - Default to no tests\n\nOn Thu, Aug 05, 2010 at 07:01:21PM -0700, Linus Torvalds wrote:\n\u003e On Thu, Aug 5, 2010 at 6:40 PM, Herbert Xu \u003cherbert@gondor.hengli.com.au\u003e wrote:\n\u003e \u003e\n\u003e \u003e -config CRYPTO_MANAGER_TESTS\n\u003e \u003e - bool \"Run algolithms\u0027 self-tests\"\n\u003e \u003e - default y\n\u003e \u003e - depends on CRYPTO_MANAGER2\n\u003e \u003e +config CRYPTO_MANAGER_DISABLE_TESTS\n\u003e \u003e + bool \"Disable run-time self tests\"\n\u003e \u003e + depends on CRYPTO_MANAGER2 \u0026\u0026 EMBEDDED\n\u003e\n\u003e Why do you still want to force-enable those tests? I was going to\n\u003e complain about the \"default y\" anyway, now I\u0027m _really_ complaining,\n\u003e because you\u0027ve now made it impossible to disable those tests. Why?\n\nAs requested, this patch sets the default to y and removes the\nEMBEDDED dependency.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "326a6346ffb5b19eb593530d9d3096d409e46f62", "tree": "c049bbde5ec2e214edb42822688a9c8b2628dfbc", "parents": [ "23a75eee070f1370bee803a34f285cf81eb5f331" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Aug 06 09:40:28 2010 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Aug 06 09:40:28 2010 +0800" }, "message": "crypto: testmgr - Fix test disabling option\n\nThis patch fixes a serious bug in the test disabling patch where\nit can cause an spurious load of the cryptomgr module even when\nit\u0027s compiled in.\n\nIt also negates the test disabling option so that its absence\ncauses tests to be enabled.\n\nThe Kconfig option is also now behind EMBEDDED.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "0b767f96164b2b27488e3daa722ff16e89d49314", "tree": "ce87ec84059ca185aee738235bb8fca942782dd8", "parents": [ "bc94e59662c13516d13e117b6edab4bec487d5a0" ], "author": { "name": "Alexander Shishkin", "email": "virtuoso@slind.org", "time": "Thu Jun 03 20:53:43 2010 +1000" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Jun 03 20:53:43 2010 +1000" }, "message": "crypto: testmgr - add an option to disable cryptoalgos\u0027 self-tests\n\nBy default, CONFIG_CRYPTO_MANAGER_TESTS will be enabled and thus\nself-tests will still run, but it is now possible to disable them\nto gain some time during bootup.\n\nSigned-off-by: Alexander Shishkin \u003cvirtuoso@slind.org\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "bc94e59662c13516d13e117b6edab4bec487d5a0", "tree": "e3e301874bcc669a19546102c3ceab584fdd3d14", "parents": [ "749d811f10a410b64cf4c674c498ec04316ec373" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Jun 03 20:33:06 2010 +1000" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Jun 03 20:33:06 2010 +1000" }, "message": "crypto: pcomp - Fix illegal Kconfig configuration\n\nThe PCOMP Kconfig entry current allows the following combination\nwhich is illegal:\n\nZLIB\u003dy\nPCOMP\u003dy\nALGAPI\u003dm\nALGAPI2\u003dy\nMANAGER\u003dm\nMANAGER2\u003dm\n\nThis patch fixes this by adding PCOMP2 so that PCOMP can select\nALGAPI to propagate the setting to MANAGER2.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "f77f13e22df4a40d237697df496152c8c37f3f2b", "tree": "beccbb0214078d68027f7a17b57be556292475bd", "parents": [ "5239c4ff4ae9e810ba761518ad71b463f0ccbf3c" ], "author": { "name": "Gilles Espinasse", "email": "g.esp@free.fr", "time": "Mon Mar 29 15:41:47 2010 +0200" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Mon Mar 29 15:41:47 2010 +0200" }, "message": "Fix comment and Kconfig typos for \u0027require\u0027 and \u0027fragment\u0027\n\nSigned-off-by: Gilles Espinasse \u003cg.esp@free.fr\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "318ae2edc3b29216abd8a2510f3f80b764f06858", "tree": "ce595adde342f57f379d277b25e4dd206988a052", "parents": [ "25cf84cf377c0aae5dbcf937ea89bc7893db5176", "3e58974027b04e84f68b964ef368a6cd758e2f84" ], "author": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Mon Mar 08 16:55:37 2010 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Mon Mar 08 16:55:37 2010 +0100" }, "message": "Merge branch \u0027for-next\u0027 into for-linus\n\nConflicts:\n\tDocumentation/filesystems/proc.txt\n\tarch/arm/mach-u300/include/mach/debug-macro.S\n\tdrivers/net/qlge/qlge_ethtool.c\n\tdrivers/net/qlge/qlge_main.c\n\tdrivers/net/typhoon.c\n" }, { "commit": "7dd607e82d823e40675b0b87f035ff04dcb0b5c0", "tree": "9c20909ed0e7f3353a8802e365443190a2389414", "parents": [ "5e39df5625fb903587ac8e281fa57d76714996e4" ], "author": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Wed Jan 27 01:00:10 2010 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Fri Feb 05 12:22:41 2010 +0100" }, "message": "crypto: fix typo in Kconfig help text\n\nReported-by: Toralf Förster \u003ctoralf.foerster@gmx.de\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "5068c7a883d1694f0fb3631b664827644153cd08", "tree": "25da5f02280c42a83b278372babbbcab011589ac", "parents": [ "16295bec6398a3eedc9377e1af6ff4c71b98c300" ], "author": { "name": "Steffen Klassert", "email": "steffen.klassert@secunet.com", "time": "Thu Jan 07 15:57:19 2010 +1100" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Jan 07 15:57:19 2010 +1100" }, "message": "crypto: pcrypt - Add pcrypt crypto parallelization wrapper\n\nThis patch adds a parallel crypto template that takes a crypto\nalgorithm and converts it to process the crypto transforms in\nparallel. For the moment only aead algorithms are supported.\n\nSigned-off-by: Steffen Klassert \u003csteffen.klassert@secunet.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "3e02e5cb47e049727a26c9c110867a26972bd0d6", "tree": "8e0b2d4ff98de195422d3aa6b280d3fb07425c5e", "parents": [ "fa4ef8a6af4745bbf3a25789bc7d4f14a3a6d803" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Tue Oct 27 19:07:24 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Oct 27 19:07:24 2009 +0800" }, "message": "crypto: ghash-intel - Fix building failure on x86_32\n\nCLMUL-NI accelerated GHASH should be turned off on non-x86_64 machine.\n\nReported-by: Dave Young \u003chidave.darkstar@gmail.com\u003e\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "0e1227d356e9b2fe0500d6cc7084f752040a1e0e", "tree": "6f059b8e3c31539942ad244e7aadabcb54e8d904", "parents": [ "4c6ab3ee4cdb86cbd4e9400dd22fad7701cbe795" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Mon Oct 19 11:53:06 2009 +0900" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Mon Oct 19 11:53:06 2009 +0900" }, "message": "crypto: ghash - Add PCLMULQDQ accelerated implementation\n\nPCLMULQDQ is used to accelerate the most time-consuming part of GHASH,\ncarry-less multiplication. More information about PCLMULQDQ can be\nfound at:\n\nhttp://software.intel.com/en-us/articles/carry-less-multiplication-and-its-usage-for-computing-the-gcm-mode/\n\nBecause PCLMULQDQ changes XMM state, its usage must be enclosed with\nkernel_fpu_begin/end, which can be used only in process context, the\nacceleration is implemented as crypto_ahash. That is, request in soft\nIRQ context will be defered to the cryptd kernel thread.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "f1939f7c56456d22a559d2c75156e91912a2e97e", "tree": "49b16096a65ccb318777b50e15e3ed2c66db0500", "parents": [ "2bf2901669a564b402cd0e40eb3f941c391e64c4" ], "author": { "name": "Shane Wang", "email": "shane.wang@intel.com", "time": "Wed Sep 02 20:05:22 2009 +1000" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Sep 02 20:05:22 2009 +1000" }, "message": "crypto: vmac - New hash algorithm for intel_txt support\n\nThis patch adds VMAC (a fast MAC) support into crypto framework.\n\nSigned-off-by: Shane Wang \u003cshane.wang@intel.com\u003e\nSigned-off-by: Joseph Cihula \u003cjoseph.cihula@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "4e4ed83be6a64c8c9fe69c77f37a26bb62ed21f7", "tree": "0418205d9bc498177b31c71d99233971ae145bda", "parents": [ "63b5ac286d5d7f668da537cc53a552578f7674a2" ], "author": { "name": "Neil Horman", "email": "nhorman@tuxdriver.com", "time": "Thu Aug 20 17:54:16 2009 +1000" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Aug 20 17:54:16 2009 +1000" }, "message": "crypto: fips - Depend on ansi_cprng\n\nWhat about something like this? It defaults the CPRNG to m and makes FIPS\ndependent on the CPRNG. That way you get a module build by default, but you can\nchange it to y manually during config and still satisfy the dependency, and if\nyou select N it disables FIPS as well. I rather like that better than making\nFIPS a tristate. I just tested it out here and it seems to work well. Let me\nknow what you think\n\nSigned-off-by: Neil Horman \u003cnhorman@tuxdriver.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "73fec1209433d6b33924c1b06122ee217ce98931", "tree": "5551991e2d2bfa5c62fe8589eed6b7df44a450c1", "parents": [ "a8ccc393ddcdff2e0288dc459f03d561ae27b51d" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Aug 13 21:33:06 2009 +1000" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Aug 13 22:41:25 2009 +1000" }, "message": "Revert crypto: fips - Select CPRNG\n\nThis reverts commit 215ccd6f55a2144bd553e0a3d12e1386f02309fd.\n\nIt causes CPRNG and everything selected by it to be built-in\nwhenever FIPS is enabled. The problem is that it is selecting\na tristate from a bool, which is usually not what is intended.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "9382d97af586a47dad312765e35c61aa7ad7fcdd", "tree": "2866deac562a3858b1aa686461c1c3ce16c46287", "parents": [ "2cdc6899a88e2b9c6cb82ebd547bf58932d534df" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Thu Aug 06 15:34:26 2009 +1000" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Aug 06 15:34:26 2009 +1000" }, "message": "crypto: gcm - Use GHASH digest algorithm\n\nRemove the dedicated GHASH implementation in GCM, and uses the GHASH\ndigest algorithm instead. This will make GCM uses hardware accelerated\nGHASH implementation automatically if available.\n\nahash instead of shash interface is used, because some hardware\naccelerated GHASH implementation needs asynchronous interface.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "2cdc6899a88e2b9c6cb82ebd547bf58932d534df", "tree": "37b4c093970fe8f5288cef9150f9d03b26c3b92b", "parents": [ "cbdcf80d8b9486ddb699a044c6f87f25821708cb" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Thu Aug 06 15:32:38 2009 +1000" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Aug 06 15:32:38 2009 +1000" }, "message": "crypto: ghash - Add GHASH digest algorithm for GCM\n\nGHASH is implemented as a shash algorithm. The actual implementation\nis copied from gcm.c. This makes it possible to add\narchitecture/hardware accelerated GHASH implementation.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "215ccd6f55a2144bd553e0a3d12e1386f02309fd", "tree": "c1c70a40344886ffb8822255c40afa1543c2f7dd", "parents": [ "ea4006576945195ed35824acfb4007ca7cb78b70" ], "author": { "name": "Neil Horman", "email": "nhorman@tuxdriver.com", "time": "Sun Jun 21 21:38:03 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Sun Jun 21 21:38:03 2009 +0800" }, "message": "crypto: fips - Select CPRNG\n\nThe ANSI CPRNG has no dependence on FIPS support. FIPS support however,\nrequires the use of the CPRNG. Adjust that depedency relationship in Kconfig.\n\nSigned-off-by: Neil Horman \u003cnhorman@tuxdriver.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "27300176d75e4723e2125e745a98a77bf0133f72", "tree": "2b626cfbf12a914a2eb1152c02e8db91cd397cf2", "parents": [ "a873a5f1c4eda125f506c059a4f8ea48b9f42eff" ], "author": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Jun 19 20:32:58 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Fri Jun 19 20:32:58 2009 +0800" }, "message": "crypto: ansi_cprng - Do not select FIPS\n\nThe RNG should work with FIPS disabled.\n\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "2cf4ac8beb9dc50a315a6155b7b70e754d511958", "tree": "0c4043a1455ab581b4e505604df290acd59ef79e", "parents": [ "150c7e85526e80474b87004f4b420e8834fdeb43" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Sun Mar 29 15:41:20 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Jun 02 14:04:16 2009 +1000" }, "message": "crypto: aes-ni - Add support for more modes\n\nBecause kernel_fpu_begin() and kernel_fpu_end() operations are too\nslow, the performance gain of general mode implementation + aes-aesni\nis almost all compensated.\n\nThe AES-NI support for more modes are implemented as follow:\n\n- Add a new AES algorithm implementation named __aes-aesni without\n kernel_fpu_begin/end()\n\n- Use fpu(\u003cmode\u003e(AES)) to provide kenrel_fpu_begin/end() invoking\n\n- Add \u003cmode\u003e(AES) ablkcipher, which uses cryptd(fpu(\u003cmode\u003e(AES))) to\n defer cryption to cryptd context in soft_irq context.\n\nNow the ctr, lrw, pcbc and xts support are added.\n\nPerformance testing based on dm-crypt shows that cryption time can be\nreduced to 50% of general mode implementation + aes-aesni implementation.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "150c7e85526e80474b87004f4b420e8834fdeb43", "tree": "66ab693aadaacca850f222ac5fa248fddde3ac32", "parents": [ "505fd21d6138545aa5e96aa738975e6a9deb98a9" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Sun Mar 29 15:39:02 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Tue Jun 02 14:04:15 2009 +1000" }, "message": "crypto: fpu - Add template for blkcipher touching FPU\n\nBlkcipher touching FPU need to be enclosed by kernel_fpu_begin() and\nkernel_fpu_end(). If they are invoked in cipher algorithm\nimplementation, they will be invoked for each block, so that\nperformance will be hurt, because they are \"slow\" operations. This\npatch implements \"fpu\" template, which makes these operations to be\ninvoked for each request.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "0c01aed50d4844f54f59e875e05d211e80874464", "tree": "aa80b318c637bce768ff0f659c2affacd410e3ae", "parents": [ "bf68e65ec9ea61e32ab71bef59aa5d24d255241f" ], "author": { "name": "Geert Uytterhoeven", "email": "Geert.Uytterhoeven@sonycom.com", "time": "Wed Mar 04 15:42:15 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Mar 04 15:42:15 2009 +0800" }, "message": "crypto: testmgr - add zlib test\n\nSigned-off-by: Geert Uytterhoeven \u003cGeert.Uytterhoeven@sonycom.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "bf68e65ec9ea61e32ab71bef59aa5d24d255241f", "tree": "ead13a824617ee21e137eb3e75336891e30ed508", "parents": [ "8064efb8740b8a0141d99a181cb5b9a430b1836c" ], "author": { "name": "Geert Uytterhoeven", "email": "Geert.Uytterhoeven@sonycom.com", "time": "Wed Mar 04 15:15:49 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Mar 04 15:16:19 2009 +0800" }, "message": "crypto: zlib - New zlib crypto module, using pcomp\n\nSigned-off-by: Geert Uytterhoeven \u003cGeert.Uytterhoeven@sonycom.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "a1d2f09544065b60598b8167d94a6371bff3e892", "tree": "cd8b88e7ea0cd44e7e369f670f9fdfcba78f4326", "parents": [ "e9cc8bddaea3944fabfebb968bc88d603239beed" ], "author": { "name": "Geert Uytterhoeven", "email": "Geert.Uytterhoeven@sonycom.com", "time": "Wed Mar 04 15:05:33 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Mar 04 15:05:33 2009 +0800" }, "message": "crypto: compress - Add pcomp interface\n\nThe current \"comp\" crypto interface supports one-shot (de)compression only,\ni.e. the whole data buffer to be (de)compressed must be passed at once, and\nthe whole (de)compressed data buffer will be received at once.\nIn several use-cases (e.g. compressed file systems that store files in big\ncompressed blocks), this workflow is not suitable.\nFurthermore, the \"comp\" type doesn\u0027t provide for the configuration of\n(de)compression parameters, and always allocates workspace memory for both\ncompression and decompression, which may waste memory.\n\nTo solve this, add a \"pcomp\" partial (de)compression interface that provides\nthe following operations:\n - crypto_compress_{init,update,final}() for compression,\n - crypto_decompress_{init,update,final}() for decompression,\n - crypto_{,de}compress_setup(), to configure (de)compression parameters\n (incl. allocating workspace memory).\n\nThe (de)compression methods take a struct comp_request, which was mimicked\nafter the z_stream object in zlib, and contains buffer pointer and length\npairs for input and output.\n\nThe setup methods take an opaque parameter pointer and length pair. Parameters\nare supposed to be encoded using netlink attributes, whose meanings depend on\nthe actual (name of the) (de)compression algorithm.\n\nSigned-off-by: Geert Uytterhoeven \u003cGeert.Uytterhoeven@sonycom.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "0a2e821d627ad5ced23cf31137625b81cc205e0f", "tree": "91189bc8b4a558649842721c555df60da5269b06", "parents": [ "254eff771441f4ee7aa9cf770a6e4820492c9dab" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Thu Feb 19 14:44:02 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Feb 19 14:44:02 2009 +0800" }, "message": "crypto: chainiv - Use kcrypto_wq instead of keventd_wq\n\nkeventd_wq has potential starvation problem, so use dedicated\nkcrypto_wq instead.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "254eff771441f4ee7aa9cf770a6e4820492c9dab", "tree": "aa657717e9c52ce7941179c11da78f4173f333c5", "parents": [ "25c38d3fb92fc23af7730a1601bc20af8216ae44" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Thu Feb 19 14:42:19 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Feb 19 14:42:19 2009 +0800" }, "message": "crypto: cryptd - Per-CPU thread implementation based on kcrypto_wq\n\nOriginal cryptd thread implementation has scalability issue, this\npatch solve the issue with a per-CPU thread implementation.\n\nstruct cryptd_queue is defined to be a per-CPU queue, which holds one\nstruct cryptd_cpu_queue for each CPU. In struct cryptd_cpu_queue, a\nstruct crypto_queue holds all requests for the CPU, a struct\nwork_struct is used to run all requests for the CPU.\n\nTesting based on dm-crypt on an Intel Core 2 E6400 (two cores) machine\nshows 19.2% performance gain. The testing script is as follow:\n\n-------------------- script begin ---------------------------\n#!/bin/sh\n\ndmc_create()\n{\n # Create a crypt device using dmsetup\n dmsetup create $2 --table \"0 `blockdev --getsize $1` crypt cbc(aes-asm)?cryptd?plain:plain babebabebabebabebabebabebabebabe 0 $1 0\"\n}\n\ndmsetup remove crypt0\ndmsetup remove crypt1\n\ndd if\u003d/dev/zero of\u003d/dev/ram0 bs\u003d1M count\u003d4 \u003e\u0026 /dev/null\ndd if\u003d/dev/zero of\u003d/dev/ram1 bs\u003d1M count\u003d4 \u003e\u0026 /dev/null\n\ndmc_create /dev/ram0 crypt0\ndmc_create /dev/ram1 crypt1\n\ncat \u003etr.sh \u003c\u003cEOF\n#!/bin/sh\n\nfor n in \\$(seq 10); do\n dd if\u003d/dev/dm-0 of\u003d/dev/null \u003e\u0026 /dev/null \u0026\n dd if\u003d/dev/dm-1 of\u003d/dev/null \u003e\u0026 /dev/null \u0026\ndone\nwait\nEOF\n\nfor n in $(seq 10); do\n /usr/bin/time sh tr.sh\ndone\nrm tr.sh\n-------------------- script end ---------------------------\n\nThe separator of dm-crypt parameter is changed from \"-\" to \"?\", because\n\"-\" is used in some cipher driver name too, and cryptds need to specify\ncipher driver name instead of cipher name.\n\nThe test result on an Intel Core2 E6400 (two cores) is as follow:\n\nwithout patch:\n-----------------wo begin --------------------------\n0.04user 0.38system 0:00.39elapsed 107%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6566minor)pagefaults 0swaps\n0.07user 0.35system 0:00.35elapsed 121%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6567minor)pagefaults 0swaps\n0.06user 0.34system 0:00.30elapsed 135%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6562minor)pagefaults 0swaps\n0.05user 0.37system 0:00.36elapsed 119%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6607minor)pagefaults 0swaps\n0.06user 0.36system 0:00.35elapsed 120%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6562minor)pagefaults 0swaps\n0.05user 0.37system 0:00.31elapsed 136%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6594minor)pagefaults 0swaps\n0.04user 0.34system 0:00.30elapsed 126%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6597minor)pagefaults 0swaps\n0.06user 0.32system 0:00.31elapsed 125%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6571minor)pagefaults 0swaps\n0.06user 0.34system 0:00.31elapsed 134%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6581minor)pagefaults 0swaps\n0.05user 0.38system 0:00.31elapsed 138%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6600minor)pagefaults 0swaps\n-----------------wo end --------------------------\n\n\nwith patch:\n------------------w begin --------------------------\n0.02user 0.31system 0:00.24elapsed 141%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6554minor)pagefaults 0swaps\n0.05user 0.34system 0:00.31elapsed 127%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6606minor)pagefaults 0swaps\n0.07user 0.33system 0:00.26elapsed 155%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6559minor)pagefaults 0swaps\n0.07user 0.32system 0:00.26elapsed 151%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6562minor)pagefaults 0swaps\n0.05user 0.34system 0:00.26elapsed 150%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6603minor)pagefaults 0swaps\n0.03user 0.36system 0:00.31elapsed 124%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6562minor)pagefaults 0swaps\n0.04user 0.35system 0:00.26elapsed 147%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6586minor)pagefaults 0swaps\n0.03user 0.37system 0:00.27elapsed 146%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6562minor)pagefaults 0swaps\n0.04user 0.36system 0:00.26elapsed 154%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6594minor)pagefaults 0swaps\n0.04user 0.35system 0:00.26elapsed 154%CPU (0avgtext+0avgdata 0maxresident)k\n0inputs+0outputs (0major+6557minor)pagefaults 0swaps\n------------------w end --------------------------\n\nThe middle value of elapsed time is:\nwo cryptwq: 0.31\nw cryptwq: 0.26\n\nThe performance gain is about (0.31-0.26)/0.26 \u003d 0.192.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "25c38d3fb92fc23af7730a1601bc20af8216ae44", "tree": "c191112a61457ecbf69d1a477705c87678a44231", "parents": [ "6fe4a28d8855e072036f36ee22f0a8f43f44918f" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Thu Feb 19 14:33:40 2009 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Feb 19 14:33:40 2009 +0800" }, "message": "crypto: api - Use dedicated workqueue for crypto subsystem\n\nUse dedicated workqueue for crypto subsystem\n\nA dedicated workqueue named kcrypto_wq is created to be used by crypto\nsubsystem. The system shared keventd_wq is not suitable for\nencryption/decryption, because of potential starvation problem.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "54b6a1bd5364aca95cd6ffae00f2b64c6511122c", "tree": "b1e288b009df7fefa92ce001d8709b04dd20663f", "parents": [ "1cac2cbc76b9f3fce0d4ccc374e724e7f2533a47" ], "author": { "name": "Huang Ying", "email": "ying.huang@intel.com", "time": "Sun Jan 18 16:28:34 2009 +1100" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Wed Feb 18 16:48:06 2009 +0800" }, "message": "crypto: aes-ni - Add support to Intel AES-NI instructions for x86_64 platform\n\nIntel AES-NI is a new set of Single Instruction Multiple Data (SIMD)\ninstructions that are going to be introduced in the next generation of\nIntel processor, as of 2009. These instructions enable fast and secure\ndata encryption and decryption, using the Advanced Encryption Standard\n(AES), defined by FIPS Publication number 197. The architecture\nintroduces six instructions that offer full hardware support for\nAES. Four of them support high performance data encryption and\ndecryption, and the other two instructions support the AES key\nexpansion procedure.\n\nThe white paper can be downloaded from:\n\nhttp://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf\n\nAES may be used in soft_irq context, but MMX/SSE context can not be\ntouched safely in soft_irq context. So in_interrupt() is checked, if\nin IRQ or soft_irq context, the general x86_64 implementation are used\ninstead.\n\nSigned-off-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "bd9d20dba182ce4541b16b083eccd30fb252b9f4", "tree": "06ddab4f1753b4d7525dc0d40c9b3c7abb0985cd", "parents": [ "f9e2bca6c22d75a289a349f869701214d63b5060" ], "author": { "name": "Adrian-Ken Rueegsegger", "email": "ken@codelabs.ch", "time": "Wed Dec 17 16:49:02 2008 +1100" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Dec 25 11:02:27 2008 +1100" }, "message": "crypto: sha512 - Switch to shash \n\nThis patch changes sha512 and sha384 to the new shash interface.\n\nSigned-off-by: Adrian-Ken Rueegsegger \u003cken@codelabs.ch\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "19e2bf146759aea38fd6c2daea08cb7a6367149b", "tree": "b8b49a02dc72ddf29f36bbfdc3d80056a64aea09", "parents": [ "4946510baac6aaa8658528e3deefc7e9ba2951a9" ], "author": { "name": "Adrian-Ken Rueegsegger", "email": "ken@codelabs.ch", "time": "Sun Dec 07 19:35:38 2008 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Dec 25 11:02:24 2008 +1100" }, "message": "crypto: michael_mic - Switch to shash\n\nThis patch changes michael_mic to the new shash interface.\n\nSigned-off-by: Adrian-Ken Rueegsegger \u003cken@codelabs.ch\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "4946510baac6aaa8658528e3deefc7e9ba2951a9", "tree": "abffe4ff5e4d7b0f5b6fa29a73d6f7de53cbd06d", "parents": [ "f63fbd3d501b4283e1551e195cb74434a838064f" ], "author": { "name": "Adrian-Ken Rueegsegger", "email": "ken@codelabs.ch", "time": "Sun Dec 07 19:34:37 2008 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Dec 25 11:02:22 2008 +1100" }, "message": "crypto: wp512 - Switch to shash\n\nThis patch changes wp512, wp384 and wp256 to the new shash interface.\n\nSigned-off-by: Adrian-Ken Rueegsegger \u003cken@codelabs.ch\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" }, { "commit": "f63fbd3d501b4283e1551e195cb74434a838064f", "tree": "d43019ed57263dc44f15c06a62c46107003dee1b", "parents": [ "50e109b5b9c1f734e91a6e9b557bce48c9a88654" ], "author": { "name": "Adrian-Ken Rueegsegger", "email": "ken@codelabs.ch", "time": "Wed Dec 03 19:58:32 2008 +0800" }, "committer": { "name": "Herbert Xu", "email": "herbert@gondor.apana.org.au", "time": "Thu Dec 25 11:02:21 2008 +1100" }, "message": "crypto: tgr192 - Switch to shash\n\nThis patch changes tgr192, tgr160 and tgr128 to the new shash interface.\n\nSigned-off-by: Adrian-Ken Rueegsegger \u003cken@codelabs.ch\u003e\nSigned-off-by: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\n" } ], "next": "50e109b5b9c1f734e91a6e9b557bce48c9a88654" }