)]}' { "log": [ { "commit": "912d35f86781e64d73be1ef358f703c08905ac37", "tree": "5863ad70f5cdccba0c1cd28f83d173deaf71fb83", "parents": [ "016b661e2f717168e600f3c85f29e1a49f88e004" ], "author": { "name": "Jens Axboe", "email": "axboe@suse.de", "time": "Wed Apr 26 10:59:21 2006 +0200" }, "committer": { "name": "Jens Axboe", "email": "axboe@suse.de", "time": "Wed Apr 26 10:59:21 2006 +0200" }, "message": "[PATCH] Add support for the sys_vmsplice syscall\n\nsys_splice() moves data to/from pipes with a file input/output. sys_vmsplice()\nmoves data to a pipe, with the input being a user address range instead.\n\nThis uses an approach suggested by Linus, where we can hold partial ranges\ninside the pages[] map. Hopefully this will be useful for network\nreceive support as well.\n\nSigned-off-by: Jens Axboe \u003caxboe@suse.de\u003e\n" }, { "commit": "70524490ee2ea1bbf6cee6c106597b3ac25a3fc2", "tree": "c61dd500035bc3e0dea364777de1b7a58b41a75c", "parents": [ "cbb7e577e732f576b9f399bc2600bdc0626c68dc" ], "author": { "name": "Jens Axboe", "email": "axboe@suse.de", "time": "Tue Apr 11 15:51:17 2006 +0200" }, "committer": { "name": "Jens Axboe", "email": "axboe@suse.de", "time": "Tue Apr 11 15:51:17 2006 +0200" }, "message": "[PATCH] splice: add support for sys_tee()\n\nBasically an in-kernel implementation of tee, which uses splice and the\npipe buffers as an intelligent way to pass data around by reference.\n\nWhere the user space tee consumes the input and produces a stdout and\nfile output, this syscall merely duplicates the data inside a pipe to\nanother pipe. No data is copied, the output just grabs a reference to the\ninput pipe data.\n\nSigned-off-by: Jens Axboe \u003caxboe@suse.de\u003e\n" }, { "commit": "b3967dc566bc89df19e9aeb87b2fd483418b02e6", "tree": "97a0fff4c1d59e3395f6b6f9d4a226da3bf58d28", "parents": [ "cde227afe6b997dce08bcfc2aa6e373fb56857b0", "0ffe984917b9cd6ecc19ffbc06f35869d8c18df8" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Apr 11 06:40:17 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Apr 11 06:40:17 2006 -0700" }, "message": "Merge branch \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6\n\n* \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:\n [IA64] Prefetch mmap_sem in ia64_do_page_fault()\n [IA64] Failure to resume after INIT in user space\n [IA64] Pass more data to the MCA/INIT notify_die hooks\n [IA64] always map VGA framebuffer UC, even if it supports WB\n [IA64] fix bug in ia64 __mutex_fastpath_trylock\n [IA64] for_each_possible_cpu: ia64\n [IA64] update HP CSR space discovery via ACPI\n [IA64] Wire up new syscalls {set,get}_robust_list\n [IA64] \u0027msg\u0027 may be used uninitialized in xpc_initiate_allocate()\n [IA64] Wire up new syscall sync_file_range()\n" }, { "commit": "c80d79d746cc48bd94b0ce4f6d4f3c90cd403aaf", "tree": "5aa8d1590d95f8fd820ad797fe03a063b592e9bf", "parents": [ "653edba1a8b2ed018bdfb078131324dfbfe1dd6a" ], "author": { "name": "Yasunori Goto", "email": "y-goto@jp.fujitsu.com", "time": "Mon Apr 10 22:53:53 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Apr 11 06:18:39 2006 -0700" }, "message": "[PATCH] Configurable NODES_SHIFT\n\nCurrent implementations define NODES_SHIFT in include/asm-xxx/numnodes.h for\neach arch. Its definition is sometimes configurable. Indeed, ia64 defines 5\nNODES_SHIFT values in the current git tree. But it looks a bit messy.\n\nSGI-SN2(ia64) system requires 1024 nodes, and the number of nodes already has\nbeen changeable by config. Suitable node\u0027s number may be changed in the\nfuture even if it is other architecture. So, I wrote configurable node\u0027s\nnumber.\n\nThis patch set defines just default value for each arch which needs multi\nnodes except ia64. But, it is easy to change to configurable if necessary.\n\nOn ia64 the number of nodes can be already configured in generic ia64 and SN2\nconfig. But, NODES_SHIFT is defined for DIG64 and HP\u0027S machine too. So, I\nchanged it so that all platforms can be configured via CONFIG_NODES_SHIFT. It\nwould be simpler.\n\nSee also: http://marc.theaimsgroup.com/?l\u003dlinux-kernel\u0026m\u003d114358010523896\u0026w\u003d2\n\nSigned-off-by: Yasunori Goto \u003cy-goto@jp.fujitsu.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Richard Henderson \u003crth@twiddle.net\u003e\nCc: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "958b166c00b39ff0b28ad2bbb32624b9f305a4e1", "tree": "9a7d086f44e4fc034f1f91eed945ef4eabc5fa0c", "parents": [ "2db8d99ffdbed7d2beb1bbdefdcd086dda9dee98" ], "author": { "name": "Keith Owens", "email": "kaos@sgi.com", "time": "Mon Apr 03 15:26:12 2006 +1000" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Apr 07 22:51:51 2006 -0700" }, "message": "[IA64] Pass more data to the MCA/INIT notify_die hooks\n\nThe MCA/INIT handlers maintain important state in the SAL to OS (sos)\narea and in the monarch_cpu flag. Kernel debuggers (such as KDB) need\nthis data, and may need to adjust the monarch_cpu field so make the\ndata available to the notify_die hooks. Define two more events for\ncalling the functions on the notify_die chain.\n\nSigned-off-by: Keith Owens \u003ckaos@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "2db8d99ffdbed7d2beb1bbdefdcd086dda9dee98", "tree": "d1d6b013f5e43c8210871cfb2c7b66bf1adbb93c", "parents": [ "cfab9d0e1da8e08a39759d0fc3bf5e40f0ac2d55" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri Apr 07 22:47:12 2006 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Apr 07 22:47:12 2006 -0700" }, "message": "[IA64] always map VGA framebuffer UC, even if it supports WB\n\nEFI on some machines, e.g., Intel Tiger, reports that the VGA framebuffer\nsupports WB access. ioremap() prefers WB when possible, so it can work\nwhen mapping main memory.\n\nBut it doesn\u0027t make sense to map a framebuffer WB, because the driver\ndoesn\u0027t flush explicitly, so updates won\u0027t make it to the device\nimmediately.\n\nThis is due to Zou Nan hai \u003cnanhai.zou@intel.com\u003e.\n\nMore extensive fix that adds a \"size\" argument coming soon.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: \"Antonino A. Daplas\" \u003cadaplas@pol.net\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "cfab9d0e1da8e08a39759d0fc3bf5e40f0ac2d55", "tree": "e7dd4bbb97374b758bcb169b635b997c12893565", "parents": [ "0681226661754a99de711cda2c2bd12ff9cd2c3b" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Fri Apr 07 17:12:54 2006 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Apr 07 22:39:49 2006 -0700" }, "message": "[IA64] fix bug in ia64 __mutex_fastpath_trylock\n\nThe parenthesis around \"likely\" used in ia64 __mutex_fastpath_trylock\nis incorrect, and it leads to broken mutex_trylock. Here is the\npatch that fixed the bug. I removed the likely altogether because\nthere is no branch and gcc does a reasonable job at predicating the\nreturn value.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "03fbaca36a85a8c923e30abfb1a9a630bf1c5a1d", "tree": "3b3947a7d3365f674b94901fea68ef92abc7c3bb", "parents": [ "b8cd2af862c3cbd428600e1c4f0d3f97c0da54cc" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Mar 28 14:06:20 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Apr 06 14:42:38 2006 -0700" }, "message": "[IA64] update HP CSR space discovery via ACPI\n\nGet rid of the manual search of _CRS, in favor of\nacpi_get_vendor_resource() which is now provided by the ACPI CA. And fall\nback to searching for a consumer-only address space descriptor if no\nvendor-defined resource is found.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b8cd2af862c3cbd428600e1c4f0d3f97c0da54cc", "tree": "eb5f04a684b12437852ca0b46e98026dc0e170cf", "parents": [ "27f4aa3db090ff5bc0e6c192aae6d99b21563b21" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Apr 06 14:20:16 2006 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Apr 06 14:20:16 2006 -0700" }, "message": "[IA64] Wire up new syscalls {set,get}_robust_list\n\nJoin the dots to enable Ingo\u0027s robut futex syscalls.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d905b00b3bc9484d92dd6e9bd9fd8cf66580dc8a", "tree": "34a379a83dad72b7ab56a482167f81703a9b9979", "parents": [ "6246b6128bbe34d0752f119cf7c5111c85fe481d" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Apr 04 14:08:11 2006 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Apr 04 14:08:11 2006 -0700" }, "message": "[IA64] Wire up new syscall sync_file_range()\n\nAlso reserve syscall numbers for {set,get}_robust_list\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "2ab9391dea6e36fed13443c29bf97d3be05f5289", "tree": "8bc492fe3df71457caf8009bd081b9be0ec1074a", "parents": [ "f19180056ea09ec6a5d32e741234451a1e6eba4d" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 31 10:28:29 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 31 10:28:29 2006 -0800" }, "message": "[IA64] Avoid \"u64 foo : 32;\" for gcc3 vs. gcc4 compatibility\n\ngcc3 thinks that a 32-bit field of a u64 type is itself a u64, so\nshould be printed with \"%ld\". gcc4 thinks it needs just \"%d\".\nMake both versions happy by avoiding this construct.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f19180056ea09ec6a5d32e741234451a1e6eba4d", "tree": "386a178dd80773e3b62e6989f4faaaddb9602aa8", "parents": [ "d1127e40e8d75cd3855e35424937c73d0bcec558" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin_zhang@linux.intel.com", "time": "Mon Feb 27 11:37:45 2006 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Mar 30 17:14:12 2006 -0800" }, "message": "[IA64] Export cpu cache info by sysfs\n\nThe patch exports 8 attributes of cpu cache info under\n/sys/devices/system/cpu/cpuX/cache/indexX:\n1) level\n2) type\n3) coherency_line_size\n4) ways_of_associativity\n5) size\n6) shared_cpu_map\n7) attributes\n8) number_of_sets: number_of_sets\u003dsize/ways_of_associativity/coherency_line_size.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d1127e40e8d75cd3855e35424937c73d0bcec558", "tree": "093f020e971827c63d3eed1d646022c581ded2ea", "parents": [ "5abc97aa25b2c41413b3a520faee83f2282d9f18", "c1c57d767100417f63c18da52d7e96f82b2b9e1a" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 30 12:38:18 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 30 12:38:18 2006 -0800" }, "message": "Merge branch \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6\n\n* \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:\n [IA64] ioremap() should prefer WB over UC\n [IA64] Add __mca_table to the DISCARD list in gate.lds\n [IA64] Move __mca_table out of the __init section\n [IA64] simplify some condition checks in iosapic_check_gsi_range\n [IA64] correct some messages and fixes some minor things\n [IA64-SGI] fix for-loop in sn_hwperf_geoid_to_cnode()\n [IA64-SGI] sn_hwperf use of num_online_cpus()\n [IA64] optimize flush_tlb_range on large numa box\n [IA64] lazy_mmu_prot_update needs to be aware of huge pages\n" }, { "commit": "5274f052e7b3dbd81935772eb551dfd0325dfa9d", "tree": "c79f813ec513660edb6f1e4a75cb366c6b84f53f", "parents": [ "5d4fe2c1ce83c3e967ccc1ba3d580c1a5603a866" ], "author": { "name": "Jens Axboe", "email": "axboe@suse.de", "time": "Thu Mar 30 15:15:30 2006 +0200" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 30 12:28:18 2006 -0800" }, "message": "[PATCH] Introduce sys_splice() system call\n\nThis adds support for the sys_splice system call. Using a pipe as a\ntransport, it can connect to files or sockets (latter as output only).\n\nFrom the splice.c comments:\n\n \"splice\": joining two ropes together by interweaving their strands.\n\n This is the \"extended pipe\" functionality, where a pipe is used as\n an arbitrary in-memory buffer. Think of a pipe as a small kernel\n buffer that you can use to transfer data from one end to the other.\n\n The traditional unix read/write is extended with a \"splice()\" operation\n that transfers data buffers to or from a pipe buffer.\n\n Named by Larry McVoy, original implementation from Linus, extended by\n Jens to support splicing to files and fixing the initial implementation\n bugs.\n\nSigned-off-by: Jens Axboe \u003caxboe@suse.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "3283a67d8618c9a292eced23e8753ab64adc6dba", "tree": "b46c784c8b6cca63b8878f8838fa3bbf1604280f", "parents": [ "d89cfe7f1e82d758a7983584c1593795d4e2c098" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Thu Mar 30 10:13:22 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Mar 30 09:04:19 2006 -0800" }, "message": "[IA64] Add __mca_table to the DISCARD list in gate.lds\n\nAdd __mca_table to the DISCARD list for the gate.lds linker script to\navoid broken linker references when linking the final vmlinux file.\n\nAlso add comment to include/asm-ia64/asmmacros.h to avoid anyone else\nhitting this problem in the future.\n\nCredits to James Bottomley \u003cJames.Bottomley@SteelEye.com\u003e for spotting\nthe DISCARD list in gate.lds.S\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "e041c683412d5bf44dc2b109053e3b837b71742d", "tree": "9d271066ef379da0c0fb3b8cb4137abd5d2ebba0", "parents": [ "76b81e2b0e2241accebcc68e126bc5ab958661b9" ], "author": { "name": "Alan Stern", "email": "stern@rowland.harvard.edu", "time": "Mon Mar 27 01:16:30 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 27 08:44:50 2006 -0800" }, "message": "[PATCH] Notifier chain update: API changes\n\nThe kernel\u0027s implementation of notifier chains is unsafe. There is no\nprotection against entries being added to or removed from a chain while the\nchain is in use. The issues were discussed in this thread:\n\n http://marc.theaimsgroup.com/?l\u003dlinux-kernel\u0026m\u003d113018709002036\u0026w\u003d2\n\nWe noticed that notifier chains in the kernel fall into two basic usage\nclasses:\n\n\t\"Blocking\" chains are always called from a process context\n\tand the callout routines are allowed to sleep;\n\n\t\"Atomic\" chains can be called from an atomic context and\n\tthe callout routines are not allowed to sleep.\n\nWe decided to codify this distinction and make it part of the API. Therefore\nthis set of patches introduces three new, parallel APIs: one for blocking\nnotifiers, one for atomic notifiers, and one for \"raw\" notifiers (which is\nreally just the old API under a new name). New kinds of data structures are\nused for the heads of the chains, and new routines are defined for\nregistration, unregistration, and calling a chain. The three APIs are\nexplained in include/linux/notifier.h and their implementation is in\nkernel/sys.c.\n\nWith atomic and blocking chains, the implementation guarantees that the chain\nlinks will not be corrupted and that chain callers will not get messed up by\nentries being added or removed. For raw chains the implementation provides no\nguarantees at all; users of this API must provide their own protections. (The\nidea was that situations may come up where the assumptions of the atomic and\nblocking APIs are not appropriate, so it should be possible for users to\nhandle these things in their own way.)\n\nThere are some limitations, which should not be too hard to live with. For\natomic/blocking chains, registration and unregistration must always be done in\na process context since the chain is protected by a mutex/rwsem. Also, a\ncallout routine for a non-raw chain must not try to register or unregister\nentries on its own chain. (This did happen in a couple of places and the code\nhad to be changed to avoid it.)\n\nSince atomic chains may be called from within an NMI handler, they cannot use\nspinlocks for synchronization. Instead we use RCU. The overhead falls almost\nentirely in the unregister routine, which is okay since unregistration is much\nless frequent that calling a chain.\n\nHere is the list of chains that we adjusted and their classifications. None\nof them use the raw API, so for the moment it is only a placeholder.\n\n ATOMIC CHAINS\n -------------\narch/i386/kernel/traps.c:\t\ti386die_chain\narch/ia64/kernel/traps.c:\t\tia64die_chain\narch/powerpc/kernel/traps.c:\t\tpowerpc_die_chain\narch/sparc64/kernel/traps.c:\t\tsparc64die_chain\narch/x86_64/kernel/traps.c:\t\tdie_chain\ndrivers/char/ipmi/ipmi_si_intf.c:\txaction_notifier_list\nkernel/panic.c:\t\t\t\tpanic_notifier_list\nkernel/profile.c:\t\t\ttask_free_notifier\nnet/bluetooth/hci_core.c:\t\thci_notifier\nnet/ipv4/netfilter/ip_conntrack_core.c:\tip_conntrack_chain\nnet/ipv4/netfilter/ip_conntrack_core.c:\tip_conntrack_expect_chain\nnet/ipv6/addrconf.c:\t\t\tinet6addr_chain\nnet/netfilter/nf_conntrack_core.c:\tnf_conntrack_chain\nnet/netfilter/nf_conntrack_core.c:\tnf_conntrack_expect_chain\nnet/netlink/af_netlink.c:\t\tnetlink_chain\n\n BLOCKING CHAINS\n ---------------\narch/powerpc/platforms/pseries/reconfig.c:\tpSeries_reconfig_chain\narch/s390/kernel/process.c:\t\tidle_chain\narch/x86_64/kernel/process.c\t\tidle_notifier\ndrivers/base/memory.c:\t\t\tmemory_chain\ndrivers/cpufreq/cpufreq.c\t\tcpufreq_policy_notifier_list\ndrivers/cpufreq/cpufreq.c\t\tcpufreq_transition_notifier_list\ndrivers/macintosh/adb.c:\t\tadb_client_list\ndrivers/macintosh/via-pmu.c\t\tsleep_notifier_list\ndrivers/macintosh/via-pmu68k.c\t\tsleep_notifier_list\ndrivers/macintosh/windfarm_core.c\twf_client_list\ndrivers/usb/core/notify.c\t\tusb_notifier_list\ndrivers/video/fbmem.c\t\t\tfb_notifier_list\nkernel/cpu.c\t\t\t\tcpu_chain\nkernel/module.c\t\t\t\tmodule_notify_list\nkernel/profile.c\t\t\tmunmap_notifier\nkernel/profile.c\t\t\ttask_exit_notifier\nkernel/sys.c\t\t\t\treboot_notifier_list\nnet/core/dev.c\t\t\t\tnetdev_chain\nnet/decnet/dn_dev.c:\t\t\tdnaddr_chain\nnet/ipv4/devinet.c:\t\t\tinetaddr_chain\n\nIt\u0027s possible that some of these classifications are wrong. If they are,\nplease let us know or submit a patch to fix them. Note that any chain that\ngets called very frequently should be atomic, because the rwsem read-locking\nused for blocking chains is very likely to incur cache misses on SMP systems.\n(However, if the chain\u0027s callout routines may sleep then the chain cannot be\natomic.)\n\nThe patch set was written by Alan Stern and Chandra Seetharaman, incorporating\nmaterial written by Keith Owens and suggestions from Paul McKenney and Andrew\nMorton.\n\n[jes@sgi.com: restructure the notifier chain initialization macros]\nSigned-off-by: Alan Stern \u003cstern@rowland.harvard.edu\u003e\nSigned-off-by: Chandra Seetharaman \u003csekharan@us.ibm.com\u003e\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "66e863acd7f2fb02fef709d5f0ab069445d4a58c", "tree": "fdea0fc71150b579d96f385efd25a87e613bbab4", "parents": [ "22a9835c350782a5c3257343713932af3ac92ee0" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Mar 27 01:16:06 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 27 08:44:48 2006 -0800" }, "message": "[PATCH] ia64: add ptr_to_compat()\n\nAdd ptr_to_compat() to ia64 - needed by the robust-futex code.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "0ecd702bcb924d5fb7f687e09986f688336ac896", "tree": "50b9caabc044fb9780cc2a794aabb9d3a7fbf029", "parents": [ "655a0443470a73d5dc36e974a241e8db59bb1ccb" ], "author": { "name": "KAMEZAWA Hiroyuki", "email": "kamezawa.hiroyu@jp.fujitsu.com", "time": "Mon Mar 27 01:15:53 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Mar 27 08:44:47 2006 -0800" }, "message": "[PATCH] unify pfn_to_page: ia64 pfn_to_page\n\nia64 has special config CONFIG_VIRTUAL_MEM_MAP.\nCONFIG_DISCONTIGMEM\u003dy \u0026\u0026 CONFIG_VIRTUAL_MEM_MAP!\u003dy is bug ?\n\nSigned-off-by: KAMEZAWA Hiroyuki \u003ckamezawa.hiroyu@jp.fujitsu.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "2875aef8bd0e42367a66a78ef7abe10f3bba27b5", "tree": "44f81fa0e5c3f5bcf90eb1d6326c1eff9915dfbd", "parents": [ "1cc2b9943b7b3a8d526aa8be5450d3ec083c3de4" ], "author": { "name": "Akinobu Mita", "email": "mita@miraclelinux.com", "time": "Sun Mar 26 01:39:25 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:57:12 2006 -0800" }, "message": "[PATCH] bitops: ia64: use generic bitops\n\n- remove generic_fls64()\n- remove find_{next,first}{,_zero}_bit()\n- remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()\n- remove minix_{test,set,test_and_clear,test,find_first_zero}_bit()\n- remove sched_find_first_bit()\n\nSigned-off-by: Akinobu Mita \u003cmita@miraclelinux.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "67b0ad574b5ee90f8ea58196ff8a7f3780b75365", "tree": "ca9bc212f6efa8f5170185ef1fa21f75de0684fd", "parents": [ "72b61a3cfd80d1321eb898be8ceae2064f0fbea1" ], "author": { "name": "Akinobu Mita", "email": "mita@miraclelinux.com", "time": "Sun Mar 26 01:39:05 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:57:10 2006 -0800" }, "message": "[PATCH] bitops: use non atomic operations for minix_*_bit() and ext2_*_bit()\n\nBitmap functions for the minix filesystem and the ext2 filesystem except\next2_set_bit_atomic() and ext2_clear_bit_atomic() do not require the atomic\nguarantees.\n\nBut these are defined by using atomic bit operations on several architectures.\n (cris, frv, h8300, ia64, m32r, m68k, m68knommu, mips, s390, sh, sh64, sparc,\nsparc64, v850, and xtensa)\n\nThis patch switches to non atomic bit operation.\n\nSigned-off-by: Akinobu Mita \u003cmita@miraclelinux.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b2c99e3c70d77fb194df5aa1642030080d28ea48", "tree": "65f2a173e49b3e15e90b8cabf45b7dd4f3691e29", "parents": [ "27d8e3d15bcf9d7cd99bf6ca910ea9e34328c7fb" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Sun Mar 26 01:37:08 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:56:54 2006 -0800" }, "message": "[PATCH] EFI: keep physical table addresses in efi structure\n\nAlmost all users of the table addresses from the EFI system table want\nphysical addresses. So rather than doing the pa-\u003eva-\u003epa conversion, just keep\nphysical addresses in struct efi.\n\nThis fixes a DMI bug: the efi structure contained the physical SMBIOS address\non x86 but the virtual address on ia64, so dmi_scan_machine() used ioremap()\non a virtual address on ia64.\n\nThis is essentially the same as an earlier patch by Matt Tolentino:\n\thttp://marc.theaimsgroup.com/?l\u003dlinux-kernel\u0026m\u003d112130292316281\u0026w\u003d2\nexcept that this changes all table addresses, not just ACPI addresses.\n\nMatt\u0027s original patch was backed out because it caused MCAs on HP sx1000\nsystems. That problem is resolved by the ioremap() attribute checking added\nfor ia64.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nCc: \"Tolentino, Matthew E\" \u003cmatthew.e.tolentino@intel.com\u003e\nCc: \"Brown, Len\" \u003clen.brown@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nAcked-by: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "e9b0a0712148abe96ff717a2b9f8dab1d433e0d5", "tree": "3f4415797d49f477c9c7516625c74438f31673f8", "parents": [ "136939a2b5aa4302281215745ccd567e1df2e8d4" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Sun Mar 26 01:37:06 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:56:54 2006 -0800" }, "message": "[PATCH] ia64: ioremap: check EFI for valid memory attributes\n\nCheck the EFI memory map so we can use the correct memory attributes for\nioremap(). Previously, we always used uncacheable access, which blows up on\nsome machines for regular system memory.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nCc: \"Tolentino, Matthew E\" \u003cmatthew.e.tolentino@intel.com\u003e\nCc: \"Brown, Len\" \u003clen.brown@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nAcked-by: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "136939a2b5aa4302281215745ccd567e1df2e8d4", "tree": "384841deada5b0ceb44c255e0474866bbc8d3354", "parents": [ "3ed3bce846abc7ef460104b461cac793e41afe5e" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Sun Mar 26 01:37:05 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:56:54 2006 -0800" }, "message": "[PATCH] EFI, /dev/mem: simplify efi_mem_attribute_range()\n\nPass the size, not a pointer to the size, to efi_mem_attribute_range().\n\nThis function validates memory regions for the /dev/mem read/write/mmap paths.\nThe pointer allows arches to reduce the size of the range, but I think that\u0027s\nunnecessary complexity. Simplifying it will let me use\nefi_mem_attribute_range() to improve the ia64 ioremap() implementation.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nCc: \"Tolentino, Matthew E\" \u003cmatthew.e.tolentino@intel.com\u003e\nCc: \"Brown, Len\" \u003clen.brown@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nAcked-by: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "3ed3bce846abc7ef460104b461cac793e41afe5e", "tree": "6db86a6cdfd3600db4e24cd91f53ba6f4f661280", "parents": [ "10dbe196a8da6b3196881269c6639c0ec11c36cb" ], "author": { "name": "Matt Domsch", "email": "Matt_Domsch@dell.com", "time": "Sun Mar 26 01:37:03 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:56:54 2006 -0800" }, "message": "[PATCH] ia64: use i386 dmi_scan.c\n\nEnable DMI table parsing on ia64.\n\nAndi Kleen has a patch in his x86_64 tree which enables the use of i386\ndmi_scan.c on x86_64. dmi_scan.c functions are being used by the\ndrivers/char/ipmi/ipmi_si_intf.c driver for autodetecting the ports or\nmemory spaces where the IPMI controllers may be found.\n\nThis patch adds equivalent changes for ia64 as to what is in the x86_64\ntree. In addition, I reworked the DMI detection, such that on EFI-capable\nsystems, it uses the efi.smbios pointer to find the table, rather than\nbrute-force searching from 0xF0000. On non-EFI systems, it continues the\nbrute-force search.\n\nMy test system, an Intel S870BN4 \u0027Tiger4\u0027, aka Dell PowerEdge 7250, with\nlatest BIOS, does not list the IPMI controller in the ACPI namespace, nor\ndoes it have an ACPI SPMI table. Also note, currently shipping Dell x8xx\nEM64T servers don\u0027t have these either, so DMI is the only method for\nobtaining the address of the IPMI controller.\n\nSigned-off-by: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nAcked-by: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "7d14f145f839b5d0d221ea209b4998f93267e2ec", "tree": "669d09ad53c9de9ef2e6cef06d256a811d509d65", "parents": [ "2e1ca21d46aaef95101723fa402f39d3a95aba59", "4129a953ad4db379d8e07b0dd2157998653a1325" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Mar 25 08:49:25 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Mar 25 08:49:25 2006 -0800" }, "message": "Merge branch \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6\n\n* \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:\n [IA64] New IA64 core/thread detection patch\n [IA64] Increase max node count on SN platforms\n [IA64] Increase max node count on SN platforms\n [IA64] Increase max node count on SN platforms\n [IA64] Increase max node count on SN platforms\n [IA64] Tollhouse HP: IA64 arch changes\n [IA64] cleanup dig_irq_init\n [IA64] MCA recovery: kernel context recovery table\n IA64: Use early_parm to handle mvec_name and nomca\n [IA64] move patchlist and machvec into init section\n [IA64] add init declaration - nolwsys\n [IA64] add init declaration - gate page functions\n [IA64] add init declaration to memory initialization functions\n [IA64] add init declaration to cpu initialization functions\n [IA64] add __init declaration to mca functions\n [IA64] Ignore disabled Local SAPIC Affinity Structure in SRAT\n [IA64] sn_check_intr: use ia64_get_irr()\n [IA64] fix ia64 is_hugepage_only_range\n" }, { "commit": "f348d70a324e15afc701a494f32ec468abb7d1eb", "tree": "a4cb43429f7f08a6621c581bd99e4a03198e8c67", "parents": [ "501f2499b897ca4be68b1acc7a4bc8cf66f5fd24" ], "author": { "name": "Davide Libenzi", "email": "davidel@xmailserver.org", "time": "Sat Mar 25 03:07:39 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Mar 25 08:22:56 2006 -0800" }, "message": "[PATCH] POLLRDHUP/EPOLLRDHUP handling for half-closed devices notifications\n\nImplement the half-closed devices notifiation, by adding a new POLLRDHUP\n(and its alias EPOLLRDHUP) bit to the existing poll/select sets. Since the\nexisting POLLHUP handling, that does not report correctly half-closed\ndevices, was feared to be changed, this implementation leaves the current\nPOLLHUP reporting unchanged and simply add a new bit that is set in the few\nplaces where it makes sense. The same thing was discussed and conceptually\nagreed quite some time ago:\n\nhttp://lkml.org/lkml/2003/7/12/116\n\nSince this new event bit is added to the existing Linux poll infrastruture,\neven the existing poll/select system calls will be able to use it. As far\nas the existing POLLHUP handling, the patch leaves it as is. The\npollrdhup-2.6.16.rc5-0.10.diff defines the POLLRDHUP for all the existing\narchs and sets the bit in the six relevant files. The other attached diff\nis the simple change required to sys/epoll.h to add the EPOLLRDHUP\ndefinition.\n\nThere is \"a stupid program\" to test POLLRDHUP delivery here:\n\n http://www.xmailserver.org/pollrdhup-test.c\n\nIt tests poll(2), but since the delivery is same epoll(2) will work equally.\n\nSigned-off-by: Davide Libenzi \u003cdavidel@xmailserver.org\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Michael Kerrisk \u003cmtk-manpages@gmx.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "4129a953ad4db379d8e07b0dd2157998653a1325", "tree": "84c6d310953044caa420410165adcd0dfb2ac55f", "parents": [ "4d357acadd7a5e60767c748ed7807e11c4387bdf" ], "author": { "name": "Fenghua Yu", "email": "fenghua.yu@intel.com", "time": "Mon Feb 27 16:16:22 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 24 13:15:23 2006 -0800" }, "message": "[IA64] New IA64 core/thread detection patch\n\nIPF SDM 2.2 changes definition of PAL_LOGICAL_TO_PHYSICAL to add\nproc_number\u003d-1 to get core/thread mapping info on the running processer.\n\nBased on this change, we had better to update existing core/thread\ndetection in IA64 kernel correspondingly. The attached patch implements\nthis change. It simplifies detection code and eliminates potential race\ncondition. It also runs a bit faster and has better scalability especially\nwhen cores and threads number grows up in one package.\n\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a9de98351436b25b3c2f234addb6d66a6a6f42f8", "tree": "72291671fe518c192ae2ba08c4dffb28b1a13f8b", "parents": [ "3ad5ef8b9d0d0cc2d4b2c63e766ef903d482dfc7" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Thu Mar 02 16:02:28 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 24 13:14:41 2006 -0800" }, "message": "[IA64] Increase max node count on SN platforms\n\nNode number are kept in the cpu_to_node_map which is\ncurrently defined as u8. Change to u16 to accomodate\nlarger node numbers.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "3ad5ef8b9d0d0cc2d4b2c63e766ef903d482dfc7", "tree": "c17d6073e4629bdf59972d5800368c12c5147aff", "parents": [ "b354a8388891adc5dc5e5fb0130f000152f3fb94" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Thu Mar 02 16:02:25 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 24 13:14:21 2006 -0800" }, "message": "[IA64] Increase max node count on SN platforms\n\nAdd support in IA64 acpi for platforms that support more than\n256 nodes. Currently, ACPI is limited to 256 nodes because the\nproximity domain number is 8-bits.\n\nLong term, we expect to use ACPI3.0 to support \u003e256 nodes.\nThis patch is an interim solution that works with platforms\nthat pass the high order bits of the proximity domain in\n\"reserved\" fields of the ACPI tables. This code is enabled\nONLY on SN platforms.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b354a8388891adc5dc5e5fb0130f000152f3fb94", "tree": "17ddef0b367ed0279f8f10d5d9af73ecd01e3db9", "parents": [ "f90aa8c4febb306e1266e1ad34fd8464e201aa7f" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Thu Mar 02 16:02:21 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 24 13:14:03 2006 -0800" }, "message": "[IA64] Increase max node count on SN platforms\n\nAdd a configuration option to allow the maximum\nnumber of nodes to be configurable for GENERIC or SN\nkernels.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f90aa8c4febb306e1266e1ad34fd8464e201aa7f", "tree": "01df1912a309560098bb6e49c39f4bcba4a3b0cb", "parents": [ "b17ea91a43ea0c746ab4cabb698275e1771ed23d" ], "author": { "name": "Prarit Bhargava", "email": "prarit@sgi.com", "time": "Wed Mar 08 13:30:18 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 24 13:13:06 2006 -0800" }, "message": "[IA64] Tollhouse HP: IA64 arch changes\n\narch/ia64/sn and include/asm-ia64/sn changes required to support Tollhouse\nsystem PCI hotplug, fixes the ia64_sn_sysctl_ioboard_get call, and introduces\nthe PRF_HOTPLUG_SUPPORT feature bit.\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b17ea91a43ea0c746ab4cabb698275e1771ed23d", "tree": "dcbcfa816678db9bc8f4fb67bb6bfdfa0252b249", "parents": [ "d2a28ad9fa7bf16761d070d8a3338375e1574b32" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Sun Mar 12 11:10:00 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 24 13:12:46 2006 -0800" }, "message": "[IA64] cleanup dig_irq_init\n\ndig_irq_init is equivalent to machvec_noop, no need to define\nanother empty function.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d2a28ad9fa7bf16761d070d8a3338375e1574b32", "tree": "9da2c18c91a4ee12fa6a9b2d23dcb55d13dd0ca8", "parents": [ "a5b00bb4fe60796c791238cf5653b82110031c93" ], "author": { "name": "Russ Anderson", "email": "rja@sgi.com", "time": "Fri Mar 24 09:49:52 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 24 09:49:52 2006 -0800" }, "message": "[IA64] MCA recovery: kernel context recovery table\n\nMemory errors encountered by user applications may surface\nwhen the CPU is running in kernel context. The current code\nwill not attempt recovery if the MCA surfaces in kernel\ncontext (privilage mode 0). This patch adds a check for cases\nwhere the user initiated the load that surfaces in kernel\ninterrupt code.\n\nAn example is a user process lauching a load from memory\nand the data in memory had bad ECC. Before the bad data\ngets to the CPU register, and interrupt comes in. The\ncode jumps to the IVT interrupt entry point and begins\nexecution in kernel context. The process of saving the\nuser registers (SAVE_REST) causes the bad data to be loaded\ninto a CPU register, triggering the MCA. The MCA surfaces in\nkernel context, even though the load was initiated from\nuser context.\n\nAs suggested by David and Tony, this patch uses an exception\ntable like approach, puting the tagged recovery addresses in\na searchable table. One difference from the exception table\nis that MCAs do not surface in precise places (such as with\na TLB miss), so instead of tagging specific instructions,\naddress ranges are registers. A single macro is used to do\nthe tagging, with the input parameter being the label\nof the starting address and the macro being the ending\naddress. This limits clutter in the code.\n\nThis patch only tags one spot, the interrupt ivt entry.\nTesting showed that spot to be a \"heavy hitter\" with\nMCAs surfacing while saving user registers. Other spots\ncan be added as needed by adding a single macro.\n\nSigned-off-by: Russ Anderson (rja@sgi.com)\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "ab7efcc97ebc92e03c0474dfd38f9c7b84b84115", "tree": "b0eb6b9abce5c47af9c61b606f37ec1c4d247e65", "parents": [ "09fe316a7b10219be592118626850e1dfdfcc1aa" ], "author": { "name": "Jan Beulich", "email": "jbeulich@novell.com", "time": "Fri Mar 24 03:16:17 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Mar 24 07:33:25 2006 -0800" }, "message": "[PATCH] abstract type/size specification for assembly\n\nProvide abstraction for generating type and size information of assembly\nroutines and data, while permitting architectures to override these\ndefaults.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nCc: \"Russell King\" \u003crmk@arm.linux.org.uk\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: \"Andi Kleen\" \u003cak@suse.de\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Miles Bader \u003cuclinux-v850@lsi.nec.co.jp\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "53b3531bbbf70ac7551b32d1acc229d94de52658", "tree": "644440c93f599bbf64bb0b703c97b03b4dc5d737", "parents": [ "29afd49b72a9b2c26fa8c678bcf3976d0540446b" ], "author": { "name": "Alexey Dobriyan", "email": "adobriyan@gmail.com", "time": "Fri Mar 24 03:16:13 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Mar 24 07:33:24 2006 -0800" }, "message": "[PATCH] s/;;/;/g\n\nSigned-off-by: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "cdb0452789d365695b5b173542af9c7e3d24f185", "tree": "f8594a754736aecfb52d835a2e12f46a923e6ed6", "parents": [ "008accbbae6b2f18c2039d563f28d46ff4388d36" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Fri Mar 24 03:15:57 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Mar 24 07:33:21 2006 -0800" }, "message": "[PATCH] kill include/linux/platform.h, default_idle() cleanup\n\ninclude/linux/platform.h contained nothing that was actually used except\nthe default_idle() prototype, and is therefore removed by this patch.\n\nThis patch does the following with the platform specific default_idle()\nfunctions on different architectures:\n- remove the unused function:\n - parisc\n - sparc64\n- make the needlessly global function static:\n - arm\n - h8300\n - m68k\n - m68knommu\n - s390\n - v850\n - x86_64\n- add a prototype in asm/system.h:\n - cris\n - i386\n - ia64\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nAcked-by: Patrick Mochel \u003cmochel@digitalimplant.org\u003e\nAcked-by: Kyle McMartin \u003ckyle@parisc-linux.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "0b2fcfdb8b4e7e379192f24ea2203163ddf5df1d", "tree": "1f3995e41ab12ff76e737389e0b59a40c0c73668", "parents": [ "713729e8b993cb880225e2ced50a3f5ac05c2b3f" ], "author": { "name": "Nick Piggin", "email": "npiggin@suse.de", "time": "Thu Mar 23 03:01:02 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 23 07:38:17 2006 -0800" }, "message": "[PATCH] atomic: add_unless cmpxchg optimise\n\nWithout branch hints, the very unlikely chance of the loop repeating due to\ncmpxchg failure is unrolled with gcc-4 that I have tested.\n\nImprove this for architectures with a native cas/cmpxchg. llsc archs\nshould try to implement this natively.\n\nSigned-off-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Roman Zippel \u003czippel@linux-m68k.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "804f1594cc3deb161e531a43d90c501f0db2635a", "tree": "81f7a7cea8dbf671c733df379c6582e36459e8da", "parents": [ "6a2900b67652421b51fe25e4b86ecfec742b1f30" ], "author": { "name": "Kyle McMartin", "email": "kyle@parisc-linux.org", "time": "Thu Mar 23 03:00:16 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Mar 23 07:38:10 2006 -0800" }, "message": "[PATCH] Move read_mostly definition to asm/cache.h\n\nSeems like needless clutter having a bunch of #if defined(CONFIG_$ARCH) in\ninclude/linux/cache.h. Move the per architecture section definition to\nasm/cache.h, and keep the if-not-defined dummy case in linux/cache.h to\ncatch architectures which don\u0027t implement the section.\n\nVerified that symbols still go in .data.read_mostly on parisc,\nand the compile doesn\u0027t break.\n\nSigned-off-by: Kyle McMartin \u003ckyle@parisc-linux.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "244fd54540806a5e3391d117794105a35815cbb2", "tree": "e427295b636fdd40325c184898f1cb23eed0c102", "parents": [ "0881fc8df2e2bf1a7900a0ab3860109beb46fbab" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Sun Mar 12 09:00:13 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Mar 22 16:04:37 2006 -0800" }, "message": "[IA64] add init declaration to cpu initialization functions\n\nAdd init declaration to cpu initialization functions.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "2332c9ae7911618575241e0c843cd686968db8e3", "tree": "24363aeb963d00cb3aab67f9586eae78ac54dfd8", "parents": [ "1c2e02750b992703a8a18634e08b04353face243" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Wed Mar 22 10:49:00 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Mar 22 14:35:08 2006 -0800" }, "message": "[IA64] fix ia64 is_hugepage_only_range\n\nfix is_hugepage_only_range() definition to be \"overlaps\"\ninstead of \"within architectural restricted hugetlb address\nrange\". Simplify the ia64 specific code that used to use\nis_hugepage_only_range() to just check which region the\naddress is in.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "42b88befd6e0dae1a5fe04c03925037fa890e1f3", "tree": "c234584f797e65e1bcd0d4675d56d1eb004d6681", "parents": [ "3915bcf38fe0b6d130b4bbde97804f29a0becf32" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Wed Mar 22 00:09:01 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Mar 22 07:54:04 2006 -0800" }, "message": "[PATCH] hugepage: is_aligned_hugepage_range() cleanup\n\nQuite a long time back, prepare_hugepage_range() replaced\nis_aligned_hugepage_range() as the callback from mm/mmap.c to arch code to\nverify if an address range is suitable for a hugepage mapping.\nis_aligned_hugepage_range() stuck around, but only to implement\nprepare_hugepage_range() on archs which didn\u0027t implement their own.\n\nMost archs (everything except ia64 and powerpc) used the same\nimplementation of is_aligned_hugepage_range(). On powerpc, which\nimplements its own prepare_hugepage_range(), the custom version was never\nused.\n\nIn addition, \"is_aligned_hugepage_range()\" was a bad name, because it\nsuggests it returns true iff the given range is a good hugepage range,\nwhereas in fact it returns 0-or-error (so the sense is reversed).\n\nThis patch cleans up by abolishing is_aligned_hugepage_range(). Instead\nprepare_hugepage_range() is defined directly. Most archs use the default\nversion, which simply checks the given region is aligned to the size of a\nhugepage. ia64 and powerpc define custom versions. The ia64 one simply\nchecks that the range is in the correct address space region in addition to\nbeing suitably aligned. The powerpc version (just as previously) checks\nfor suitable addresses, and if necessary performs low-level MMU frobbing to\nset up new areas for use by hugepages.\n\nNo libhugetlbfs testsuite regressions on ppc64 (POWER5 LPAR).\n\nSigned-off-by: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "3915bcf38fe0b6d130b4bbde97804f29a0becf32", "tree": "c094ae338592d6e11999c16a2690915e47888a2b", "parents": [ "4866920b93fd7d5b520278c3c76e6f4d5a352d81" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Wed Mar 22 00:08:59 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Mar 22 07:54:04 2006 -0800" }, "message": "[PATCH] hugepage: Move hugetlb_free_pgd_range() prototype to hugetlb.h\n\nThe optional hugepage callback, hugetlb_free_pgd_range() is presently\nimplemented non-trivially only on ia64 (but I plan to add one for powerpc\nshortly). It has its own prototype for the function in asm-ia64/pgtable.h.\n However, since the function is called from generic code, it make sense for\nits prototype to be in the generic hugetlb.h header file, as the protypes\nother arch callbacks already are (prepare_hugepage_range(),\nset_huge_pte_at(), etc.). This patch makes it so.\n\nSigned-off-by: David Gibson \u003cdwg@au1.ibm.com\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "9da61aef0fd5b17dd4bf4baf33db12c470def774", "tree": "cb4bb0b63c36a0b303ceadc0cec0fae00c49ecf3", "parents": [ "27a85ef1b81300cfff06b4c8037e9914dfb09acc" ], "author": { "name": "David Gibson", "email": "david@gibson.dropbear.id.au", "time": "Wed Mar 22 00:08:57 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Mar 22 07:54:03 2006 -0800" }, "message": "[PATCH] hugepage: Fix hugepage logic in free_pgtables()\n\nfree_pgtables() has special logic to call hugetlb_free_pgd_range() instead\nof the normal free_pgd_range() on hugepage VMAs. However, the test it uses\nto do so is incorrect: it calls is_hugepage_only_range on a hugepage sized\nrange at the start of the vma. is_hugepage_only_range() will return true\nif the given range has any intersection with a hugepage address region, and\nin this case the given region need not be hugepage aligned. So, for\nexample, this test can return true if called on, say, a 4k VMA immediately\npreceding a (nicely aligned) hugepage VMA.\n\nAt present we get away with this because the powerpc version of\nhugetlb_free_pgd_range() is just a call to free_pgd_range(). On ia64 (the\nonly other arch with a non-trivial is_hugepage_only_range()) we get away\nwith it for a different reason; the hugepage area is not contiguous with\nthe rest of the user address space, and VMAs are not permitted in between,\nso the test can\u0027t return a false positive there.\n\nNonetheless this should be fixed. We do that in the patch below by\nreplacing the is_hugepage_only_range() test with an explicit test of the\nVMA using is_vm_hugetlb_page().\n\nThis in turn changes behaviour for platforms where is_hugepage_only_range()\nreturns false always (everything except powerpc and ia64). We address this\nby ensuring that hugetlb_free_pgd_range() is defined to be identical to\nfree_pgd_range() (instead of a no-op) on everything except ia64. Even so,\nit will prevent some otherwise possible coalescing of calls down to\nfree_pgd_range(). Since this only happens for hugepage VMAs, removing this\nsmall optimization seems unlikely to cause any trouble.\n\nThis patch causes no regressions on the libhugetlbfs testsuite - ppc64\nPOWER5 (8-way), ppc64 G5 (2-way) and i386 Pentium M (UP).\n\nSigned-off-by: David Gibson \u003cdwg@au1.ibm.com\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nAcked-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "8f860591ffb29738cf5539b6fbf27f50dcdeb380", "tree": "4265e45c4a79d86a16cd5175a836e8c531be8117", "parents": [ "aed75ff3caafce404d9be7f0c088716375be5279" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin_zhang@linux.intel.com", "time": "Wed Mar 22 00:08:50 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Mar 22 07:54:03 2006 -0800" }, "message": "[PATCH] Enable mprotect on huge pages\n\n2.6.16-rc3 uses hugetlb on-demand paging, but it doesn_t support hugetlb\nmprotect.\n\nFrom: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\n\n Remove a test from the mprotect() path which checks that the mprotect()ed\n range on a hugepage VMA is hugepage aligned (yes, really, the sense of\n is_aligned_hugepage_range() is the opposite of what you\u0027d guess :-/).\n\n In fact, we don\u0027t need this test. If the given addresses match the\n beginning/end of a hugepage VMA they must already be suitably aligned. If\n they don\u0027t, then mprotect_fixup() will attempt to split the VMA. The very\n first test in split_vma() will check for a badly aligned address on a\n hugepage VMA and return -EINVAL if necessary.\n\nFrom: \"Chen, Kenneth W\" \u003ckenneth.w.chen@intel.com\u003e\n\n On i386 and x86-64, pte flag _PAGE_PSE collides with _PAGE_PROTNONE. The\n identify of hugetlb pte is lost when changing page protection via mprotect.\n A page fault occurs later will trigger a bug check in huge_pte_alloc().\n\n The fix is to always make new pte a hugetlb pte and also to clean up\n legacy code where _PAGE_PRESENT is forced on in the pre-faulting day.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nCc: David Gibson \u003cdavid@gibson.dropbear.id.au\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: William Lee Irwin III \u003cwli@holomorphy.com\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Nishanth Aravamudan \u003cnacc@us.ibm.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "133a58c1fd97022690d53dd58df56579193cbc1d", "tree": "34e304eaf545cd7991580a7a30609f49c919eb52", "parents": [ "dc5cdd8ec146a60152f2264c8fe920ca5ecc71ea", "7aa6ba41362a7f888ad11fdcfe51ca8d92226cd3" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:22:56 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:22:56 2006 -0800" }, "message": "Pull sn2-reduce-kmalloc-wrap into release branch\n" }, { "commit": "ae02e964b669f19fb08d953032463ab7dc6f79eb", "tree": "e02ff418110b06c5b7cac8302f9930573f2f35b0", "parents": [ "409761bb6a06bd61e2d8e27a1af534371d9537ed", "dcc1dd2366a7c355fd8b6543c52685b864a2044f" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:22:17 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:22:17 2006 -0800" }, "message": "Pull icc-cleanup into release branch\n" }, { "commit": "409761bb6a06bd61e2d8e27a1af534371d9537ed", "tree": "2c07068558092a01d70f737de9b9a34212a44d4b", "parents": [ "a4e817ba24d2a52f0332c2ddcdbf77ddd6a92bbe", "e08e6c521355cd33e647b2f739885bc3050eead6" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:21:26 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:21:26 2006 -0800" }, "message": "Pull sn2-mmio-writes into release branch\n\nHand-fixed conflicts:\n\tinclude/asm-ia64/machvec_sn2.h\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a4e817ba24d2a52f0332c2ddcdbf77ddd6a92bbe", "tree": "f2a43b1e741c4ade35e98b1088b3f111dfbf1342", "parents": [ "1f84253e3ce75fc1b2946a544e16c5c0c13c7017", "13938ca7a1ad9a4788cf73309f187d99c97ddfde" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:18:26 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:18:26 2006 -0800" }, "message": "Pull altix-ce1.0-asic into release branch\n" }, { "commit": "581249966ffeb0463bad1b0e087e1bb29ed53707", "tree": "d0cc7c15ff2cd9c65799a114b0f8e2257765f1e6", "parents": [ "6a8a8e14bed179f2d415c7f4fee51233c35c10c3", "b0a06623dc4caf6dfb6a84419507643471676d20" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:17:38 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:17:38 2006 -0800" }, "message": "Pull delete-sigdelayed into release branch\n" }, { "commit": "33cbd30eaf24ea43af4fe161b6fb34a859b3f2e0", "tree": "ca0086f9764236e06c244054f5c32d268d226ae6", "parents": [ "536ea4e4198eeaa5a73fb734ea675e621609bb7e", "a454c2f3d1fd1cab7073b53c6c14d6d4b61f4e09" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:16:55 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:16:55 2006 -0800" }, "message": "Pull ia64-mutex-primitives into release branch\n" }, { "commit": "536ea4e4198eeaa5a73fb734ea675e621609bb7e", "tree": "321384a2233413d7df5f00b3356116c8b05ef08d", "parents": [ "7705a8792b0fc82fd7d4dd923724606bbfd9fb20", "b88e926584bf100bc23f5e76b7b674d4257edcb0" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:16:21 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Mar 21 08:16:21 2006 -0800" }, "message": "Pull bsp-removal into release branch\n" }, { "commit": "18810d1ebac89232d8f218a318ed9ff7ef198e96", "tree": "83924c9f8e50ce327a8523dbdeaac91aefd2580a", "parents": [ "312f1f0141627a58bf72c55f0e7bc5d6f118a372" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Thu Feb 23 13:16:44 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 27 15:32:28 2006 -0800" }, "message": "[IA64-SGI] Make number of TIO nodes configurable\n\nMake the limit for the number of TIO nodes a function of the number\nof C/M nodes in the system instead of a hardcoded constant. The\nnumber of TIO nodes should be the same as the number of C/M nodes.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "7aa6ba41362a7f888ad11fdcfe51ca8d92226cd3", "tree": "3d7b177ee966f21d1ac6e630061bdb0b256e76d8", "parents": [ "e95a9ec1bb66e07b138861c743192f06e7b3e4de" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Fri Feb 17 05:18:43 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 27 15:26:58 2006 -0800" }, "message": "[IA64-SGI] SN2-XP reduce kmalloc wrapper inlining\n\nTake advantage of kzalloc() as well as reduce the size of code generated\nfor the error returns in xpc_setup_infrastructure().\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nAcked-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "759b650f54ed13e9b3d6c064c763a72ee09c74dd", "tree": "173f08e5432e169c00a40a4d2296d965fe8f9c22", "parents": [ "69454e6991091d0d6eb7461653f2695d985e1a74", "8f8b1138fc9f65e3591aac83a4ee394fef34ac1d" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Feb 17 08:16:35 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Feb 17 08:16:35 2006 -0800" }, "message": "Merge branch \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6\n" }, { "commit": "5f6164f3092832e0d9b12eed52e09a76bf39c64a", "tree": "507043c3eafa00ad7241f1102c860e486f8dc544", "parents": [ "06fed33849c13af637c4d09e9ba27828fac9edd5" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@mellanox.co.il", "time": "Wed Feb 15 15:17:39 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Feb 15 15:32:22 2006 -0800" }, "message": "[PATCH] add asm-generic/mman.h\n\nMake new MADV_REMOVE, MADV_DONTFORK, MADV_DOFORK consistent across all\narches. The idea is to make it possible to use them portably even before\ndistros include them in libc headers.\n\nMove common flags to asm-generic/mman.h\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@mellanox.co.il\u003e\nCc: Roland Dreier \u003crolandd@cisco.com\u003e\nCc: Badari Pulavarty \u003cpbadari@us.ibm.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "72166c35f0e15e5081e51304de48e73f8fdf5498", "tree": "0515dfa0fc442f92ecbb9add2bc53ca86016a8d6", "parents": [ "b05de01ae1c76b7d61da21bbcc26345bf7a9052f", "a6b14fa6fdc01ab3519c2729624f808677539b59" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 15:17:57 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 15:17:57 2006 -0800" }, "message": "Pull fix-cpu-possible-map into release branch\n" }, { "commit": "defbb2c929cbe89dc92239b303cd33d3c85e9a83", "tree": "85dbcfa407d4bfaecbce4f3556a73033b8f70caf", "parents": [ "4c2cd96696ae0896ce4bcf725b9f0eaffafeb640" ], "author": { "name": "hawkes@sgi.com", "email": "hawkes@sgi.com", "time": "Tue Feb 14 10:40:17 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:37:04 2006 -0800" }, "message": "[IA64] ia64: simplify and fix udelay()\n\nThe original ia64 udelay() was simple, but flawed for platforms without\nsynchronized ITCs: a preemption and migration to another CPU during the\nwhile-loop likely resulted in too-early termination or very, very\nlengthy looping.\n\nThe first fix (now in 2.6.15) broke the delay loop into smaller,\nnon-preemptible chunks, reenabling preemption between the chunks. This\nfix is flawed in that the total udelay is computed to be the sum of just\nthe non-premptible while-loop pieces, i.e., not counting the time spent\nin the interim preemptible periods. If an interrupt or a migration\noccurs during one of these interim periods, then that time is invisible\nand only serves to lengthen the effective udelay().\n\nThis new fix backs out the current flawed fix and returns to a simple\nudelay(), fully preemptible and interruptible. It implements two simple\nalternative udelay() routines: one a default generic version that uses\nia64_get_itc(), and the other an sn-specific version that uses that\nplatform\u0027s RTC.\n\nSigned-off-by: John Hawkes \u003chawkes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "4c2cd96696ae0896ce4bcf725b9f0eaffafeb640", "tree": "12b7d967d677e8e8ea154b0b4ae957df6cc43e39", "parents": [ "c2a4969ba14e852bf4ee92c7db3b0cf82405a0c9" ], "author": { "name": "Dean Nelson", "email": "dcn@sgi.com", "time": "Wed Feb 15 08:02:21 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:35:03 2006 -0800" }, "message": "[IA64-SGI] enforce proper ordering of callouts by XPC\n\nFix XPC so that it does not deliver any messages until the connected\ncallout has returned, as well as, prevent the disconnected callout to\noccur before the disconnecting callout has returned.\n\nSigned-off-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "c2a4969ba14e852bf4ee92c7db3b0cf82405a0c9", "tree": "a79b5559260fb09525e764ab41366ff75f3f6677", "parents": [ "9c65cb9be62ac4993a5b392304b82e4f04f010fd" ], "author": { "name": "Dean Roe", "email": "roe@sgi.com", "time": "Tue Feb 14 15:01:23 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:33:48 2006 -0800" }, "message": "[IA64-SGI] fix the size of __sn_cnodeid_to_nasid\n\nThe __sn_cnodeid_to_nasid array was incorrectly sized at MAX_NUMNODES.\nOn a large system, this array could overflow. The following patch\ncorrects this by defining it to MAX_COMPACT_NODES.\n\nSigned-off-by: Dean Roe \u003croe@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d3454344b3507042e5d561d0cfed19e99cf2fc88", "tree": "3dff5713282f454c5e73eb4b08d829cfa4cf9211", "parents": [ "8ed9b2c7a804335004e4bd3b4c6989c5b6bc243f" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Mon Feb 13 05:32:09 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:25:37 2006 -0800" }, "message": "[IA64] remove obsolete corporate address\n\nRemove obsolete SGI address\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "8ed9b2c7a804335004e4bd3b4c6989c5b6bc243f", "tree": "f7420b3fe8ad59ad23707ccbfd7ccaef7abe2a70", "parents": [ "50d8e59038703c4da5acaed9afaa37ae416d3153" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Mon Feb 13 05:29:57 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 15 13:24:45 2006 -0800" }, "message": "[IA64-SGI] sn2 minor fixes and cleanups\n\nGeneral SN2 code cleanup:\n - Do not initialize global variables to zero\n - Use kzalloc instead of kmalloc+memset\n - Check kmalloc return values\n - Do not obfuscate spin lock calls\n - Remove some unused code\n - Various formatting cleanups\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f822566165dd46ff5de9bf895cfa6c51f53bb0c4", "tree": "e052f406d5a14140d17f76dc8914d33bbc8e5f1d", "parents": [ "8861da31e3b3e3df7b05e7b157230de3d486e53b" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@mellanox.co.il", "time": "Tue Feb 14 13:53:08 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Feb 14 16:09:34 2006 -0800" }, "message": "[PATCH] madvise MADV_DONTFORK/MADV_DOFORK\n\nCurrently, copy-on-write may change the physical address of a page even if the\nuser requested that the page is pinned in memory (either by mlock or by\nget_user_pages). This happens if the process forks meanwhile, and the parent\nwrites to that page. As a result, the page is orphaned: in case of\nget_user_pages, the application will never see any data hardware DMA\u0027s into\nthis page after the COW. In case of mlock\u0027d memory, the parent is not getting\nthe realtime/security benefits of mlock.\n\nIn particular, this affects the Infiniband modules which do DMA from and into\nuser pages all the time.\n\nThis patch adds madvise options to control whether memory range is inherited\nacross fork. Useful e.g. for when hardware is doing DMA from/into these\npages. Could also be useful to an application wanting to speed up its forks\nby cutting large areas out of consideration.\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@mellanox.co.il\u003e\nAcked-by: Hugh Dickins \u003chugh@veritas.com\u003e\nCc: Michael Kerrisk \u003cmtk-manpages@gmx.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "a6b14fa6fdc01ab3519c2729624f808677539b59", "tree": "5bf76be44b0c9c7f80612ac71a1b1a4390decd7d", "parents": [ "69aa234b918c0d9bc4a20cd6d4453aaa3418f457" ], "author": { "name": "Ashok Raj", "email": "ashok.raj@intel.com", "time": "Tue Feb 14 15:01:12 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 14 15:37:58 2006 -0800" }, "message": "[IA64] Count disabled cpus as potential hot-pluggable CPUs\n\nHave a facility to account for potentially hot-pluggable CPUs. ACPI doesnt\ngive a determinstic method to find hot-pluggable CPUs. Hence we use 2 methods\nto assist.\n\n- BIOS can mark potentially hot-pluggable CPUs as disabled in the MADT tables.\n- User can specify the number of hot-pluggable CPUs via parameter\n additional_cpus\u003dX\n\nThe option is enabled only if ACPI_CONFIG_HOTPLUG_CPU\u003dy which enables the\nphysical hotplug option. Without which user can still use logical onlining\nand offlining of CPUs by enabling CONFIG_HOTPLUG_CPU\u003dy\n\nAdds more bits to cpu_possible_map for potentially hot-pluggable cpus.\n\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "65b78722ce2a2dc76108b467f79b2c5b4864af82", "tree": "a5296112d759443f84e6f334703dc330be903d8e", "parents": [ "a94746461765dae41fb82e4dac027d14af4d80d8", "9621a4ef8a29d11118f44def053931bcafb0dfc2" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 09 14:43:58 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 09 14:43:58 2006 -0800" }, "message": "Pull new-syscalls into release branch\n" }, { "commit": "9621a4ef8a29d11118f44def053931bcafb0dfc2", "tree": "b1e0a0214bddd5f23133e5b12fdf8f8d24188bcd", "parents": [ "9ed2ad8648eb974ee670045d41b5a51b763e3aa1" ], "author": { "name": "Janak Desai", "email": "janak@us.ibm.com", "time": "Wed Feb 08 15:43:38 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Feb 08 15:43:38 2006 -0800" }, "message": "[IA64] unshare system call registration for ia64\n\nRegisters system call for the ia64 architecture.\n\nReserves space for ppoll and pselect, and adds unshare at system\ncall number 1296.\n\nSigned-off-by: Janak Desai \u003cjanak@us.ibm.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "dcc1dd2366a7c355fd8b6543c52685b864a2044f", "tree": "c1fa5734246518c4cd0da82ec151eb905fd1b375", "parents": [ "412e6a378260608bf28f29d4fa8a9241e0240a2d" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Tue Feb 07 09:24:14 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 09:24:14 2006 -0800" }, "message": "[IA64-SGI] - Eliminate SN pio_phys_xxx macros. Move to assembly\n\nRewrite the SN pio_phys_xxx macros in assembly language. This\navoids issues with the Intel icc compiler. Function call\noverhead is not an issue - the functions reference PIOs\nand take 100\u0027s nsec to complete.\n\nIn addition, the functions should likely be in assembly\nlanguage anyway - they reference memory using physical\naddressing mode. One function executes with psr.ic disabled.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "412e6a378260608bf28f29d4fa8a9241e0240a2d", "tree": "c1f7d21ef519c47a6e985d55971850174a4431bc", "parents": [ "9df79decc395b2f9484ff93a1383ba705ff34b10" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 17:19:46 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 08:49:27 2006 -0800" }, "message": "[IA64] use icc defined constant\n\nUse icc defined constant instead of magic number.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "9df79decc395b2f9484ff93a1383ba705ff34b10", "tree": "ea8e32bbb84250f49965a549792741b436c57188", "parents": [ "c583f66dc41cfa4055b6ac8f50cc1ebf362298f7" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 17:12:02 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 08:49:10 2006 -0800" }, "message": "[IA64] add __builtin_trap definition for icc build\n\nMap __builtin_trap function to break 0 instruction.\n\nSigned-off-by: HJ Lu \u003chongjiu.lu@intel.com\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "c583f66dc41cfa4055b6ac8f50cc1ebf362298f7", "tree": "77cf0c82d39796ae513e9bce675e0db9984e17cb", "parents": [ "4bf64e72bd499d2bf3509c2dc60d09c39f72c782" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 17:08:47 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 08:48:49 2006 -0800" }, "message": "[IA64] clean up asm/intel_intrin.h\n\nInclude intrinsic header file from icc compiler. Remove\nduplicate definition from kernel source.\n\nSigned-off-by: HJ Lu \u003chongjiu.lu@intel.com\u003e\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "4bf64e72bd499d2bf3509c2dc60d09c39f72c782", "tree": "72c4687431def513e7d60d50f3b5ac10a981f896", "parents": [ "c03296a868ae7c91aa2d8b372184763b18f16d7a" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 16:58:52 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Feb 07 08:48:14 2006 -0800" }, "message": "[IA64] map ia64_hint definition to intel compiler intrinsic\n\nMap ia64_hint() to internal intel compiler intrinsic.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "c03296a868ae7c91aa2d8b372184763b18f16d7a", "tree": "57ff0b44a412b78fe598a49cc28b3cebf51f1154", "parents": [ "e3f749c4af69c4344d89f11e2293e3790eb4eaca", "913e4a75572354995b330f57082d9a86250cd75f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Feb 06 15:46:39 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Feb 06 15:46:39 2006 -0800" }, "message": "Merge branch \u0027release\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6\n" }, { "commit": "9ed2ad8648eb974ee670045d41b5a51b763e3aa1", "tree": "80e98f48b6a7538d2b7d74f67c7ce3c5bab35ea6", "parents": [ "e3f749c4af69c4344d89f11e2293e3790eb4eaca" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Tue Jan 31 14:26:25 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 06 10:42:46 2006 -0800" }, "message": "[IA64] add syscall entry for *at()\n\nWire up the ia64 syscalls for *at() functions.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "913e4a75572354995b330f57082d9a86250cd75f", "tree": "d7652ef6b9bc0cf3e579deaf9483e5f61f03c20b", "parents": [ "27ee6e0592c7d624836835dd8d2f0f74e9d289f6" ], "author": { "name": "Russ Anderson", "email": "rja@efs.americas.sgi.com", "time": "Fri Feb 03 14:47:15 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Feb 06 09:28:10 2006 -0800" }, "message": "[IA64-SGI] Shub2 BTE address fix\n\nAfter converting the cpu physical address to shub2 physical\naddressing, the address was run through TO_PHYS() which\nclobbered a high node offset bit causing the BTE to fail\non shub2 nodes with large memory. This fix corrects\nthat problem.\n\nSigned-off-by: Russ Anderson (rja@sgi.com)\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "d57d39c81271a0808eabcf7bdc409312b5262b69", "tree": "7c3bd49624969c0d4e67a75acc8676945a900cc3", "parents": [ "b7bed9ec44cb282425f56033e5fb5448086cd758" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri Feb 03 03:04:53 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Feb 03 08:32:11 2006 -0800" }, "message": "[PATCH] ia64: drop arch-specific IDE MAX_HWIFS definition\n\nThere\u0027s no reason MAX_HWIFS needs to be ia64-specific, so set MAX_HWIFS\nfrom CONFIG_IDE_MAX_HWIFS.\n\nThis reduces the default from 10 to 4, but I don\u0027t think that\u0027s a problem.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nAcked-by: Bartlomiej Zolnierkiewicz \u003cB.Zolnierkiewicz@elka.pw.edu.pl\u003e\nCc: Alan Cox \u003calan@lxorguk.ukuu.org.uk\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "69dcc99199fe29b0a29471a3488d39d9d33b25fc", "tree": "4232ad9a782dee6abfe7fa20c95a49249195de8f", "parents": [ "66ac5a294db70aa377c0d7bbdb0c4e3ef2349b7b" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin.zhang@intel.com", "time": "Fri Feb 03 03:04:36 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Feb 03 08:32:09 2006 -0800" }, "message": "[PATCH] Export cpu topology in sysfs\n\nThe patch implements cpu topology exportation by sysfs.\n\nItems (attributes) are similar to /proc/cpuinfo.\n\n1) /sys/devices/system/cpu/cpuX/topology/physical_package_id:\n\trepresent the physical package id of cpu X;\n2) /sys/devices/system/cpu/cpuX/topology/core_id:\n\trepresent the cpu core id to cpu X;\n3) /sys/devices/system/cpu/cpuX/topology/thread_siblings:\n\trepresent the thread siblings to cpu X in the same core;\n4) /sys/devices/system/cpu/cpuX/topology/core_siblings:\n\trepresent the thread siblings to cpu X in the same physical package;\n\nTo implement it in an architecture-neutral way, a new source file,\ndriver/base/topology.c, is to export the 5 attributes.\n\nIf one architecture wants to support this feature, it just needs to\nimplement 4 defines, typically in file include/asm-XXX/topology.h.\nThe 4 defines are:\n#define topology_physical_package_id(cpu)\n#define topology_core_id(cpu)\n#define topology_thread_siblings(cpu)\n#define topology_core_siblings(cpu)\n\nThe type of **_id is int.\nThe type of siblings is cpumask_t.\n\nTo be consistent on all architectures, the 4 attributes should have\ndeafult values if their values are unavailable. Below is the rule.\n\n1) physical_package_id: If cpu has no physical package id, -1 is the\ndefault value.\n\n2) core_id: If cpu doesn\u0027t support multi-core, its core id is 0.\n\n3) thread_siblings: Just include itself, if the cpu doesn\u0027t support\nHT/multi-thread.\n\n4) core_siblings: Just include itself, if the cpu doesn\u0027t support\nmulti-core and HT/Multi-thread.\n\nSo be careful when declaring the 4 defines in include/asm-XXX/topology.h.\n\nIf an attribute isn\u0027t defined on an architecture, it won\u0027t be exported.\n\nThank Nathan, Greg, Andi, Paul and Venki.\n\nThe patch provides defines for i386/x86_64/ia64.\n\nSigned-off-by: Zhang, Yanmin \u003cyanmin.zhang@intel.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Nick Piggin \u003cnickpiggin@yahoo.com.au\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "9a52bbed905fa41ca10f4db2e845b588f0fdfbef", "tree": "6caee8f97528a14af745d50a7cec452342d96d5f", "parents": [ "2fcc3db0ccee9b47df7a4f732e6624f4f643c035" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Thu Feb 02 05:50:05 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 02 13:36:50 2006 -0800" }, "message": "[IA64-SGI] include/asm-ia64/sn/intr.h more sn2 housekeeping\n\nHouse keeping - eliminate unneeded parenthesis in macro defines.\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a58786917ce23c2a26c3e099c3cdba32a35eeceb", "tree": "4740de51febbe16934d24d94cb80432a7547cb26", "parents": [ "af14aca90e0cdfccd71f9947c45b6ea2cf321dcb" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Mon Jan 30 16:32:31 2006 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 02 13:25:54 2006 -0800" }, "message": "[IA64] avoid broken SAL_CACHE_FLUSH implementations\n\nIf SAL_CACHE_FLUSH drops interrupts, complain about it and fall back to\nusing PAL_CACHE_FLUSH instead.\n\nThis is to work around a defect in HP rx5670 firmware: when an interrupt\noccurs during SAL_CACHE_FLUSH, SAL drops the interrupt but leaves it marked\n\"in-service\", which leaves the interrupt (and others of equal or lower\npriority) masked.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f8efa27662532ad5adb2790bfc3f4c78e019cfad", "tree": "848c4935674ed965256ef328a6b69316ebad6a8c", "parents": [ "df080e7c94c8f4b8334614159fa079aaeece5670" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Thu Jan 26 18:24:59 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 02 13:20:42 2006 -0800" }, "message": "[IA64] remove staled comments in asm/system.h\n\nWith the recent optimization made to wrap_mmu_context function,\nwe don\u0027t hold tasklist_lock anymore when wrapping context id.\nThe comments in asm/system.h must fall through the crack earlier.\nRemove staled comments.\n\nI believe it is still beneficial to unlock the runqueue lock\nacross context switch. So leave __ARCH_WANT_UNLOCKED_CTXSW on.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "e08e6c521355cd33e647b2f739885bc3050eead6", "tree": "251dd80647bd3a0140f5f31c35c125094c035f9c", "parents": [ "3ee68c4af3fd7228c1be63254b9f884614f9ebb2" ], "author": { "name": "Brent Casavant", "email": "bcasavan@sgi.com", "time": "Thu Jan 26 15:55:52 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 15:55:52 2006 -0800" }, "message": "[IA64] hooks to wait for mmio writes to drain when migrating processes\n\nOn SN2, MMIO writes which are issued from separate processors are not\nguaranteed to arrive in any particular order at the IO hardware. When\nperforming such writes from the kernel this is not a problem, as a\nkernel thread will not migrate to another CPU during execution, and\nmmiowb() calls can guarantee write ordering when control of the IO\nresource is allowed to move between threads.\n\nHowever, when MMIO writes can be performed from user space (e.g. DRM)\nthere are no such guarantees and mechanisms, as the process may\ncontext-switch at any time, and may migrate to a different CPU as part\nof the switch. For such programs/hardware to operate correctly, it is\nrequired that the MMIO writes from the old CPU be accepted by the IO\nhardware before subsequent writes from the new CPU can be issued.\n\nThe following patch implements this behavior on SN2 by waiting for a\nShub register to indicate that these writes have been accepted. This\nis placed in the context switch-in path, and only performs the wait\nwhen the newly scheduled task changes CPUs.\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Brent Casavant \u003cbcasavan@sgi.com\u003e\n" }, { "commit": "13938ca7a1ad9a4788cf73309f187d99c97ddfde", "tree": "bdca0d858333bb610d2b9253597ab53f8273b587", "parents": [ "3ee68c4af3fd7228c1be63254b9f884614f9ebb2" ], "author": { "name": "Mark Maule", "email": "maule@sgi.com", "time": "Thu Jan 26 14:46:39 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 13:56:09 2006 -0800" }, "message": "[IA64-SGI] driver bugfixes and hardware workarounds for CE1.0 asic\n\nVarious bugfixes and hardware bug workarounds necessary for the rev 1.0 version\nof the altix TIO CE asic.\n\nSigned-off-by: Mark Maule \u003cmaule@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "61d67f2e07d96d20d86135792ca591c491939c27", "tree": "d0c65cff2291e5ed849640a465c444c150f8d929", "parents": [ "139366a093d1ce2749b1b4247947ceb9b78caa2a" ], "author": { "name": "Prarit Bhargava", "email": "prarit@sgi.com", "time": "Wed Jan 25 18:51:14 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 13:50:40 2006 -0800" }, "message": "[IA64-SGI] Add PROM feature set for device flush list\n\nIntroduce PRF_DEVICE_FLUSH_LIST flag for older PROMs.\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b0a06623dc4caf6dfb6a84419507643471676d20", "tree": "4808417fe23fcb3e352c0ce347abb6218fc2263e", "parents": [ "3ee68c4af3fd7228c1be63254b9f884614f9ebb2" ], "author": { "name": "Keith Owens", "email": "kaos@sgi.com", "time": "Sun Jan 22 10:55:25 2006 +1100" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 13:23:27 2006 -0800" }, "message": "[IA64] Delete MCA/INIT sigdelayed code\n\nThe only user of the MCA/INIT sigdelayed code (SGI\u0027s I/O probing) has\nmoved from the kernel into SAL. Delete the MCA/INIT sigdelayed code.\n\nSigned-off-by: Keith Owens \u003ckaos@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a454c2f3d1fd1cab7073b53c6c14d6d4b61f4e09", "tree": "a1240c5b420adb94dd5c952a089f0326ee0060fe", "parents": [ "3ee68c4af3fd7228c1be63254b9f884614f9ebb2" ], "author": { "name": "Chen, Kenneth W", "email": "kenneth.w.chen@intel.com", "time": "Wed Jan 11 17:11:09 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Jan 26 13:10:19 2006 -0800" }, "message": "[IA64] implement ia64 specific mutex primitives\n\nImplement ia64 optimized mutex primitives. It properly uses\nacquire/release memory ordering semantics in lock/unlock path.\n2nd version making them all static inline functions.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "fd8b206d1621ad526e7b00dc26322f546b2a57fb", "tree": "01e9842ede41b8ffe6242fc1a242204e778e754b", "parents": [ "79c83bd15af3b06079a9205db9c64c92ca1bd868" ], "author": { "name": "Dean Roe", "email": "roe@sgi.com", "time": "Tue Jan 24 14:49:43 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 24 14:49:43 2006 -0800" }, "message": "[IA64-SGI] add sn_feature_sets bit\n\nSGI\u0027s prom has added a new feature which avoids an Altix-specific\nMCA that can occur with excessive use of ia64_pal_cache_flush. This\npatch adds the #define to the sn_feature_sets.h to reflect that bit\nis taken.\n\nSigned-off-by: Dean Roe \u003croe@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "4b16bfbf8f8013fefb49592d030ff87651ab48cb", "tree": "ce9150f8ceac6150261f5bc69afdf9d2e95def19", "parents": [ "8d08aed8d7714683b33666cc066e20f957dda01d" ], "author": { "name": "Zoltan Menyhart", "email": "Zoltan.Menyhart@bull.net", "time": "Fri Jan 13 17:25:23 2006 +0100" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 17 14:04:00 2006 -0800" }, "message": "[IA64] Fix bug in ia64 specific down() function\n\nChen, Kenneth W wrote:\n\u003e The memory order semantics for include/asm-ia64/semaphore.h:down()\n\u003e doesn\u0027t look right. It is using atomic_dec_return, which eventually\n\u003e translate into ia64_fetch_and_add() that uses release semantics.\n\u003e Shouldn\u0027t it use acquire semantics?\n\nUse ia64_fetchadd() instead of atomic_dec_return()\n\nAcked-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "8d08aed8d7714683b33666cc066e20f957dda01d", "tree": "31b8a773a09575f94adce8e00c52fb0010bd5a5f", "parents": [ "d171e519da635a82ab759cbfd46617ac160c9ec0" ], "author": { "name": "Jack Steiner", "email": "steiner@sgi.com", "time": "Tue Jan 17 15:42:46 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 17 13:55:46 2006 -0800" }, "message": "[IA64] Zonelists for nodes without cpus\n\nIf a node runs out of memory, ensure that memory on nodes w/o cpus is used\nbefore using memory on nodes with cpus.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f9e505a9a03df5acace6e758c8d12982635a1c64", "tree": "c336b36fd18dd1fc1f316cb55ad52c67da2ffd8a", "parents": [ "ac354a899b91239aac4d5893fc4288bc400e82b4" ], "author": { "name": "Jes Sorensen", "email": "jes@sgi.com", "time": "Tue Jan 17 12:52:21 2006 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Jan 17 13:53:24 2006 -0800" }, "message": "[IA64-SGI] sn2 mutex conversion\n\nMigrate sn2 code to use mutex and completion events rather than\nsemaphores.\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nAcked-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "859538763155814d217054eb6e3cdff71bdb4d89", "tree": "9366c72527102d67728b9cafc53654ad579ba40b", "parents": [ "53493dcf6e9e27cc9379cbf8962642986927aea9", "9179cb65780def28770a895a4bc8fa60e903ab80" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 20:02:24 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 20:02:24 2006 -0800" }, "message": "Pull perfmon-montecito into release branch\n" }, { "commit": "53493dcf6e9e27cc9379cbf8962642986927aea9", "tree": "7d7cb54a7020220058b459d60f06691cea71236f", "parents": [ "f15ac5801fdc1b217c3b8b5dbc63a09371d2ee4d" ], "author": { "name": "Prarit Bhargava", "email": "prarit@sgi.com", "time": "Mon Jan 16 19:54:40 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 19:54:40 2006 -0800" }, "message": "[IA64] Cleanup of arch/ia64/sn and include/asm-ia64/sn\n\nReplace uintX_t declarations with uX declarations.\nReplace intX_t declarations with sX declarations.\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "f15ac5801fdc1b217c3b8b5dbc63a09371d2ee4d", "tree": "b9d4eeb9b5a6ab36fdaebf24263aa4ba5543aec7", "parents": [ "7b9c8ba2d634a0467a8a36018a28624563f34f47" ], "author": { "name": "Xu, Anthony", "email": "anthony.xu@intel.com", "time": "Mon Jan 09 10:36:35 2006 +0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 15:44:53 2006 -0800" }, "message": "[IA64] pal cache flush patch\n\nBecause PAL spec has changed since 2002, you can goto\nhttp://developer.intel.com/design/itanium/manuals/iiasdmanual.htm to\ndownload new SDM, all PAL calls should be invoked with psr.ic\u003d1, and\nit\u0027s caller\u0027s responsibility to handle possible tlb miss.\nIa64_pal_cache_flush was written according to old spec, it is obsolete,\nand this patch has ia64_pal_cache_flush conform to new spec.\n\nSigned-off-by Anthony Xu \u003canthony.xu@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "9179cb65780def28770a895a4bc8fa60e903ab80", "tree": "10c9033adcdcdf2d8350a657e10c1aa72dc0aa68", "parents": [ "4a8e4a270b89030bdeb09d2f8cef7cfe9a50e54d" ], "author": { "name": "Stephane Eranian", "email": "eranian@hpl.hp.com", "time": "Tue Jan 10 03:10:43 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Jan 16 10:31:44 2006 -0800" }, "message": "[IA64] Perfmon for Montecito\n\nAdd Montecito PMU description table for perfmon2\n\nSigned-off-by: Stephane Eranian \u003ceranian@hpl.hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "2d0cfb527944c2cfee2cffab14f52d483e329fcf", "tree": "b2e3340b52d83b51674f3782a208850d53d3d24d", "parents": [ "7170be5f586b59bdcdab082778a5d9203ba7b667" ], "author": { "name": "Patrick Gefre", "email": "pfg@sgi.com", "time": "Sat Jan 14 13:20:40 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Jan 14 18:25:20 2006 -0800" }, "message": "[PATCH] Altix: ioc3 serial support\n\nAdd driver support for a 2 port PCI IOC3-based serial card on Altix boxes:\n\nThis is a re-submission. On the original submission I was asked to\norganize the code so that the MIPS ioc3 ethernet and serial parts could be\nused with this driver. Stanislaw Skowronek was kind enough to provide the\nshim layer for this - thanks Stanislaw. This patch includes the shim layer\nand the Altix PCI ioc3 serial driver. The MIPS merged ioc3 ethernet and\nserial support is forthcoming.\n\nSigned-off-by: Patrick Gefre \u003cpfg@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "d3ef1f5aafcf7a4129eb2078c70bc9e577bc3af1", "tree": "619647d90b0a51d39e80bbc20b59e7e7dccbf510", "parents": [ "e026cca0f2c09c4c28c902db6384fd8a412671d6" ], "author": { "name": "Zhang Yanmin", "email": "yanmin.zhang@intel.com", "time": "Fri Jan 13 14:45:21 2006 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 14:45:21 2006 -0800" }, "message": "[IA64] prevent accidental modification of args in jprobe handler\n\nWhen jprobe is hit, the function parameters of the original function\nshould be saved before jprobe handler is executed, and restored it after\njprobe handler is executed, because jprobe handler might change the\nregister values due to tail call optimization by the gcc.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "15029285dc977a392e74eacb7625984b71d4f605", "tree": "0fed8aac81f7b4491121550b3670b4a8aeabcff9", "parents": [ "6d6e420005f3753392b608a614eee8475bdc16f7" ], "author": { "name": "Jason Uhlenkott", "email": "jasonuhl@sgi.com", "time": "Fri Dec 30 02:27:01 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 14:16:08 2006 -0800" }, "message": "[IA64] Handle debug traps in fsys mode\n\nWe need to handle debug traps in fsys mode non-fatally. They can\nhappen now that we have fsyscalls which contain probe instructions.\n\nSigned-off-by: Jason Uhlenkott \u003cjasonuhl@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "6d6e420005f3753392b608a614eee8475bdc16f7", "tree": "a59860fc15ce4e92c00015d068de4aba12a9b889", "parents": [ "cfbb1426bd76c4ba6ec4491c8df2a5dd3d984750" ], "author": { "name": "Prarit Bhargava", "email": "prarit@sgi.com", "time": "Fri Dec 23 13:33:25 2005 -0500" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 14:13:08 2006 -0800" }, "message": "[IA64-SGI] Fix sn_flush_device_kernel \u0026 spinlock initialization\n\nThis patch separates the sn_flush_device_list struct into kernel and\ncommon (both kernel and PROM accessible) structures. As it was, if the\nsize of a spinlock_t changed (due to additional CONFIG options, etc.) the\nsal call which populated the sn_flush_device_list structs would erroneously\nwrite data (and cause memory corruption and/or a panic).\n\nThis patch does the following:\n\n1. Removes sn_flush_device_list and adds sn_flush_device_common and\nsn_flush_device_kernel.\n\n2. Adds a new SAL call to populate a sn_flush_device_common struct per\ndevice, not per widget as previously done.\n\n3. Correctly initializes each device\u0027s sn_flush_device_kernel spinlock_t\nstruct (before it was only doing each widget\u0027s first device).\n\nSigned-off-by: Prarit Bhargava \u003cprarit@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "17e8ce0e9417eee1f57f9b3d4aad168425e043c3", "tree": "58bae85da8cedb339d945d43191ff910501bd175", "parents": [ "8a4b7b6f187f2967bff222e8c3758ab47efdb14f" ], "author": { "name": "Russ Anderson", "email": "rja@efs.americas.sgi.com", "time": "Fri Dec 16 17:19:01 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 14:06:53 2006 -0800" }, "message": "[IA64-SGI] Altix BTE error handling fixes\n\nAltix (shub2) pushes the BTE clean-up into SAL.\nThis patch correctly interfaces with the now implemented SAL call.\nIt also fixes a bug when delaying clean-up to allow busy BTEs to\ncomplete (or error out).\n\nSigned-off-by: Russ Anderson \u003crja@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "9335d48e10d2d07eacaddf889ec1efb8a5a5082e", "tree": "a0f9c33010e42d5c195dd4da5f413528d97a303a", "parents": [ "87a149d6bba5949fbc53b8a21189b54748ac9e2a" ], "author": { "name": "Dean Nelson", "email": "dcn@sgi.com", "time": "Tue Jan 10 11:12:32 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 10:40:23 2006 -0800" }, "message": "[IA64-SGI] move xpc.h to include/asm-ia64/sn (cleanup)\n\nCleanup a few items after moving xpc.h from arch/ia64/sn/kernel to\ninclude/asm-ia64/sn.\n\nSigned-off-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "87a149d6bba5949fbc53b8a21189b54748ac9e2a", "tree": "860024852a4bb983f79fe84b2c44958492c0e0d5", "parents": [ "d6ad033a88b42420ddb6c62c95e42f88d862b246" ], "author": { "name": "Dean Nelson", "email": "dcn@sgi.com", "time": "Tue Jan 10 11:09:48 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 10:39:34 2006 -0800" }, "message": "[IA64-SGI] move xpc.h to include/asm-ia64/sn\n\nMove xpc.h from arch/ia64/sn/kernel to include/asm-ia64/sn without change.\n\nSigned-off-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "246c7e33d51afe99890b2caab7ad482c0296d5ba", "tree": "20d96a5182dd5971d9d51d6626cf02d4a1c19c85", "parents": [ "7ae69d2aa4ed3ee8cef18a072346366f019d6a4a" ], "author": { "name": "Dean Nelson", "email": "dcn@sgi.com", "time": "Thu Dec 22 14:32:56 2005 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Jan 13 10:16:36 2006 -0800" }, "message": "[IA64-SGI] ensure XPC disengage request is processed\n\nThis patch fixes a problem in XPC disengage processing whereby it was not\nseeing the request to disengage from a remote partition, so the disengage\nwasn\u0027t happening. The disengagement is suppose to transpire during the time\na XPC channel is disconnecting, and should be completed before the channel\nis declared to be disconnected.\n\nSigned-off-by: Dean Nelson \u003cdcn@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "6450578f32cdca587ae5f148e2118b2fcc36bb11", "tree": "91ad424aae66d72fc370dc624fca3f42d830675b", "parents": [ "ab03591db110e8d195d381a68692eb37da981cdf" ], "author": { "name": "Al Viro", "email": "viro@ftp.linux.org.uk", "time": "Thu Jan 12 01:06:06 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Jan 12 09:08:58 2006 -0800" }, "message": "[PATCH] ia64: task_pt_regs()\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" } ], "next": "ab03591db110e8d195d381a68692eb37da981cdf" }