)]}' { "log": [ { "commit": "9713faecff3d071de1208b081d4943b002e9cb1c", "tree": "b6ab68f15527eae952a407aa604607aca719a5ba", "parents": [ "1eef1282549d7accdd33ee36d409b039b1f911fb" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Mar 11 09:28:48 2013 -0300" }, "committer": { "name": "Borislav Petkov", "email": "bp@suse.de", "time": "Sat Mar 16 06:32:30 2013 +0100" }, "message": "EDAC: Merge mci.mem_is_per_rank with mci.csbased\n\nBoth mci.mem_is_per_rank and mci.csbased denote the same thing: the\nmemory controller is csrows based. Merge both fields into one.\n\nThere\u0027s no need for the driver to actually fill it, as the core detects\nit by checking if one of the layers has the csrows type as part of the\nmemory hierarchy:\n\n\tif (layers[i].type \u003d\u003d EDAC_MC_LAYER_CHIP_SELECT)\n\t\t\tper_rank \u003d true;\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\nSigned-off-by: Borislav Petkov \u003cbp@suse.de\u003e\n" }, { "commit": "1eef1282549d7accdd33ee36d409b039b1f911fb", "tree": "bf1be1193b2bcf6d2ab45fbcca7755050399be97", "parents": [ "fbe2d3616cee37418d832b30130811888c5aaf34" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Mar 11 09:07:46 2013 -0300" }, "committer": { "name": "Borislav Petkov", "email": "bp@suse.de", "time": "Sat Mar 16 06:32:02 2013 +0100" }, "message": "amd64_edac: Correct DIMM sizes\n\nWe were filling the csrow size with a wrong value. 16a528ee3975 (\"EDAC:\nFix csrow size reported in sysfs\") tried to address the issue. It fixed\nthe report with the old API but not with the new one. Correct it for the\nnew API too.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n[ make it a per-csrow accounting regardless of -\u003echannel_count ]\nSigned-off-by: Borislav Petkov \u003cbp@suse.de\u003e\n" }, { "commit": "8dd93d450bff251575c56b8f058393124e1f00fb", "tree": "bee1cae0a29936d2897a5d84afdc20e524b1022b", "parents": [ "e7e248304c8ccf02b89e04c3b3b66006b993b5a7" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Tue Feb 19 21:26:22 2013 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Thu Feb 21 14:16:27 2013 -0300" }, "message": "edac: add support for error type \"Info\"\n\nThe CPER spec defines a forth type of error: informational\nlogs. Add support for it at the edac API and at the\ntrace event interface.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "c7ef7645544131b0750478d1cf94cdfa945c809d", "tree": "4442e415b365cd43be1d8a73703f809f78177560", "parents": [ "80cc7d87d5eb34375f916d282450a0906a8ead60" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Thu Feb 21 13:36:45 2013 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Thu Feb 21 13:48:45 2013 -0300" }, "message": "edac: reduce stack pressure by using a pre-allocated buffer\n\nThe number of variables at the stack is too big.\nReduces the stack usage by using a pre-allocated error\nbuffer.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "c2c93dbc97622e26dc19edc71e50ebaa996d7804", "tree": "06ea81c61334d2590fbdc1604d90df9f70c20281", "parents": [ "c66b5a79a9348ccd6d1cd81416027d0e12da965d" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Tue Feb 19 06:50:05 2013 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Thu Feb 21 11:06:38 2013 -0300" }, "message": "edac: remove proc_name from mci structure\n\nproc_name isn\u0027t used anywhere. Remove it.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "c66b5a79a9348ccd6d1cd81416027d0e12da965d", "tree": "c6a25cbd329ebb6cd7edadb9bcd5f94796d94e97", "parents": [ "4ab19b06acffd2278cd37995927c85a9acfd00db" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Fri Feb 15 07:21:08 2013 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Thu Feb 21 11:06:37 2013 -0300" }, "message": "edac: add a new memory layer type\n\nThere are some cases where the memory controller layout is\ncompletely hidden. This is the case of firmware-driven error\ncode, like the one provided by GHES. Add a new layer to be\nused on such memory error report mechanisms.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "80f5ab097b87c86581cb9736a8e55c5a3047d4bb", "tree": "107438f3205d8fdf623c66646734cc7606aaae92", "parents": [ "9ada9fd5dfaf0076eadf42cecc68f7adc1717c58" ], "author": { "name": "Shaun Ruffell", "email": "sruffell@digium.com", "time": "Sun Aug 19 01:11:24 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Fri Dec 21 08:00:02 2012 -0200" }, "message": "edac: edac_mc no longer deals with kobjects directly\n\nThere are no more embedded kobjects in struct mem_ctl_info. Remove a header and\na comment that does not reflect the code anymore.\n\nSigned-off-by: Shaun Ruffell \u003csruffell@digium.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "16a528ee3975c860dc93fbfc718fe9aa25ed92bc", "tree": "ea0d20d3544df6dfe2977634d1a4cc837f80b964", "parents": [ "921a689965c26ae6fde12ebaadb4183cbfdb01fb" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Sep 13 18:53:58 2012 +0200" }, "committer": { "name": "Borislav Petkov", "email": "bp@alien8.de", "time": "Wed Nov 28 11:54:40 2012 +0100" }, "message": "EDAC: Fix csrow size reported in sysfs\n\nOn csrow-based memory controllers, we combine the csrow size from both\nchannels and there\u0027s no need to do that again in csrow_size_show which\nleads to double the size of a csrow.\n\nFix it.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\n" }, { "commit": "11652769179296062c74233e168399a87a3f6e8a", "tree": "78a844e4e08bd18180bdcfe085da17fba38fda83", "parents": [ "10de6497a56e933d9ddca94aff186ac3b3105af9" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Sep 13 17:19:40 2012 +0200" }, "committer": { "name": "Borislav Petkov", "email": "bp@alien8.de", "time": "Wed Nov 28 11:48:04 2012 +0100" }, "message": "EDAC: Add memory controller flags\n\nThe first flag is -\u003ecsbased and will be used in common EDAC code later.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\n" }, { "commit": "38ced28b21efff18fd5e5c98a92830e8f0031cee", "tree": "e409eed80e257faa01acc1cdc05cb7c0e0be7cb2", "parents": [ "69154d069869b612383cef9d594f39b34ffba6dd" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Tue Jun 12 10:55:57 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Wed Jun 27 09:01:30 2012 -0300" }, "message": "edac: allow specifying the error count with fake_inject\n\nIn order to test if the error counters are properly incremented,\nadd a way to specify how many errors were generated by a trace.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "de3910eb79ac8c0f29a11224661c0ebaaf813039", "tree": "44584d6691588b2c18823260be0e44f0c9872d02", "parents": [ "e39f4ea9b01f137f9e6fa631f3e9088fb9175e91" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Tue Apr 24 15:05:43 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Jun 11 13:23:45 2012 -0300" }, "message": "edac: change the mem allocation scheme to make Documentation/kobject.txt happy\n\nKernel kobjects have rigid rules: each container object should be\ndynamically allocated, and can\u0027t be allocated into a single kmalloc.\n\nEDAC never obeyed this rule: it has a single malloc function that\nallocates all needed data into a single kzalloc.\n\nAs this is not accepted anymore, change the allocation schema of the\nEDAC *_info structs to enforce this Kernel standard.\n\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Greg K H \u003cgregkh@linuxfoundation.org\u003e\nCc: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nCc: Mark Gross \u003cmark.gross@intel.com\u003e\nCc: Tim Small \u003ctim@buttersideup.com\u003e\nCc: Ranganathan Desikan \u003cravi@jetztechnologies.com\u003e\nCc: \"Arvind R.\" \u003carvino55@gmail.com\u003e\nCc: Olof Johansson \u003colof@lixom.net\u003e\nCc: Egor Martovetsky \u003cegor@pasemi.com\u003e\nCc: Michal Marek \u003cmmarek@suse.cz\u003e\nCc: Jiri Kosina \u003cjkosina@suse.cz\u003e\nCc: Dmitry Eremin-Solenikov \u003cdbaryshkov@gmail.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Hitoshi Mitake \u003ch.mitake@gmail.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Shaohui Xie \u003cShaohui.Xie@freescale.com\u003e\nCc: linuxppc-dev@lists.ozlabs.org\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "452a6bf955ee1842361742833e40e046287308f4", "tree": "2e4fb61fbbf32f17d80d9fce27a985361e6fc9af", "parents": [ "8ad6c78a69ac5c74e8f4e8c78cdb86772face433" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Mar 26 09:35:11 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Jun 11 13:23:43 2012 -0300" }, "message": "edac: Add debufs nodes to allow doing fake error inject\n\nSometimes, it is useful to have a mechanism that generates fake\nerrors, in order to test the EDAC core code, and the userspace\ntools.\n\nProvide such mechanism by adding a few debugfs nodes.\n\nReviewed-by: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "d90c008963ef638cb7ab7d5eb76362b3c2d379bc", "tree": "a2b394bd9ea90b48ec4f5015c2183c3c9f58e14e", "parents": [ "5c4cdb5ae72988ef93f72ad6f46be0e4eea5be8d" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Wed Mar 21 16:55:02 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Jun 11 13:23:41 2012 -0300" }, "message": "edac: Get rid of the old kobj\u0027s from the edac mc code\n\nNow that al users for the old kobj raw access are gone,\nwe can get rid of the legacy kobj-based structures and\ndata.\n\nReviewed-by: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Michal Marek \u003cmmarek@suse.cz\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "7a623c039075e4ea21648d88133fafa6dcfd113d", "tree": "125ecf3c32161ca5242237ce177c79109b0a8caa", "parents": [ "b0610bb82abd1c4ac97c33f0312cd7fd72eaa325" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Apr 16 16:41:11 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Jun 11 13:23:30 2012 -0300" }, "message": "edac: rewrite the sysfs code to use struct device\n\nThe EDAC subsystem uses the old struct sysdev approach,\ncreating all nodes using the raw sysfs API. This is bad,\nas the API is deprecated.\n\nAs we\u0027ll be changing the EDAC API, let\u0027s first port the existing\ncode to struct device.\n\nThere\u0027s one drawback on this patch: driver-specific sysfs\nnodes, used by mpc85xx_edac, amd64_edac and i7core_edac\n won\u0027t be created anymore. While it would be possible to\nalso port the device-specific code, that would mix kobj with\nstruct device, with is not recommended. Also, it is easier and nicer\nto move the code to the drivers, instead, as the core can get rid\nof some complex logic that just emulates what the device_add()\nand device_create_file() already does.\n\nThe next patches will convert the driver-specific code to use\nthe device-specific calls. Then, the remaining bits of the old\nsysfs API will be removed.\n\nNOTE: a per-MC bus is required, otherwise devices with more than\none memory controller will hit a bug like the one below:\n\n[ 819.094946] EDAC DEBUG: find_mci_by_dev: find_mci_by_dev()\n[ 819.094948] EDAC DEBUG: edac_create_sysfs_mci_device: edac_create_sysfs_mci_device() idx\u003d1\n[ 819.094952] EDAC DEBUG: edac_create_sysfs_mci_device: edac_create_sysfs_mci_device(): creating device mc1\n[ 819.094967] EDAC DEBUG: edac_create_sysfs_mci_device: edac_create_sysfs_mci_device creating dimm0, located at channel 0 slot 0\n[ 819.094984] ------------[ cut here ]------------\n[ 819.100142] WARNING: at fs/sysfs/dir.c:481 sysfs_add_one+0xc1/0xf0()\n[ 819.107282] Hardware name: S2600CP\n[ 819.111078] sysfs: cannot create duplicate filename \u0027/bus/edac/devices/dimm0\u0027\n[ 819.119062] Modules linked in: sb_edac(+) edac_core ip6table_filter ip6_tables ebtable_nat ebtables ipt_MASQUERADE iptable_nat nf_nat nf_conntrack_ipv4 nf_defrag_ipv4 xt_state nf_conntrack ipt_REJECT xt_CHECKSUM iptable_mangle iptable_filter ip_tables bridge stp llc sunrpc binfmt_misc dm_mirror dm_region_hash dm_log vhost_net macvtap macvlan tun kvm microcode pcspkr iTCO_wdt iTCO_vendor_support igb i2c_i801 i2c_core sg ioatdma dca sr_mod cdrom sd_mod crc_t10dif ahci libahci isci libsas libata scsi_transport_sas scsi_mod wmi dm_mod [last unloaded: scsi_wait_scan]\n[ 819.175748] Pid: 10902, comm: modprobe Not tainted 3.3.0-0.11.el7.v12.2.x86_64 #1\n[ 819.184113] Call Trace:\n[ 819.186868] [\u003cffffffff8105adaf\u003e] warn_slowpath_common+0x7f/0xc0\n[ 819.193573] [\u003cffffffff8105aea6\u003e] warn_slowpath_fmt+0x46/0x50\n[ 819.200000] [\u003cffffffff811f53d1\u003e] sysfs_add_one+0xc1/0xf0\n[ 819.206025] [\u003cffffffff811f5cf5\u003e] sysfs_do_create_link+0x135/0x220\n[ 819.212944] [\u003cffffffff811f7023\u003e] ? sysfs_create_group+0x13/0x20\n[ 819.219656] [\u003cffffffff811f5df3\u003e] sysfs_create_link+0x13/0x20\n[ 819.226109] [\u003cffffffff813b04f6\u003e] bus_add_device+0xe6/0x1b0\n[ 819.232350] [\u003cffffffff813ae7cb\u003e] device_add+0x2db/0x460\n[ 819.238300] [\u003cffffffffa0325634\u003e] edac_create_dimm_object+0x84/0xf0 [edac_core]\n[ 819.246460] [\u003cffffffffa0325e18\u003e] edac_create_sysfs_mci_device+0xe8/0x290 [edac_core]\n[ 819.255215] [\u003cffffffffa0322e2a\u003e] edac_mc_add_mc+0x5a/0x2c0 [edac_core]\n[ 819.262611] [\u003cffffffffa03412df\u003e] sbridge_register_mci+0x1bc/0x279 [sb_edac]\n[ 819.270493] [\u003cffffffffa03417a3\u003e] sbridge_probe+0xef/0x175 [sb_edac]\n[ 819.277630] [\u003cffffffff813ba4e8\u003e] ? pm_runtime_enable+0x58/0x90\n[ 819.284268] [\u003cffffffff812f430c\u003e] local_pci_probe+0x5c/0xd0\n[ 819.290508] [\u003cffffffff812f5ba1\u003e] __pci_device_probe+0xf1/0x100\n[ 819.297117] [\u003cffffffff812f5bea\u003e] pci_device_probe+0x3a/0x60\n[ 819.303457] [\u003cffffffff813b1003\u003e] really_probe+0x73/0x270\n[ 819.309496] [\u003cffffffff813b138e\u003e] driver_probe_device+0x4e/0xb0\n[ 819.316104] [\u003cffffffff813b149b\u003e] __driver_attach+0xab/0xb0\n[ 819.322337] [\u003cffffffff813b13f0\u003e] ? driver_probe_device+0xb0/0xb0\n[ 819.329151] [\u003cffffffff813af5d6\u003e] bus_for_each_dev+0x56/0x90\n[ 819.335489] [\u003cffffffff813b0d7e\u003e] driver_attach+0x1e/0x20\n[ 819.341534] [\u003cffffffff813b0980\u003e] bus_add_driver+0x1b0/0x2a0\n[ 819.347884] [\u003cffffffffa0347000\u003e] ? 0xffffffffa0346fff\n[ 819.353641] [\u003cffffffff813b19f6\u003e] driver_register+0x76/0x140\n[ 819.359980] [\u003cffffffff8159f18b\u003e] ? printk+0x51/0x53\n[ 819.365524] [\u003cffffffffa0347000\u003e] ? 0xffffffffa0346fff\n[ 819.371291] [\u003cffffffff812f5896\u003e] __pci_register_driver+0x56/0xd0\n[ 819.378096] [\u003cffffffffa0347054\u003e] sbridge_init+0x54/0x1000 [sb_edac]\n[ 819.385231] [\u003cffffffff8100203f\u003e] do_one_initcall+0x3f/0x170\n[ 819.391577] [\u003cffffffff810bcd2e\u003e] sys_init_module+0xbe/0x230\n[ 819.397926] [\u003cffffffff815bb529\u003e] system_call_fastpath+0x16/0x1b\n[ 819.404633] ---[ end trace 1654fdd39556689f ]---\n\nThis happens because the bus is not being properly initialized.\nInstead of putting the memory sub-devices inside the memory controller,\nit is putting everything under the same directory:\n\n$ tree /sys/bus/edac/\n/sys/bus/edac/\n├── devices\n│ ├── all_channel_counts -\u003e ../../../devices/system/edac/mc/mc0/all_channel_counts\n│ ├── csrow0 -\u003e ../../../devices/system/edac/mc/mc0/csrow0\n│ ├── csrow1 -\u003e ../../../devices/system/edac/mc/mc0/csrow1\n│ ├── csrow2 -\u003e ../../../devices/system/edac/mc/mc0/csrow2\n│ ├── dimm0 -\u003e ../../../devices/system/edac/mc/mc0/dimm0\n│ ├── dimm1 -\u003e ../../../devices/system/edac/mc/mc0/dimm1\n│ ├── dimm3 -\u003e ../../../devices/system/edac/mc/mc0/dimm3\n│ ├── dimm6 -\u003e ../../../devices/system/edac/mc/mc0/dimm6\n│ ├── inject_addrmatch -\u003e ../../../devices/system/edac/mc/mc0/inject_addrmatch\n│ ├── mc -\u003e ../../../devices/system/edac/mc\n│ └── mc0 -\u003e ../../../devices/system/edac/mc/mc0\n├── drivers\n├── drivers_autoprobe\n├── drivers_probe\n└── uevent\n\nOn a multi-memory controller system, the names \"csrow%d\" and \"dimm%d\"\nshould be under \"mc%d\", and not at the main hierarchy level.\n\nSo, we need to create a per-MC bus, in order to have its own namespace.\n\nReviewed-by: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Greg K H \u003cgregkh@linuxfoundation.org\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "b0610bb82abd1c4ac97c33f0312cd7fd72eaa325", "tree": "50ec6478042e3662058e47d96a9192f822011403", "parents": [ "fd687502dc8037aa5a4b84c570ada971106574ee" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Wed Mar 21 16:21:07 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Jun 11 11:56:07 2012 -0300" }, "message": "edac: use Documentation-nano format for some data structs\n\nNo functional changes. Just comment improvements.\n\nReviewed-by: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "fd687502dc8037aa5a4b84c570ada971106574ee", "tree": "53e7c4141571ff349759614095c12e853492f068", "parents": [ "53f2d02898755d1b24bde1975e202815d29fdb81" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Fri Mar 16 07:44:18 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Jun 11 11:56:06 2012 -0300" }, "message": "edac: Rename the parent dev to pdev\n\nAs EDAC doesn\u0027t use struct device itself, it created a parent dev\npointer called as \"pdev\". Now that we\u0027ll be converting it to use\nstruct device, instead of struct devsys, this needs to be fixed.\n\nNo functional changes.\n\nReviewed-by: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nCc: Mark Gross \u003cmark.gross@intel.com\u003e\nCc: Jason Uhlenkott \u003cjuhlenko@akamai.com\u003e\nCc: Tim Small \u003ctim@buttersideup.com\u003e\nCc: Ranganathan Desikan \u003cravi@jetztechnologies.com\u003e\nCc: \"Arvind R.\" \u003carvino55@gmail.com\u003e\nCc: Olof Johansson \u003colof@lixom.net\u003e\nCc: Egor Martovetsky \u003cegor@pasemi.com\u003e\nCc: Michal Marek \u003cmmarek@suse.cz\u003e\nCc: Jiri Kosina \u003cjkosina@suse.cz\u003e\nCc: Joe Perches \u003cjoe@perches.com\u003e\nCc: Dmitry Eremin-Solenikov \u003cdbaryshkov@gmail.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Hitoshi Mitake \u003ch.mitake@gmail.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: \"Niklas Söderlund\" \u003cniklas.soderlund@ericsson.com\u003e\nCc: Shaohui Xie \u003cShaohui.Xie@freescale.com\u003e\nCc: Josh Boyer \u003cjwboyer@gmail.com\u003e\nCc: linuxppc-dev@lists.ozlabs.org\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "5926ff502f6b93ca0c1654f8a5c5317ea236dbdb", "tree": "d70b074f959e7cb2007bdcb19e79aaba4458dd9a", "parents": [ "ca0907b9e413bb1d1f3ea123b663535b74928846" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Thu Feb 09 11:05:20 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon May 28 19:13:50 2012 -0300" }, "message": "edac: Initialize the dimm label with the known information\n\nWhile userspace doesn\u0027t fill the dimm labels, add there the dimm location,\nas described by the used memory model. This could eventually match what\nis described at the dmidecode, making easier for people to identify the\nmemory.\n\nFor example, on an Intel motherboard where the DMI table is reliable,\nthe first memory stick is described as:\n\nMemory Device\n\tArray Handle: 0x0029\n\tError Information Handle: Not Provided\n\tTotal Width: 64 bits\n\tData Width: 64 bits\n\tSize: 2048 MB\n\tForm Factor: DIMM\n\tSet: 1\n\tLocator: A1_DIMM0\n\tBank Locator: A1_Node0_Channel0_Dimm0\n\tType: \u003cOUT OF SPEC\u003e\n\tType Detail: Synchronous\n\tSpeed: 800 MHz\n\tManufacturer: A1_Manufacturer0\n\tSerial Number: A1_SerNum0\n\tAsset Tag: A1_AssetTagNum0\n\tPart Number: A1_PartNum0\n\nThe memory named as \"A1_DIMM0\" is physically located at the first\nmemory controller (node 0), at channel 0, dimm slot 0.\n\nAfter this patch, the memory label will be filled with:\n\t/sys/devices/system/edac/mc/csrow0/ch0_dimm_label:mc#0channel#0slot#0\n\nAnd (after the new EDAC API patches) as:\n\t/sys/devices/system/edac/mc/mc0/dimm0/dimm_label:mc#0channel#0slot#0\n\nSo, even if the memory label is not initialized on userspace, an useful\ninformation with the error location is filled there, expecially since\nseveral systems/motherboards are provided with enough info to map from\nchannel/slot (or branch/channel/slot) into the DIMM label. So, letting the\nEDAC core fill it by default is a good thing.\n\nIt should noticed that, as the label filling happens at the\nedac_mc_alloc(), drivers can override it to better describe the memories\n(and some actually do it).\n\nCc: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "4275be63559719c3149b19751029f1b0f1b26775", "tree": "d215a184f4278d7bc9095f18eb4c748149e241f3", "parents": [ "982216a4290543fe73ae4f0a156f3d7906bd9b73" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Wed Apr 18 15:20:50 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon May 28 19:10:59 2012 -0300" }, "message": "edac: Change internal representation to work with layers\n\nChange the EDAC internal representation to work with non-csrow\nbased memory controllers.\n\nThere are lots of those memory controllers nowadays, and more\nare coming. So, the EDAC internal representation needs to be\nchanged, in order to work with those memory controllers, while\npreserving backward compatibility with the old ones.\n\nThe edac core was written with the idea that memory controllers\nare able to directly access csrows.\n\nThis is not true for FB-DIMM and RAMBUS memory controllers.\n\nAlso, some recent advanced memory controllers don\u0027t present a per-csrows\nview. Instead, they view memories as DIMMs, instead of ranks.\n\nSo, change the allocation and error report routines to allow\nthem to work with all types of architectures.\n\nThis will allow the removal of several hacks with FB-DIMM and RAMBUS\nmemory controllers.\n\nAlso, several tests were done on different platforms using different\nx86 drivers.\n\nTODO: a multi-rank DIMMs are currently represented by multiple DIMM\nentries in struct dimm_info. That means that changing a label for one\nrank won\u0027t change the same label for the other ranks at the same DIMM.\nThis bug is present since the beginning of the EDAC, so it is not a big\ndeal. However, on several drivers, it is possible to fix this issue, but\nit should be a per-driver fix, as the csrow \u003d\u003e DIMM arrangement may not\nbe equal for all. So, don\u0027t try to fix it here yet.\n\nI tried to make this patch as short as possible, preceding it with\nseveral other patches that simplified the logic here. Yet, as the\ninternal API changes, all drivers need changes. The changes are\ngenerally bigger in the drivers for FB-DIMMs.\n\nCc: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nCc: Mark Gross \u003cmark.gross@intel.com\u003e\nCc: Jason Uhlenkott \u003cjuhlenko@akamai.com\u003e\nCc: Tim Small \u003ctim@buttersideup.com\u003e\nCc: Ranganathan Desikan \u003cravi@jetztechnologies.com\u003e\nCc: \"Arvind R.\" \u003carvino55@gmail.com\u003e\nCc: Olof Johansson \u003colof@lixom.net\u003e\nCc: Egor Martovetsky \u003cegor@pasemi.com\u003e\nCc: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Michal Marek \u003cmmarek@suse.cz\u003e\nCc: Jiri Kosina \u003cjkosina@suse.cz\u003e\nCc: Joe Perches \u003cjoe@perches.com\u003e\nCc: Dmitry Eremin-Solenikov \u003cdbaryshkov@gmail.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Hitoshi Mitake \u003ch.mitake@gmail.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: \"Niklas Söderlund\" \u003cniklas.soderlund@ericsson.com\u003e\nCc: Shaohui Xie \u003cShaohui.Xie@freescale.com\u003e\nCc: Josh Boyer \u003cjwboyer@gmail.com\u003e\nCc: linuxppc-dev@lists.ozlabs.org\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "982216a4290543fe73ae4f0a156f3d7906bd9b73", "tree": "0555488d5bc70a88ea5a89ccb22a24537ad97091", "parents": [ "93e4fe64ece4eccf0ff4ac69bceb389290b8ab7c" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Apr 16 13:04:46 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon May 28 19:10:59 2012 -0300" }, "message": "edac.h: Add generic layers for describing a memory location\n\nThe edac core were written with the idea that memory controllers\nare able to directly access csrows, and that the channels are\nused inside a csrows select.\n\nThis is not true for FB-DIMM and RAMBUS memory controllers.\n\nAlso, some recent advanced memory controllers don\u0027t present a per-csrows\nview. Instead, they view memories as DIMMs, instead of ranks, accessed\nvia csrow/channel.\n\nSo, changes are needed in order to allow the EDAC core to\nwork with all types of architectures.\n\nIn preparation for handling non-csrows based memory controllers,\nadd some memory structs and a macro:\n\nenum hw_event_mc_err_type: describes the type of error\n\t\t\t (corrected, uncorrected, fatal)\n\nTo be used by the new edac_mc_handle_error function;\n\nenum edac_mc_layer: describes the type of a given memory\narchitecture layer (branch, channel, slot, csrow).\n\nstruct edac_mc_layer: describes the properties of a memory\n\t\t layer (type, size, and if the layer\n\t\t will be used on a virtual csrow.\n\nEDAC_DIMM_PTR() - as the number of layers can vary from 1 to 3,\nthis macro converts from an address with up to 3 layers into\na linear address.\n\nReviewed-by: Borislav Petkov \u003cbp@amd64.org\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "a895bf8b1e1ea4c032a8fa8a09475a2ce09fe77a", "tree": "79a1110d0f4a6f2d50d870fa77d11a5311fee4fc", "parents": [ "5e2af0c09e60d11dd8297e259a9ca2b3d92d2cf4" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Sat Jan 28 09:09:38 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon May 28 19:10:58 2012 -0300" }, "message": "edac: move nr_pages to dimm struct\n\nThe number of pages is a dimm property. Move it to the dimm struct.\n\nAfter this change, it is possible to add sysfs nodes for the DIMM\u0027s that\nwill properly represent the DIMM stick properties, including its size.\n\nA TODO fix here is to properly represent dual-rank/quad-rank DIMMs when\nthe memory controller represents the memory via chip select rows.\n\nReviewed-by: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nAcked-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Mark Gross \u003cmark.gross@intel.com\u003e\nCc: Jason Uhlenkott \u003cjuhlenko@akamai.com\u003e\nCc: Tim Small \u003ctim@buttersideup.com\u003e\nCc: Ranganathan Desikan \u003cravi@jetztechnologies.com\u003e\nCc: \"Arvind R.\" \u003carvino55@gmail.com\u003e\nCc: Olof Johansson \u003colof@lixom.net\u003e\nCc: Egor Martovetsky \u003cegor@pasemi.com\u003e\nCc: Michal Marek \u003cmmarek@suse.cz\u003e\nCc: Jiri Kosina \u003cjkosina@suse.cz\u003e\nCc: Joe Perches \u003cjoe@perches.com\u003e\nCc: Dmitry Eremin-Solenikov \u003cdbaryshkov@gmail.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Hitoshi Mitake \u003ch.mitake@gmail.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: \"Niklas Söderlund\" \u003cniklas.soderlund@ericsson.com\u003e\nCc: Shaohui Xie \u003cShaohui.Xie@freescale.com\u003e\nCc: Josh Boyer \u003cjwboyer@gmail.com\u003e\nCc: linuxppc-dev@lists.ozlabs.org\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "084a4fccef39ac7abb039511f32380f28d0b67e6", "tree": "0596612000c7ec3a848b10f7cc4acdb573218076", "parents": [ "a7d7d2e1a07e3811dc49af2962c940fd8bbb6c8f" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Fri Jan 27 18:38:08 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon May 28 19:10:58 2012 -0300" }, "message": "edac: move dimm properties to struct dimm_info\n\nOn systems based on chip select rows, all channels need to use memories\nwith the same properties, otherwise the memories on channels A and B\nwon\u0027t be recognized.\n\nHowever, such assumption is not true for all types of memory\ncontrollers.\n\nControllers for FB-DIMM\u0027s don\u0027t have such requirements.\n\nAlso, modern Intel controllers seem to be capable of handling such\ndifferences.\n\nSo, we need to get rid of storing the DIMM information into a per-csrow\ndata, storing it, instead at the right place.\n\nThe first step is to move grain, mtype, dtype and edac_mode to the\nper-dimm struct.\n\nReviewed-by: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nReviewed-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nAcked-by: Chris Metcalf \u003ccmetcalf@tilera.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nCc: Mark Gross \u003cmark.gross@intel.com\u003e\nCc: Jason Uhlenkott \u003cjuhlenko@akamai.com\u003e\nCc: Tim Small \u003ctim@buttersideup.com\u003e\nCc: Ranganathan Desikan \u003cravi@jetztechnologies.com\u003e\nCc: \"Arvind R.\" \u003carvino55@gmail.com\u003e\nCc: Olof Johansson \u003colof@lixom.net\u003e\nCc: Egor Martovetsky \u003cegor@pasemi.com\u003e\nCc: Michal Marek \u003cmmarek@suse.cz\u003e\nCc: Jiri Kosina \u003cjkosina@suse.cz\u003e\nCc: Joe Perches \u003cjoe@perches.com\u003e\nCc: Dmitry Eremin-Solenikov \u003cdbaryshkov@gmail.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Hitoshi Mitake \u003ch.mitake@gmail.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: James Bottomley \u003cJames.Bottomley@parallels.com\u003e\nCc: \"Niklas Söderlund\" \u003cniklas.soderlund@ericsson.com\u003e\nCc: Shaohui Xie \u003cShaohui.Xie@freescale.com\u003e\nCc: Josh Boyer \u003cjwboyer@gmail.com\u003e\nCc: Mike Williams \u003cmike@mikebwilliams.com\u003e\nCc: linuxppc-dev@lists.ozlabs.org\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "a7d7d2e1a07e3811dc49af2962c940fd8bbb6c8f", "tree": "6c3ac39bf25fb7810668f57476c7b5872d5b418b", "parents": [ "76e10d158efb6d4516018846f60c2ab5501900bc" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Fri Jan 27 14:12:32 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon May 28 19:10:57 2012 -0300" }, "message": "edac: Create a dimm struct and move the labels into it\n\nThe way a DIMM is currently represented implies that they\u0027re\nlinked into a per-csrow struct. However, some drivers don\u0027t see\ncsrows, as they\u0027re ridden behind some chip like the AMB\u0027s\non FBDIMM\u0027s, for example.\n\nThis forced drivers to fake^Wvirtualize a csrow struct, and to create\na mess under csrow/channel original\u0027s concept.\n\nMove the DIMM labels into a per-DIMM struct, and add there\nthe real location of the socket, in terms of csrow/channel.\nLatter patches will modify the location to properly represent the\nmemory architecture.\n\nAll other drivers will use a per-csrow type of location.\nSome of those drivers will require a latter conversion, as\nthey also fake the csrows internally.\n\nTODO: While this patch doesn\u0027t change the existing behavior, on\ncsrows-based memory controllers, a csrow/channel pair points to a memory\nrank. There\u0027s a known bug at the EDAC core that allows having different\nlabels for the same DIMM, if it has more than one rank. A latter patch\nis need to merge the several ranks for a DIMM into the same dimm_info\nstruct, in order to avoid having different labels for the same DIMM.\n\nThe edac_mc_alloc() will now contain a per-dimm initialization loop that\nwill be changed by latter patches in order to match other types of\nmemory architectures.\n\nReviewed-by: Aristeu Rozanski \u003carozansk@redhat.com\u003e\nReviewed-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nCc: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nCc: Ranganathan Desikan \u003cravi@jetztechnologies.com\u003e\nCc: \"Arvind R.\" \u003carvino55@gmail.com\u003e\nCc: \"Niklas Söderlund\" \u003cniklas.soderlund@ericsson.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "f0f3680e50352c57b6cfc5b0d44d63bb0aa20f80", "tree": "2005ec90f9d90f25ceeba147dfe09db8c8036fa6", "parents": [ "61e5191c9d96268746bd57ed55d035678a1a2cf9", "a4b4be3fd7a76021f67380b03d8bccebf067db72" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 28 14:24:40 2012 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 28 14:24:40 2012 -0700" }, "message": "Merge branch \u0027linux_next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac\n\nPull EDAC fixes from Mauro Carvalho Chehab:\n \"A series of EDAC driver fixes. It also has one core fix at the\n documentation, and a rename patch, fixing the name of the struct that\n contains the rank information.\"\n\n* \u0027linux_next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac:\n edac: rename channel_info to rank_info\n i5400_edac: Avoid calling pci_put_device() twice\n edac: i5100 ack error detection register after each read\n edac: i5100 fix erroneous define for M1Err\n edac: sb_edac: Fix a wrong value setting for the previous value\n edac: sb_edac: Fix a INTERLEAVE_MODE() misuse\n edac: sb_edac: Let the driver depend on PCI_MMCONFIG\n edac: Improve the comments to better describe the memory concepts\n edac/ppc4xx_edac: Fix compilation\n Fix sb_edac compilation with 32 bits kernels\n" }, { "commit": "a4b4be3fd7a76021f67380b03d8bccebf067db72", "tree": "545aa3c8a1f8a5ae5747df1c8886d1e5e9518bab", "parents": [ "0142877aa4e54dd9943fb727e9b386c36c8e3ab7" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Fri Jan 27 10:26:13 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Wed Mar 21 15:22:50 2012 -0300" }, "message": "edac: rename channel_info to rank_info\n\nWhat it is pointed by a csrow/channel vector is a rank information, and\nnot a channel information.\n\nOn a traditional architecture, the memory controller directly access the\nmemory ranks, via chip select rows. Different ranks at the same DIMM is\nselected via different chip select rows. So, typically, one\ncsrow/channel pair means one different DIMM.\n\nOn FB-DIMMs, there\u0027s a microcontroller chip at the DIMM, called Advanced\nMemory Buffer (AMB) that serves as the interface between the memory\ncontroller and the memory chips.\n\nThe AMB selection is via the DIMM slot, and not via a csrow.\n\nIt is up to the AMB to talk with the csrows of the DRAM chips.\n\nSo, the FB-DIMM memory controllers see the DIMM slot, and not the DIMM\nrank. RAMBUS is similar.\n\nNewer memory controllers, like the ones found on Intel Sandy Bridge and\nNehalem, even working with normal DDR3 DIMM\u0027s, don\u0027t use the usual\nchannel A/channel B interleaving schema to provide 128 bits data access.\n\nInstead, they have more channels (3 or 4 channels), and they can use\nseveral interleaving schemas. Such memory controllers see the DIMMs\ndirectly on their registers, instead of the ranks, which is better for\nthe driver, as its main usageis to point to a broken DIMM stick (the\nField Repleceable Unit), and not to point to a broken DRAM chip.\n\nThe drivers that support such such newer memory architecture models\ncurrently need to fake information and to abuse on EDAC structures, as\nthe subsystem was conceived with the idea that the csrow would always be\nvisible by the CPU.\n\nTo make things a little worse, those drivers don\u0027t currently fake\ncsrows/channels on a consistent way, as the concepts there don\u0027t apply\nto the memory controllers they\u0027re talking with. So, each driver author\ninterpreted the concepts using a different logic.\n\nIn order to fix it, let\u0027s rename the data structure that points into a\nDIMM rank to \"rank_info\", in order to be clearer about what\u0027s stored\nthere.\n\nLatter patches will provide a better way to represent the memory\nhierarchy for the other types of memory controller.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "01a6e28b5096aea6801a21bdc20bf1de32833af5", "tree": "d1cb324e0ba1173806ae16e1fbc18439b1f1d08b", "parents": [ "b877763ea01d740f6c62a35c45b7351fec9c288d" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Fri Feb 03 13:17:48 2012 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Wed Mar 21 15:19:50 2012 -0300" }, "message": "edac: Improve the comments to better describe the memory concepts\n\nThe Computer memory terminology has changed with time since EDAC was\noriginally written: new concepts were introduced, and some things have\ndifferent meanings, depending on the memory architecture.\n\nImprove the definition of all related terms.\n\nAlso, describe each memory type in a more detailed fashion.\n\nNo functional changes. Just comments were touched.\n\nAcked-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n" }, { "commit": "313162d0b83836e2f57e51b9b8650fb4b9c396ea", "tree": "8f39f20515a924d392cf9a72db0918fda07a34c7", "parents": [ "51990e825431089747f8896244b5c17d3a6423f1" ], "author": { "name": "Paul Gortmaker", "email": "paul.gortmaker@windriver.com", "time": "Mon Jan 30 11:46:54 2012 -0500" }, "committer": { "name": "Paul Gortmaker", "email": "paul.gortmaker@windriver.com", "time": "Fri Mar 16 10:38:24 2012 -0400" }, "message": "device.h: audit and cleanup users in main include dir\n\nThe \u003clinux/device.h\u003e header includes a lot of stuff, and\nit in turn gets a lot of use just for the basic \"struct device\"\nwhich appears so often.\n\nClean up the users as follows:\n\n1) For those headers only needing \"struct device\" as a pointer\nin fcn args, replace the include with exactly that.\n\n2) For headers not really using anything from device.h, simply\ndelete the include altogether.\n\n3) For headers relying on getting device.h implicitly before\nbeing included themselves, now explicitly include device.h\n\n4) For files in which doing #1 or #2 uncovers an implicit\ndependency on some other header, fix by explicitly adding\nthe required header(s).\n\nAny C files that were implicitly relying on device.h to be\npresent have already been dealt with in advance.\n\nTotal removals from #1 and #2: 51. Total additions coming\nfrom #3: 9. Total other implicit dependencies from #4: 7.\n\nAs of 3.3-rc1, there were 110, so a net removal of 42 gives\nabout a 38% reduction in device.h presence in include/*\n\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\n" }, { "commit": "fe5ff8b84c8b03348a2f64ea9d884348faec2217", "tree": "8ad7290974ee129eee717a80846d25ea202fa21b", "parents": [ "997d3eaf02cad6fdb54bd6085c9a7c48ddd68a2d" ], "author": { "name": "Kay Sievers", "email": "kay.sievers@vrfy.org", "time": "Wed Dec 14 15:21:07 2011 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Dec 14 15:21:07 2011 -0800" }, "message": "edac: convert sysdev_class to a regular subsystem\n\nAfter all sysdev classes are ported to regular driver core entities, the\nsysdev implementation will be entirely removed from the kernel.\n\nCc: Doug Thompson \u003cdougthompson@xmission.com\u003e\nCc: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nCc: Lucas De Marchi \u003clucas.demarchi@profusion.mobi\u003e\nCc: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nSigned-off-by: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "ddeb3547d4823495c6604750c241e5a3810f51a3", "tree": "29ad379181d1dc7e272299a02e5e47b9353315dc", "parents": [ "224e871f36e1f9edddb0dfecbb84ff9765af3eb4" ], "author": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Fri Mar 04 15:11:29 2011 -0300" }, "committer": { "name": "Mauro Carvalho Chehab", "email": "mchehab@redhat.com", "time": "Mon Oct 31 15:10:04 2011 -0200" }, "message": "edac: Move edac main structs to include/linux/edac.h\n\nAs we\u0027ll need to use those structs for trace functions, they should\nbe on a more public place. So, move struct mem_ctl_info \u0026 friends\nto edac.h.\n\nNo functional changes on this patch.\n\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\nSigned-off-by: Doug Thompson \u003cdougthompson@xmission.com\u003e\n" }, { "commit": "60063497a95e716c9a689af3be2687d261f115b4", "tree": "6ce0d68db76982c53df46aee5f29f944ebf2c320", "parents": [ "148817ba092f9f6edd35bad3c6c6b8e8f90fe2ed" ], "author": { "name": "Arun Sharma", "email": "asharma@fb.com", "time": "Tue Jul 26 16:09:06 2011 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Jul 26 16:49:47 2011 -0700" }, "message": "atomic: use \u003clinux/atomic.h\u003e\n\nThis allows us to move duplicated code in \u003casm/atomic.h\u003e\n(atomic_inc_not_zero() for now) to \u003clinux/atomic.h\u003e\n\nSigned-off-by: Arun Sharma \u003casharma@fb.com\u003e\nReviewed-by: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nAcked-by: Mike Frysinger \u003cvapier@gentoo.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "30e1f7a8122145f44f45c95366e27b6bb0b08428", "tree": "ad1b549b88319b074505eed41914dd7b70f5434c", "parents": [ "7cfd4a87441f5ca3018fdd1f7ad67e8a73a05dc2" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Sep 02 17:26:48 2010 +0200" }, "committer": { "name": "Borislav Petkov", "email": "bp@amd64.org", "time": "Thu Oct 21 14:47:59 2010 +0200" }, "message": "EDAC: Export edac sysfs class to users.\n\nMove toplevel sysfs class to the stub and make it available to\nnon-modularized code too. Add proper refcounting of its users and move\nthe registration functionality into the reference counting routines.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\n" }, { "commit": "c3c52bce6993c6d37af2c2de9b482a7013d646a7", "tree": "dc03a88574a0029af51aad044c449cb90e52247f", "parents": [ "1a45027d1afd7e85254b5ef8535e93ce3d588cf4" ], "author": { "name": "Hitoshi Mitake", "email": "h.mitake@gmail.com", "time": "Tue Apr 29 01:03:18 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 29 08:06:26 2008 -0700" }, "message": "edac: fix module initialization on several modules 2nd time\n\nI implemented opstate_init() as a inline function in linux/edac.h.\n\nadded calling opstate_init() to:\n\ti82443bxgx_edac.c\n\ti82860_edac.c\n\ti82875p_edac.c\n\ti82975x_edac.c\n\nI wrote a fixed patch of\nedac-fix-module-initialization-on-several-modules.patch,\nand tested building 2.6.25-rc7 with applying this. It was succeed.\nI think the patch is now correct.\n\nCc: Alan Cox \u003calan@lxorguk.ukuu.org.uk\u003e\nSigned-off-by: Hitoshi Mitake \u003ch.mitake@gmail.com\u003e\nSigned-off-by: Doug Thompson \u003cdougthompson@xmission.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "66ee2f940ac8ab25f0c43a1e717d25dc46bfe74d", "tree": "929e24aefc27c95e13641a8f4052d9093a1ef34a", "parents": [ "91b99041c1d577ded1da599ddc28cec2e07253cf" ], "author": { "name": "Dave Jiang", "email": "djiang@mvista.com", "time": "Thu Jul 19 01:49:54 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Jul 19 10:04:54 2007 -0700" }, "message": "drivers/edac: mod assert_error check\n\nChange error check and clear variable from an atomic to an int\n\nSigned-off-by: Dave Jiang \u003cdjiang@mvista.com\u003e\nSigned-off-by: Douglas Thompson \u003cdougthompson@xmission.com\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "c0d121720220584bba2876b032e58a076b843fa1", "tree": "13ba24c6d875ded1494e1560f336b8551c663ef1", "parents": [ "28f96eeafc89643d411d54c258788a8573576127" ], "author": { "name": "Dave Jiang", "email": "djiang@mvista.com", "time": "Thu Jul 19 01:49:46 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Jul 19 10:04:53 2007 -0700" }, "message": "drivers/edac: add new nmi rescan\n\nProvides a way for NMI reported errors on x86 to notify the EDAC\nsubsystem pending ECC errors by writing to a software state variable.\n\nHere\u0027s the reworked patch. I added an EDAC stub to the kernel so we can\nhave variables that are in the kernel even if EDAC is a module. I also\nimplemented the idea of using the chip driver to select error detection\nmode via module parameter and eliminate the kernel compile option.\nPlease review/test. Thx!\n\nAlso, I only made changes to some of the chipset drivers since I am\nunfamiliar with the other ones. We can add similar changes as we go.\n\nSigned-off-by: Dave Jiang \u003cdjiang@mvista.com\u003e\nSigned-off-by: Douglas Thompson \u003cdougthompson@xmission.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" } ] }