[SPARC64]: No need to D-cache color page tables any longer.
Unlike the virtual page tables, the new TSB scheme does not
require this ugly hack.
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index 74de79d..45a9a2c 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -20,8 +20,9 @@
/* Dcache line 2 */
unsigned int pgcache_size;
unsigned int __pad1;
- unsigned long *pte_cache[2];
+ unsigned long *pte_cache;
unsigned long *pgd_cache;
+ unsigned long __pad2;
/* Dcache line 3, rarely used */
unsigned int dcache_size;
@@ -30,8 +31,8 @@
unsigned int icache_line_size;
unsigned int ecache_size;
unsigned int ecache_line_size;
- unsigned int __pad2;
unsigned int __pad3;
+ unsigned int __pad4;
} cpuinfo_sparc;
DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);