)]}'
{
  "commit": "0b3f0d12eff1ed23496fcf4cf468e1d317516e53",
  "tree": "e84337479fd27342f617707819f7af27729409c1",
  "parents": [
    "dd5ab248329edab4b16b70e4d9920f162d181d90"
  ],
  "author": {
    "name": "Bastian Hecht",
    "email": "hechtb@googlemail.com",
    "time": "Thu Mar 01 10:48:39 2012 +0100"
  },
  "committer": {
    "name": "David Woodhouse",
    "email": "David.Woodhouse@intel.com",
    "time": "Tue Mar 27 00:42:57 2012 +0100"
  },
  "message": "mtd: sh_flctl: Use cached register value for FLCMNCR\n\nInstead of reading out the register, use a cached value. This will\nmake way for a proper runtime power management implementation.\n\nSigned-off-by: Bastian Hecht \u003chechtb@gmail.com\u003e\nAcked-by: Laurent Pinchart \u003claurent.pinchart@ideasonboard.com\u003e\nSigned-off-by: Artem Bityutskiy \u003cartem.bityutskiy@linux.intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "61e41c065db8292b8a798c421486d08982c83108",
      "old_mode": 33188,
      "old_path": "drivers/mtd/nand/sh_flctl.c",
      "new_id": "48d5da0ec758a1d9e8f5ba972aee8720834507ef",
      "new_mode": 33188,
      "new_path": "drivers/mtd/nand/sh_flctl.c"
    },
    {
      "type": "modify",
      "old_id": "b66940593c829f780831fa9785629e317d7138a8",
      "old_mode": 33188,
      "old_path": "include/linux/mtd/sh_flctl.h",
      "new_id": "c7082820703bfc9c3cd5b92a77668243a886a24c",
      "new_mode": 33188,
      "new_path": "include/linux/mtd/sh_flctl.h"
    }
  ]
}