)]}'
{
  "commit": "4dcc29e1574d88f4465ba865ed82800032f76418",
  "tree": "5579a225a6782f0f5014cbbe6938847b7f3cd53f",
  "parents": [
    "e490517a039a99d692cb3a5561941b0a5f576172"
  ],
  "author": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Tue May 27 13:23:16 2008 -0700"
  },
  "committer": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Tue May 27 13:24:39 2008 -0700"
  },
  "message": "[IA64] Workaround for RSE issue\n\nProblem: An application violating the architectural rules regarding\noperation dependencies and having specific Register Stack Engine (RSE)\nstate at the time of the violation, may result in an illegal operation\nfault and invalid RSE state.  Such faults may initiate a cascade of\nrepeated illegal operation faults within OS interruption handlers.\nThe specific behavior is OS dependent.\n\nImplication: An application causing an illegal operation fault with\nspecific RSE state may result in a series of illegal operation faults\nand an eventual OS stack overflow condition.\n\nWorkaround: OS interruption handlers that switch to kernel backing\nstore implement a check for invalid RSE state to avoid the series\nof illegal operation faults.\n\nThe core of the workaround is the RSE_WORKAROUND code sequence\ninserted into each invocation of the SAVE_MIN_WITH_COVER and\nSAVE_MIN_WITH_COVER_R19 macros.  This sequence includes hard-coded\nconstants that depend on the number of stacked physical registers\nbeing 96.  The rest of this patch consists of code to disable this\nworkaround should this not be the case (with the presumption that\nif a future Itanium processor increases the number of registers, it\nwould also remove the need for this patch).\n\nMove the start of the RBS up to a mod32 boundary to avoid some\ncorner cases.\n\nThe dispatch_illegal_op_fault code outgrew the spot it was\nsquatting in when built with this patch and CONFIG_VIRT_CPU_ACCOUNTING\u003dy\nMove it out to the end of the ivt.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n",
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