ASoC: cs42l73: Unify the way to define bits of register
Current code defines some bits with left shift to the proper bit defined in
datasheet, but some don't.
Unify the definition with proper left shift and adjust the code accordingly.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
diff --git a/sound/soc/codecs/cs42l73.c b/sound/soc/codecs/cs42l73.c
index 5544f14..672da66 100644
--- a/sound/soc/codecs/cs42l73.c
+++ b/sound/soc/codecs/cs42l73.c
@@ -1028,13 +1028,13 @@
switch (format) {
case SND_SOC_DAIFMT_DSP_B:
if (inv == SND_SOC_DAIFMT_IB_IF)
- spc |= (PCM_MODE0 << 4);
+ spc |= PCM_MODE0;
if (inv == SND_SOC_DAIFMT_IB_NF)
- spc |= (PCM_MODE1 << 4);
+ spc |= PCM_MODE1;
break;
case SND_SOC_DAIFMT_DSP_A:
if (inv == SND_SOC_DAIFMT_IB_IF)
- spc |= (PCM_MODE1 << 4);
+ spc |= PCM_MODE1;
break;
default:
return -EINVAL;
diff --git a/sound/soc/codecs/cs42l73.h b/sound/soc/codecs/cs42l73.h
index 7c3bf7f..f30a4c4 100644
--- a/sound/soc/codecs/cs42l73.h
+++ b/sound/soc/codecs/cs42l73.h
@@ -162,16 +162,16 @@
/* CS42L73_ASPC, CS42L73_XSPC, CS42L73_VSPC */
#define SP_3ST (1 << 7)
-#define SPDIF_I2S 0
+#define SPDIF_I2S (0 << 6)
#define SPDIF_PCM (1 << 6)
-#define PCM_MODE0 0
-#define PCM_MODE1 1
-#define PCM_MODE2 2
-#define PCM_BO_MSBLSB 0
-#define PCM_BO_LSBMSB 1
-#define MCK_SCLK_64FS 0
-#define MCK_SCLK_MCLK 2
-#define MCK_SCLK_PREMCLK 3
+#define PCM_MODE0 (0 << 4)
+#define PCM_MODE1 (1 << 4)
+#define PCM_MODE2 (2 << 4)
+#define PCM_MODE_MASK (3 << 4)
+#define PCM_BIT_ORDER (1 << 3)
+#define MCK_SCLK_64FS (0 << 0)
+#define MCK_SCLK_MCLK (2 << 0)
+#define MCK_SCLK_PREMCLK (3 << 0)
/* CS42L73_xSPMMCC */
#define MS_MASTER (1 << 7)