)]}'
{
  "commit": "7811fb8f400a3dbfa027d86bb583a31c66fddfc3",
  "tree": "2df816ff6559a0e2f9d7537e1accdfe932e027d4",
  "parents": [
    "5f819949ee4e5a06c2e0054cbb42f3f0d170d779"
  ],
  "author": {
    "name": "Clemens Ladisch",
    "email": "clemens@ladisch.de",
    "time": "Sun Oct 30 15:03:36 2005 -0800"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@g5.osdl.org",
    "time": "Sun Oct 30 17:37:30 2005 -0800"
  },
  "message": "[PATCH] hpet-RTC: cache the comparator register\n\nReads from an HPET register require a round trip to the south bridge and are\nalmost as slow as PCI reads.  By caching the last value we\u0027ve written to the\ncomparator register, we can eliminate all HPET reads from the fast path in the\nemulated RTC interrupt handler.\n\nSigned-off-by: Clemens Ladisch \u003cclemens@ladisch.de\u003e\nAcked-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "cb1f313858e300d593853c64f72db2770d25eac2",
      "old_mode": 33188,
      "old_path": "arch/i386/kernel/time_hpet.c",
      "new_id": "9caeaa315cd7c00157ba7621a8c2082e116cfa68",
      "new_mode": 33188,
      "new_path": "arch/i386/kernel/time_hpet.c"
    },
    {
      "type": "modify",
      "old_id": "35a896ef4c352671caec6878c7d980761015b761",
      "old_mode": 33188,
      "old_path": "arch/x86_64/kernel/time.c",
      "new_id": "fdaddc4e52847a1f0fea0c50ff960aadcc9caf60",
      "new_mode": 33188,
      "new_path": "arch/x86_64/kernel/time.c"
    }
  ]
}