)]}'
{
  "commit": "8b8c8d280ab2d18fe6e42d671f60d4ffed451cdc",
  "tree": "83702395aa09b3a4497758e3cf0e5c52761c798a",
  "parents": [
    "04d9c1a1100b6bdeffa7e1bfc30080bdac28e183"
  ],
  "author": {
    "name": "Yu, Luming",
    "email": "luming.yu@intel.com",
    "time": "Tue Apr 25 00:00:34 2006 -0700"
  },
  "committer": {
    "name": "Greg Kroah-Hartman",
    "email": "gregkh@suse.de",
    "time": "Sun Jun 11 14:02:27 2006 -0700"
  },
  "message": "[PATCH] PCI: reverse pci config space restore order\n\nAccording to Intel ICH spec, there are several rules that Base Address\nshould be programmed before IOSE  (PCICMD register ) enabled.\n\nFor example ICH7:\n\n12.1.3  SATA : the base address register for the bus master register\n               should be programmed before this bit is set.\n\n11.1.3:  PCICMD (USB): The base address register for USB should be\n                       programmed before this bit is set.\n....\n\nTo make sure kernel code follow this rule , and prevent unnecessary\nconfusion. I proposal this patch.\n\nSigned-off-by: Luming Yu \u003cluming.yu@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d2520451f36b7e797b596945715261964bb142fe",
      "old_mode": 33188,
      "old_path": "drivers/pci/pci.c",
      "new_id": "12286275b1c81ce3029f3dbd3e9f8127e495c4ea",
      "new_mode": 33188,
      "new_path": "drivers/pci/pci.c"
    }
  ]
}