)]}'
{
  "commit": "8c5f5f7c42e009bbb6184563d3cb3861bb73b98c",
  "tree": "2dd13b2400916a373ad2636c39c0ba18974810f6",
  "parents": [
    "1833b134454d5300d8a9d07b78876a20395f01a9"
  ],
  "author": {
    "name": "Eugeni Dodonov",
    "email": "eugeni.dodonov@intel.com",
    "time": "Thu May 10 10:18:02 2012 -0300"
  },
  "committer": {
    "name": "Daniel Vetter",
    "email": "daniel.vetter@ffwll.ch",
    "time": "Sat May 19 22:39:43 2012 +0200"
  },
  "message": "drm/i915: add new Haswell DIP controls registers\n\nHaswell has different DIP control registers and offsets which we need to\nuse for infoframes, which this patch adds.\n\nNote that this does not adds full DIP frames support, but only the basic\nfunctionality necessary for HDMI to work in early enablement.\n\nv2: replace infoframe handling with a debug message, proper support will\nbe added via a patch from Paulo Zanoni later.\n\nSigned-off-by: Eugeni Dodonov \u003ceugeni.dodonov@intel.com\u003e\nReviewed-by: Paulo Zanoni \u003cprzanoni@gmail.com\u003e\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "4a97db25cd348ef749907d62ee06c676f601e057",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/i915/i915_reg.h",
      "new_id": "fb76b19e32b22e5aba18cc4e2ce5c2a99610a4ab",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/i915/i915_reg.h"
    },
    {
      "type": "modify",
      "old_id": "e240d99dbf92b532264a66b831b6f67328973fea",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/i915/intel_hdmi.c",
      "new_id": "4a9d553719f6ed0c862714738685826ef61e2803",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/i915/intel_hdmi.c"
    }
  ]
}