ARM: mach-shmobile: sh73a0 i2c_shmobile support.
Platform device resource/data definition for CPU, and clkdev entries
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 82c7251..6e48aae 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -40,21 +40,30 @@
.rate = 48000000,
};
+/* Temporarily fixed 104 MHz HP clock */
+static struct clk hp_clk = {
+ .rate = 104000000,
+};
+
static struct clk *main_clks[] = {
&r_clk,
&sub_clk,
+ &hp_clk,
};
enum { MSTP219,
- MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
- MSTP331, MSTP329, MSTP403,
+ MSTP001, MSTP116, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
+ MSTP201, MSTP200, MSTP323, MSTP331, MSTP329, MSTP312, MSTP411,
+ MSTP410, MSTP403,
MSTP_NR };
#define MSTP(_parent, _reg, _bit, _flags) \
SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP001] = MSTP(&hp_clk, SMSTPCR0, 1, 0), /* I2C2 */
[MSTP219] = MSTP(&sub_clk, SMSTPCR2, 19, 0), /* SCIFA7 */
+ [MSTP116] = MSTP(&hp_clk, SMSTPCR1, 16, 0), /* I2C0 */
[MSTP207] = MSTP(&sub_clk, SMSTPCR2, 7, 0), /* SCIFA5 */
[MSTP206] = MSTP(&sub_clk, SMSTPCR2, 6, 0), /* SCIFB */
[MSTP204] = MSTP(&sub_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
@@ -64,7 +73,10 @@
[MSTP200] = MSTP(&sub_clk, SMSTPCR2, 0, 0), /* SCIFA4 */
[MSTP331] = MSTP(&sub_clk, SMSTPCR3, 31, 0), /* SCIFA6 */
[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
+ [MSTP323] = MSTP(&hp_clk, SMSTPCR3, 23, 0), /* I2C1 */
[MSTP403] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* KEYSC0 */
+ [MSTP411] = MSTP(&hp_clk, SMSTPCR4, 11, 0), /* I2C3 */
+ [MSTP410] = MSTP(&hp_clk, SMSTPCR4, 10, 0), /* I2C4 */
};
#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
@@ -82,6 +94,11 @@
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC0 */
+ CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
+ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
+ CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
+ CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
+ CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
};
void __init sh73a0_clock_init(void)