ASoC: wm0010: Allow slow GPIO for reset
We never set the GPIO from atomic context so there's no reason why we
can't support a GPIO that needs to sleep when configuring.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
diff --git a/sound/soc/codecs/wm0010.c b/sound/soc/codecs/wm0010.c
index f8d6c31..4722acf 100644
--- a/sound/soc/codecs/wm0010.c
+++ b/sound/soc/codecs/wm0010.c
@@ -168,7 +168,8 @@
case WM0010_STAGE2:
case WM0010_FIRMWARE:
/* Remember to put chip back into reset */
- gpio_set_value(wm0010->gpio_reset, wm0010->gpio_reset_value);
+ gpio_set_value_cansleep(wm0010->gpio_reset,
+ wm0010->gpio_reset_value);
/* Disable the regulators */
regulator_disable(wm0010->dbvdd);
regulator_bulk_disable(ARRAY_SIZE(wm0010->core_supplies),
@@ -387,7 +388,7 @@
}
/* Release reset */
- gpio_set_value(wm0010->gpio_reset, !wm0010->gpio_reset_value);
+ gpio_set_value_cansleep(wm0010->gpio_reset, !wm0010->gpio_reset_value);
spin_lock_irqsave(&wm0010->irq_lock, flags);
wm0010->state = WM0010_OUT_OF_RESET;
spin_unlock_irqrestore(&wm0010->irq_lock, flags);
@@ -918,7 +919,8 @@
if (wm0010->gpio_reset) {
/* Remember to put chip back into reset */
- gpio_set_value(wm0010->gpio_reset, wm0010->gpio_reset_value);
+ gpio_set_value_cansleep(wm0010->gpio_reset,
+ wm0010->gpio_reset_value);
}
if (wm0010->irq)