| Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 1 | /* | 
 | 2 |  *  Copyright (C) 1999,2000 Arm Limited | 
 | 3 |  *  Copyright (C) 2000 Deep Blue Solutions Ltd | 
 | 4 |  *  Copyright (C) 2002 Shane Nay (shane@minirl.com) | 
 | 5 |  *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. | 
 | 6 |  *    - add MX31 specific definitions | 
 | 7 |  * | 
 | 8 |  * This program is free software; you can redistribute it and/or modify | 
 | 9 |  * it under the terms of the GNU General Public License as published by | 
 | 10 |  * the Free Software Foundation; either version 2 of the License, or | 
 | 11 |  * (at your option) any later version. | 
 | 12 |  * | 
 | 13 |  * This program is distributed in the hope that it will be useful, | 
 | 14 |  * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
 | 15 |  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
 | 16 |  * GNU General Public License for more details. | 
 | 17 |  * | 
 | 18 |  * You should have received a copy of the GNU General Public License | 
 | 19 |  * along with this program; if not, write to the Free Software | 
 | 20 |  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA | 
 | 21 |  */ | 
 | 22 |  | 
 | 23 | #include <linux/mm.h> | 
 | 24 | #include <linux/init.h> | 
| Sascha Hauer | cb88214 | 2009-02-08 02:00:50 +0100 | [diff] [blame] | 25 | #include <linux/err.h> | 
 | 26 |  | 
| Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 27 | #include <asm/pgtable.h> | 
 | 28 | #include <asm/mach/map.h> | 
| Sascha Hauer | cb88214 | 2009-02-08 02:00:50 +0100 | [diff] [blame] | 29 | #include <asm/hardware/cache-l2x0.h> | 
 | 30 |  | 
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 31 | #include <mach/common.h> | 
| Sascha Hauer | cb88214 | 2009-02-08 02:00:50 +0100 | [diff] [blame] | 32 | #include <mach/hardware.h> | 
| Sascha Hauer | 6134b2c | 2009-06-04 11:16:22 +0200 | [diff] [blame] | 33 | #include <mach/iomux-v3.h> | 
| Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 34 |  | 
 | 35 | /*! | 
 | 36 |  * @file mm.c | 
 | 37 |  * | 
 | 38 |  * @brief This file creates static virtual to physical mappings, common to all MX3 boards. | 
 | 39 |  * | 
 | 40 |  * @ingroup Memory | 
 | 41 |  */ | 
 | 42 |  | 
 | 43 | /*! | 
 | 44 |  * This table defines static virtual address mappings for I/O regions. | 
 | 45 |  * These are the mappings common across all MX3 boards. | 
 | 46 |  */ | 
 | 47 | static struct map_desc mxc_io_desc[] __initdata = { | 
 | 48 | 	{ | 
 | 49 | 		.virtual	= X_MEMC_BASE_ADDR_VIRT, | 
 | 50 | 		.pfn		= __phys_to_pfn(X_MEMC_BASE_ADDR), | 
 | 51 | 		.length		= X_MEMC_SIZE, | 
 | 52 | 		.type		= MT_DEVICE | 
 | 53 | 	}, { | 
 | 54 | 		.virtual	= AVIC_BASE_ADDR_VIRT, | 
 | 55 | 		.pfn		= __phys_to_pfn(AVIC_BASE_ADDR), | 
 | 56 | 		.length		= AVIC_SIZE, | 
| Russell King | 9b727abd | 2008-09-07 12:45:01 +0100 | [diff] [blame] | 57 | 		.type		= MT_DEVICE_NONSHARED | 
| Sascha Hauer | fb4416a | 2009-02-06 18:15:06 +0100 | [diff] [blame] | 58 | 	}, { | 
 | 59 | 		.virtual	= AIPS1_BASE_ADDR_VIRT, | 
 | 60 | 		.pfn		= __phys_to_pfn(AIPS1_BASE_ADDR), | 
 | 61 | 		.length		= AIPS1_SIZE, | 
 | 62 | 		.type		= MT_DEVICE_NONSHARED | 
 | 63 | 	}, { | 
 | 64 | 		.virtual	= AIPS2_BASE_ADDR_VIRT, | 
 | 65 | 		.pfn		= __phys_to_pfn(AIPS2_BASE_ADDR), | 
 | 66 | 		.length		= AIPS2_SIZE, | 
 | 67 | 		.type		= MT_DEVICE_NONSHARED | 
| Wolfgang Denk | e94c4c3 | 2009-12-15 00:27:42 +0100 | [diff] [blame] | 68 | 	}, { | 
 | 69 | 		.virtual = SPBA0_BASE_ADDR_VIRT, | 
 | 70 | 		.pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | 
 | 71 | 		.length = SPBA0_SIZE, | 
 | 72 | 		.type = MT_DEVICE_NONSHARED | 
| Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 73 | 	}, | 
 | 74 | }; | 
 | 75 |  | 
 | 76 | /*! | 
 | 77 |  * This function initializes the memory map. It is called during the | 
 | 78 |  * system startup to create static physical to virtual memory mappings | 
 | 79 |  * for the IO modules. | 
 | 80 |  */ | 
| Sascha Hauer | cd4a05f | 2009-04-02 22:32:10 +0200 | [diff] [blame] | 81 | void __init mx31_map_io(void) | 
| Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 82 | { | 
| Sascha Hauer | cd4a05f | 2009-04-02 22:32:10 +0200 | [diff] [blame] | 83 | 	mxc_set_cpu_type(MXC_CPU_MX31); | 
| Sascha Hauer | be124c9 | 2009-06-04 12:19:02 +0200 | [diff] [blame] | 84 | 	mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | 
| Sascha Hauer | cd4a05f | 2009-04-02 22:32:10 +0200 | [diff] [blame] | 85 |  | 
 | 86 | 	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 
 | 87 | } | 
 | 88 |  | 
| Guennadi Liakhovetski | 324c1aa | 2009-10-05 10:00:58 +0200 | [diff] [blame] | 89 | #ifdef CONFIG_ARCH_MX35 | 
| Sascha Hauer | cd4a05f | 2009-04-02 22:32:10 +0200 | [diff] [blame] | 90 | void __init mx35_map_io(void) | 
 | 91 | { | 
 | 92 | 	mxc_set_cpu_type(MXC_CPU_MX35); | 
| Sascha Hauer | 6134b2c | 2009-06-04 11:16:22 +0200 | [diff] [blame] | 93 | 	mxc_iomux_v3_init(IO_ADDRESS(IOMUXC_BASE_ADDR)); | 
| Sascha Hauer | be124c9 | 2009-06-04 12:19:02 +0200 | [diff] [blame] | 94 | 	mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | 
| Sascha Hauer | cd4a05f | 2009-04-02 22:32:10 +0200 | [diff] [blame] | 95 |  | 
| Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 96 | 	iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 
 | 97 | } | 
| Guennadi Liakhovetski | 324c1aa | 2009-10-05 10:00:58 +0200 | [diff] [blame] | 98 | #endif | 
| Sascha Hauer | cb88214 | 2009-02-08 02:00:50 +0100 | [diff] [blame] | 99 |  | 
| Sascha Hauer | c5aa0ad | 2009-05-25 17:36:19 +0200 | [diff] [blame] | 100 | void __init mx31_init_irq(void) | 
 | 101 | { | 
 | 102 | 	mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); | 
 | 103 | } | 
 | 104 |  | 
 | 105 | void __init mx35_init_irq(void) | 
 | 106 | { | 
 | 107 | 	mx31_init_irq(); | 
 | 108 | } | 
 | 109 |  | 
| Sascha Hauer | cb88214 | 2009-02-08 02:00:50 +0100 | [diff] [blame] | 110 | #ifdef CONFIG_CACHE_L2X0 | 
 | 111 | static int mxc_init_l2x0(void) | 
 | 112 | { | 
 | 113 | 	void __iomem *l2x0_base; | 
 | 114 |  | 
 | 115 | 	l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); | 
 | 116 | 	if (IS_ERR(l2x0_base)) { | 
 | 117 | 		printk(KERN_ERR "remapping L2 cache area failed with %ld\n", | 
 | 118 | 				PTR_ERR(l2x0_base)); | 
 | 119 | 		return 0; | 
 | 120 | 	} | 
 | 121 |  | 
 | 122 | 	l2x0_init(l2x0_base, 0x00030024, 0x00000000); | 
 | 123 |  | 
 | 124 | 	return 0; | 
 | 125 | } | 
 | 126 |  | 
 | 127 | arch_initcall(mxc_init_l2x0); | 
 | 128 | #endif | 
 | 129 |  |